f30f8ab9a2
Signed-off-by: Luo Wei <lw@rock-chips.com> Change-Id: Ib6b2be0222ca6ad47c1597dccff8aca8b18c05bb
101 lines
2.5 KiB
Plaintext
101 lines
2.5 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
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*
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*/
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#define MCU_PERI_5V_EN 0x01
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#define MCU_CAM1_PWREN 0x02
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#define MCU_CAM2_PWREN 0x03
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#define DSP_CORE_PWR_EN 0x04
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#define MCU_DSP_RST 0x05
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#define FM_PWR_EN_MCU 0x06
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#define ADC_PWDN_MCU 0x07
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#define MCU_ADSP_VCC12V_EN 0x08
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#define MCU_CAM3_PWREN 0x08
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#define A2B_PWR_EN_MCU 0x09
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#define MCU_RSTB_ETH 0x0a
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#define MCU_DISB_ETH 0x0b
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#define MUTE_AMP_MCU 0x0c
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#define MCU_LCD1_SER_EN 0x0a
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#define MCU_LCD2_SER_EN 0x0b
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#define MCU_LCD3_SER_EN 0x0c
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#define STANDBY_AMP_MCU 0x0d
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#define MCU_CTRL_CluPWR 0x0e
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#define MCU_LCD1_12V_EN 0x0f
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#define MCU_LCD2_12V_EN 0x10
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#define MCU_LCD3_12V_EN 0x11
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#define MCU_CAM1_OUT1_EN 0x12
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#define MCU_CAM1_OUT2_EN 0x13
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#define MCU_CAM1_OUT3_EN 0x14
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#define MCU_CAM1_OUT4_EN 0x15
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#define MCU_CAM2_OUT1_EN 0x16
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#define MCU_CAM2_OUT2_EN 0x17
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#define MCU_CAM2_OUT3_EN 0x18
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#define MCU_CAM2_OUT4_EN 0x19
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#define MCU_CAM3_OUT1_EN 0x1a
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#define MCU_CAM3_OUT2_EN 0x1b
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#define MCU_CAM3_OUT3_EN 0x1c
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#define MCU_CAM3_OUT4_EN 0x1d
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#define MCU_USB3HOST_PWREN 0x1e
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#define USB_OTG0_PWREN_H 0x1f
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#define MCU_CTRL_VSYS 0x20
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#define DSP_VCC1V8_PWR_EN 0x21
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#define DSP_VCC3V3_PWR_EN 0x22
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#define PERI_5V_PG 0x92
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#define SYS4V_PG 0x93
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#define FAULT_AMP3_MCU 0x92
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#define FAULT_AMP4_MCU 0x93
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#define MCU_DSP_FAULTB 0x94
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#define ADC_INT_MCU 0x95
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#define A2B_IRQ_MCU 0x96
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#define ACC_DET 0x97
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#define BACK_DET 0x98
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#define MCU_CAM2_OUT1_DIAG 0x99
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#define MCU_CAM2_OUT2_DIAG 0x9a
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#define MCU_CAM2_OUT3_DIAG 0x9b
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#define MCU_CAM2_OUT4_DIAG 0x9c
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#define MCU_LCD1_PWR_DIAG 0x9d
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#define MCU_LCD2_PWR_DIAG 0x9e
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#define MCU_LCD3_PWR_DIAG 0x9f
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/ {
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gpio_mcu_rockchip: gpio-mcu-rockchip {
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compatible = "rockchip,mcu-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <32>;
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interrupt-controller;
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#interrupt-cells = <2>;
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status = "okay";
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};
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};
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&spi4 {
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compatible = "rockchip,spi-slave";
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status = "okay";
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pinctrl-names = "default", "high_speed";
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pinctrl-0 = <&spi4m3_csn0 &spi4m3_pins>;
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ready-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;
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slave@0 {
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compatible = "rockchip,vehicle-spi";
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status = "okay";
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id = <0x0>;
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reg = <0x0>;
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spi-max-frequency = <1000000>;
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spi-lsb-first;
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pinctrl-names = "default";
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pinctrl-0 = <&spi_irq_mcu>;
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irq-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_LOW>;
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};
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};
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&pinctrl {
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slave-external-mcu {
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spi_irq_mcu: spi-irq-mcu {
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rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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