d4ae9d6ea7
* commit '40fac1a66ccf61bdf3afb70c18a5db7791410b22': (220 commits) Revert "tee: optee: interrupt an RPC when supplicant has been killed" Revert "tee: optee: interrupt an RPC depend on shutdown flag" arm64: dts: rockchip: rv1126bp-evb-v14: Adjust the matching voltage media: rockchip: aiisp: delete one temp buffer to reduce memory media: rockchip: isp: mp output buf notice to aiisp media: rockchip: aiisp: modify for aiynr algo rtc: rockchip: add ready flag for rtc setting time soc: rockchip: cpuinfo: export chip unique id to userspace media: rockchip: vpss: offline mode support auto unite output drm/rockchip: vop2: Add "DIMMING_DATA" property for local dimming media: rockchip: isp: aiisp switch for offline mode media: rockchip: isp: aiisp switch for isp35 media: rockchip: isp: support aiisp yuv mode input: touchscreen: gt1x: prefix global variables and functions with "gt1x_" MALI: valhall: add gpu mem sysfs entry drm/rockchip: Make the DRM panel as part of Rockchip DRM sub devices for panel loader protect drm/rockchip: Pass struct rockchip_drm_sub_dev for &rockchip_drm_sub_dev.loader_protect() pwm: rockchip: Add &rockchip_pwm_chip.oneshot_valid to indicate validity of configurations pwm: rockchip: Add comments for why to add delay before disabling the dclk for PWM v4 input: touchscreen: hyn: reduce logs ... Change-Id: I1b562efca0842173010b2506231d7200a5116e5a
1481 lines
30 KiB
Plaintext
1481 lines
30 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
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*
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pwm/pwm.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include <dt-bindings/input/rk-input.h>
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#include <dt-bindings/display/drm_mipi_dsi.h>
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#include <dt-bindings/display/rockchip_vop.h>
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#include <dt-bindings/sensor-dev.h>
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#include <dt-bindings/usb/pd.h>
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#include "rk3576.dtsi"
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#include "rk3576-linux.dtsi"
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#include "rk3576-pinctrl.dtsi"
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#include "rk3576-toybrick-cam-dcphy0.dtsi"
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#include "rk3576-toybrick-cam-dphy3.dtsi"
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/ {
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model = "Rockchip RK3576 TOYBRICK D0 Board";
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compatible = "rockchip,rk3576-toybrick-d0", "rockchip,rk3576";
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reserved_memory: reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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vendor_storage_rm: vendor-storage-rm@00000000 {
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compatible = "rockchip,vendor-storage-rm";
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reg = <0x0 0x0 0x0 0x0>;
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};
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};
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vendor_storage: vendor-storage {
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compatible = "rockchip,ram-vendor-storage";
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memory-region = <&vendor_storage_rm>;
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status = "okay";
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};
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backlight: backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm1_6ch_1 0 25000 0>;
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brightness-levels = <
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0 20 20 21 21 22 22 23
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23 24 24 25 25 26 26 27
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27 28 28 29 29 30 30 31
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31 32 32 33 33 34 34 35
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35 36 36 37 37 38 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255
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>;
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default-brightness-level = <200>;
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};
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fan1 {
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compatible = "pwm-fan";
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pwms = <&pwm1_6ch_4 0 40000 0>;
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cooling-levels = <0 80 170 255>;
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};
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// leds: gpio-leds {
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// compatible = "gpio-leds";
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// pinctrl-names = "default";
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// pinctrl-0 =<&leds_gpio>;
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// led@1 {
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// gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
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// label = "heartbeat";
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// linux,default-trigger = "heartbeat";
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// };
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// };
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leds: leds {
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compatible = "gpio-leds";
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work_led: work {
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gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
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label = "heartbeat";
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linux,default-trigger = "heartbeat";
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};
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};
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sdio_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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clocks = <&hym8563>;
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clock-names = "ext_clock";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_poweren_gpio>;
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/*
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* On the module itself this is one of these (depending
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* on the actual card populated):
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* - SDIO_RESET_L_WL_REG_ON
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* - PDN (power down when low)
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*/
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post-power-on-delay-ms = <200>;
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reset-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_LOW>;
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};
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vbus_typec_power: vbus-typec-power {
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compatible = "regulator-fixed";
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regulator-name = "vbus_typec_power";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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};
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vcc_5v0_sys_s5: vcc-5v0-sys-s5 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_5v0_sys_s5";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vbus_typec_power>;
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};
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vcc_2v0_pldo_s3: vcc-2v0-pldo-s3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_2v0_pldo_s3";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <2000000>;
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regulator-max-microvolt = <2000000>;
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vin-supply = <&vcc_5v0_sys_s5>;
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};
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vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_1v1_nldo_s3";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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vin-supply = <&vcc_5v0_sys_s5>;
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};
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vcc5v0_usb30_host1: vcc5v0-usb30-host1 {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_usb30_host1";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc_5v0_sys_s5>;
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enable-active-high;
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gpio = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&usb_host_pwren>;
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};
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// vcc5v0_usb_otg0: vcc5v0-usb-otg0 {
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// compatible = "regulator-fixed";
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// regulator-name = "vcc5v0_usb_otg0";
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// regulator-boot-on;
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// regulator-always-on;
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// regulator-min-microvolt = <5000000>;
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// regulator-max-microvolt = <5000000>;
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// vin-supply = <&vcc_5v0_sys_s5>;
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// enable-active-high;
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// gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
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// pinctrl-names = "default";
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// pinctrl-0 = <&usb_otg_pwren>;
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// };
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vcc_3v3_sd: vcc-3v3-sd {
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compatible = "regulator-fixed";
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regulator-name = "vcc_3v3_sd";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc_3v3_s3>;
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enable-active-high;
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gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&sd_pwren>;
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};
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vcc_3v3_pcie: vcc-3v3-pcie {
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compatible = "regulator-fixed";
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regulator-name = "vcc_3v3_pcie";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc_5v0_sys_s5>;
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enable-active-high;
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gpio = <&gpio2 RK_PC7 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_pwren>;
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};
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vcc_3v3_s0: vcc-3v3-s0 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_3v3_s0";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc_3v3_s3>;
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};
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vcc3v3_lcd_n: vcc3v3-lcd0-n {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_lcd0_n";
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regulator-boot-on;
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enable-active-high;
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gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc_3v3_s0>;
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};
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wireless_bluetooth: wireless-bluetooth {
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compatible = "bluetooth-platdata";
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uart_rts-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default", "rts_gpio";
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pinctrl-0 = <&uart7m0_rtsn>, <&bt_reset_gpio>, <&bt_host_wake_irq>, <&bt_wake_gpio>;
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pinctrl-1 = <&uart7_gpios>;
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BT,reset-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
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BT,wake-gpios = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
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BT,wake_host-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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wireless_wlan: wireless-wlan {
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compatible = "wlan-platdata";
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wifi_chip_type = "ap6275p";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_host_wake_irq>;
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WIFI,host_wake-gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
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// WIFI,poweren-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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};
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&combphy0_ps {
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status = "okay";
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};
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&combphy1_psu {
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status = "okay";
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};
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&cpu_l0 {
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cpu-supply = <&vdd_cpu_lit_s0>;
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};
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&cpu_b0 {
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cpu-supply = <&vdd_cpu_big_s0>;
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};
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&display_subsystem {
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clocks = <&hdptxphy_hdmi>;
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clock-names = "hdmi0_phy_pll";
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};
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&dsi {
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status = "disabled";
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//rockchip,lane-rate = <1000>;
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dsi_panel: panel@0 {
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status = "okay";
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compatible = "simple-panel-dsi";
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reg = <0>;
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power-supply = <&vcc3v3_lcd_n>;
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backlight = <&backlight>;
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reset-delay-ms = <10>;
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enable-delay-ms = <10>;
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prepare-delay-ms = <10>;
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unprepare-delay-ms = <10>;
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disable-delay-ms = <60>;
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width-mm = <68>;
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height-mm = <121>;
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dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
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MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_NO_EOT_PACKET)>;
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dsi,format = <MIPI_DSI_FMT_RGB888>;
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dsi,lanes = <4>;
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panel-init-sequence = [
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23 00 02 FE 21
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23 00 02 04 00
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23 00 02 00 64
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23 00 02 2A 00
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23 00 02 26 64
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23 00 02 54 00
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23 00 02 50 64
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23 00 02 7B 00
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23 00 02 77 64
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23 00 02 A2 00
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23 00 02 9D 64
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23 00 02 C9 00
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23 00 02 C5 64
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23 00 02 01 71
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23 00 02 27 71
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23 00 02 51 71
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23 00 02 78 71
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23 00 02 9E 71
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23 00 02 C6 71
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23 00 02 02 89
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23 00 02 28 89
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23 00 02 52 89
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23 00 02 79 89
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23 00 02 9F 89
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23 00 02 C7 89
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23 00 02 03 9E
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23 00 02 29 9E
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23 00 02 53 9E
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23 00 02 7A 9E
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23 00 02 A0 9E
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23 00 02 C8 9E
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23 00 02 09 00
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23 00 02 05 B0
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23 00 02 31 00
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23 00 02 2B B0
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23 00 02 5A 00
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23 00 02 55 B0
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23 00 02 80 00
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23 00 02 7C B0
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23 00 02 A7 00
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23 00 02 A3 B0
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23 00 02 CE 00
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23 00 02 CA B0
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23 00 02 06 C0
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23 00 02 2D C0
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23 00 02 56 C0
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23 00 02 7D C0
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23 00 02 A4 C0
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23 00 02 CB C0
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23 00 02 07 CF
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23 00 02 2F CF
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23 00 02 58 CF
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23 00 02 7E CF
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23 00 02 A5 CF
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23 00 02 CC CF
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23 00 02 08 DD
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23 00 02 30 DD
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23 00 02 59 DD
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23 00 02 7F DD
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23 00 02 A6 DD
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23 00 02 CD DD
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23 00 02 0E 15
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23 00 02 0A E9
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23 00 02 36 15
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23 00 02 32 E9
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23 00 02 5F 15
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23 00 02 5B E9
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23 00 02 85 15
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23 00 02 81 E9
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23 00 02 AD 15
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23 00 02 A9 E9
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23 00 02 D3 15
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23 00 02 CF E9
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23 00 02 0B 14
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23 00 02 33 14
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23 00 02 5C 14
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23 00 02 82 14
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23 00 02 AA 14
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23 00 02 D0 14
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23 00 02 0C 36
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23 00 02 34 36
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23 00 02 5D 36
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23 00 02 83 36
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23 00 02 AB 36
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23 00 02 D1 36
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23 00 02 0D 6B
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23 00 02 35 6B
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23 00 02 5E 6B
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23 00 02 84 6B
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23 00 02 AC 6B
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23 00 02 D2 6B
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23 00 02 13 5A
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23 00 02 0F 94
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23 00 02 3B 5A
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23 00 02 37 94
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23 00 02 64 5A
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23 00 02 60 94
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23 00 02 8A 5A
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23 00 02 86 94
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23 00 02 B2 5A
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23 00 02 AE 94
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23 00 02 D8 5A
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23 00 02 D4 94
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23 00 02 10 D1
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23 00 02 38 D1
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23 00 02 61 D1
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23 00 02 87 D1
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23 00 02 AF D1
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23 00 02 D5 D1
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23 00 02 11 04
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23 00 02 39 04
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23 00 02 62 04
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23 00 02 88 04
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23 00 02 B0 04
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23 00 02 D6 04
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23 00 02 12 05
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23 00 02 3A 05
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23 00 02 63 05
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23 00 02 89 05
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23 00 02 B1 05
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23 00 02 D7 05
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23 00 02 18 AA
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23 00 02 14 36
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23 00 02 42 AA
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23 00 02 3D 36
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23 00 02 69 AA
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23 00 02 65 36
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23 00 02 8F AA
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23 00 02 8B 36
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23 00 02 B7 AA
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23 00 02 B3 36
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23 00 02 DD AA
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23 00 02 D9 36
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23 00 02 15 74
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23 00 02 3F 74
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23 00 02 66 74
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23 00 02 8C 74
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23 00 02 B4 74
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23 00 02 DA 74
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23 00 02 16 9F
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23 00 02 40 9F
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23 00 02 67 9F
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23 00 02 8D 9F
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23 00 02 B5 9F
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23 00 02 DB 9F
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23 00 02 17 DC
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23 00 02 41 DC
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23 00 02 68 DC
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23 00 02 8E DC
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23 00 02 B6 DC
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23 00 02 DC DC
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23 00 02 1D FF
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23 00 02 19 03
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23 00 02 47 FF
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23 00 02 43 03
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23 00 02 6E FF
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23 00 02 6A 03
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23 00 02 94 FF
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23 00 02 90 03
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23 00 02 BC FF
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23 00 02 B8 03
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23 00 02 E2 FF
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23 00 02 DE 03
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23 00 02 1A 35
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23 00 02 44 35
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23 00 02 6B 35
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23 00 02 91 35
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23 00 02 B9 35
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23 00 02 DF 35
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23 00 02 1B 45
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23 00 02 45 45
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23 00 02 6C 45
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23 00 02 92 45
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23 00 02 BA 45
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23 00 02 E0 45
|
|
23 00 02 1C 55
|
|
23 00 02 46 55
|
|
23 00 02 6D 55
|
|
23 00 02 93 55
|
|
23 00 02 BB 55
|
|
23 00 02 E1 55
|
|
23 00 02 22 FF
|
|
23 00 02 1E 68
|
|
23 00 02 4C FF
|
|
23 00 02 48 68
|
|
23 00 02 73 FF
|
|
23 00 02 6F 68
|
|
23 00 02 99 FF
|
|
23 00 02 95 68
|
|
23 00 02 C1 FF
|
|
23 00 02 BD 68
|
|
23 00 02 E7 FF
|
|
23 00 02 E3 68
|
|
23 00 02 1F 7E
|
|
23 00 02 49 7E
|
|
23 00 02 70 7E
|
|
23 00 02 96 7E
|
|
23 00 02 BE 7E
|
|
23 00 02 E4 7E
|
|
23 00 02 20 97
|
|
23 00 02 4A 97
|
|
23 00 02 71 97
|
|
23 00 02 97 97
|
|
23 00 02 BF 97
|
|
23 00 02 E5 97
|
|
23 00 02 21 B5
|
|
23 00 02 4B B5
|
|
23 00 02 72 B5
|
|
23 00 02 98 B5
|
|
23 00 02 C0 B5
|
|
23 00 02 E6 B5
|
|
23 00 02 25 F0
|
|
23 00 02 23 E8
|
|
23 00 02 4F F0
|
|
23 00 02 4D E8
|
|
23 00 02 76 F0
|
|
23 00 02 74 E8
|
|
23 00 02 9C F0
|
|
23 00 02 9A E8
|
|
23 00 02 C4 F0
|
|
23 00 02 C2 E8
|
|
23 00 02 EA F0
|
|
23 00 02 E8 E8
|
|
23 00 02 24 FF
|
|
23 00 02 4E FF
|
|
23 00 02 75 FF
|
|
23 00 02 9B FF
|
|
23 00 02 C3 FF
|
|
23 00 02 E9 FF
|
|
23 00 02 FE 3D
|
|
23 00 02 00 04
|
|
23 00 02 FE 23
|
|
23 00 02 08 82
|
|
23 00 02 0A 00
|
|
23 00 02 0B 00
|
|
23 00 02 0C 01
|
|
23 00 02 16 00
|
|
23 00 02 18 02
|
|
23 00 02 1B 04
|
|
23 00 02 19 04
|
|
23 00 02 1C 81
|
|
23 00 02 1F 00
|
|
23 00 02 20 03
|
|
23 00 02 23 04
|
|
23 00 02 21 01
|
|
23 00 02 54 63
|
|
23 00 02 55 54
|
|
23 00 02 6E 45
|
|
23 00 02 6D 36
|
|
23 00 02 FE 3D
|
|
23 00 02 55 78
|
|
23 00 02 FE 20
|
|
23 00 02 26 30
|
|
23 00 02 FE 3D
|
|
23 00 02 20 71
|
|
23 00 02 50 8F
|
|
23 00 02 51 8F
|
|
23 00 02 FE 00
|
|
23 00 02 35 00
|
|
05 78 01 11
|
|
05 00 01 29
|
|
];
|
|
|
|
panel-exit-sequence = [
|
|
05 00 01 28
|
|
05 00 01 10
|
|
];
|
|
|
|
disp_timings0: display-timings {
|
|
native-mode = <&dsi_timing0>;
|
|
dsi_timing0: timing0 {
|
|
clock-frequency = <132000000>;
|
|
hactive = <1080>;
|
|
vactive = <1920>;
|
|
hfront-porch = <15>;
|
|
hsync-len = <4>;
|
|
hback-porch = <30>;
|
|
vfront-porch = <15>;
|
|
vsync-len = <2>;
|
|
vback-porch = <15>;
|
|
hsync-active = <0>;
|
|
vsync-active = <0>;
|
|
de-active = <0>;
|
|
pixelclk-active = <0>;
|
|
};
|
|
};
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
panel_in_dsi: endpoint {
|
|
remote-endpoint = <&dsi_out_panel>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
dsi_out_panel: endpoint {
|
|
remote-endpoint = <&panel_in_dsi>;
|
|
};
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
&dsi_in_vp0 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&dsi_in_vp1 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&dsi_in_vp2 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&dsi_in_vopl {
|
|
status = "disabled";
|
|
};
|
|
|
|
&gmac0 {
|
|
/* Use rgmii-rxid mode to disable rx delay inside Soc */
|
|
phy-mode = "rgmii-rxid";
|
|
clock_in_out = "output";
|
|
|
|
snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
|
|
snps,reset-active-low;
|
|
/* Reset time is 20ms, 100ms for rtl8211f */
|
|
snps,reset-delays-us = <0 20000 100000>;
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <ð0m0_miim
|
|
ð0m0_tx_bus2
|
|
ð0m0_rx_bus2
|
|
ð0m0_rgmii_clk
|
|
ð0m0_rgmii_bus
|
|
ðm0_clk0_25m_out>;
|
|
|
|
tx_delay = <0x21>;
|
|
/* rx_delay = <0x3f>; */
|
|
|
|
phy-handle = <&rgmii_phy0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&gmac1 {
|
|
/* Use rgmii-rxid mode to disable rx delay inside Soc */
|
|
phy-mode = "rgmii-rxid";
|
|
clock_in_out = "output";
|
|
|
|
snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
|
|
snps,reset-active-low;
|
|
/* Reset time is 20ms, 100ms for rtl8211f */
|
|
snps,reset-delays-us = <0 20000 100000>;
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <ð1m1_miim
|
|
ð1m1_tx_bus2
|
|
ð1m1_rx_bus2
|
|
ð1m1_rgmii_clk
|
|
ð1m1_rgmii_bus
|
|
ðm1_clk1_25m_out>;
|
|
|
|
tx_delay = <0x22>;
|
|
/* rx_delay = <0x3f>; */
|
|
|
|
phy-handle = <&rgmii_phy1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&gpu {
|
|
mali-supply = <&vdd_gpu_s0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&hdmi {
|
|
status = "okay";
|
|
enable-gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
|
|
rockchip,sda-falling-delay-ns = <360>;
|
|
};
|
|
|
|
&hdmi_in_vp0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&hdptxphy_hdmi {
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c0 {
|
|
pinctrl-0 = <&i2c0m1_xfer>;
|
|
status = "okay";
|
|
|
|
gt1x: gt1x@14 {
|
|
status = "okay";
|
|
compatible = "goodix,gt1x";
|
|
reg = <0x14>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&touch_gpio>;
|
|
goodix,rst-gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
|
|
goodix,irq-gpio = <&gpio0 RK_PC5 IRQ_TYPE_LEVEL_LOW>;
|
|
power-supply = <&vcc3v3_lcd_n>;
|
|
};
|
|
|
|
hynitron: hynitron@5a {
|
|
status = "okay";
|
|
compatible = "hyn,3240";
|
|
reg = <0x5a>;
|
|
power-supply = <&vcc3v3_lcd_n>;
|
|
|
|
pinctrl-names = "ts_active","ts_suspend";
|
|
pinctrl-0 = <&ts_int_active &ts_reset_active>;
|
|
pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
|
|
|
|
reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
|
|
irq-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>;
|
|
|
|
max-touch-number = <5>;
|
|
display-coords = <0 0 1080 1920>;
|
|
pos-swap = <0>;
|
|
posx-reverse = <0>;
|
|
posy-reverse = <0>;
|
|
};
|
|
};
|
|
|
|
&i2c1 {
|
|
status = "okay";
|
|
|
|
rk806: pmic@23 {
|
|
compatible = "rockchip,rk806";
|
|
reg = <0x23>;
|
|
|
|
interrupt-parent = <&gpio0>;
|
|
interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
|
|
|
|
pinctrl-names = "default", "pmic-power-off";
|
|
pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, <&rk806_dvs2_null>, <&rk806_dvs3_null>;
|
|
pinctrl-1 = <&rk806_dvs1_pwrdn>;
|
|
|
|
/* 2800mv-3500mv */
|
|
low_voltage_threshold = <3000>;
|
|
/* 2700mv-3400mv */
|
|
shutdown_voltage_threshold = <2700>;
|
|
/* 140 160 */
|
|
shutdown_temperture_threshold = <160>;
|
|
hotdie_temperture_threshold = <115>;
|
|
|
|
/* PWRON_ON_TIME: 0:500mS; 1:20mS */
|
|
pwron-on-time-500ms;
|
|
|
|
/* 0: restart PMU;
|
|
* 1: reset all the power off reset registers,
|
|
* forcing the state to switch to ACTIVE mode;
|
|
* 2: Reset all the power off reset registers,
|
|
* forcing the state to switch to ACTIVE mode,
|
|
* and simultaneously pull down the RESETB PIN for 5mS before releasing
|
|
*/
|
|
pmic-reset-func = <1>;
|
|
/* buck5 external feedback resister disable */
|
|
buck5-feedback-disable;
|
|
|
|
vcc1-supply = <&vcc_5v0_sys_s5>;
|
|
vcc2-supply = <&vcc_5v0_sys_s5>;
|
|
vcc3-supply = <&vcc_5v0_sys_s5>;
|
|
vcc4-supply = <&vcc_5v0_sys_s5>;
|
|
vcc5-supply = <&vcc_5v0_sys_s5>;
|
|
vcc6-supply = <&vcc_5v0_sys_s5>;
|
|
vcc7-supply = <&vcc_5v0_sys_s5>;
|
|
vcc8-supply = <&vcc_5v0_sys_s5>;
|
|
vcc9-supply = <&vcc_5v0_sys_s5>;
|
|
vcc10-supply = <&vcc_5v0_sys_s5>;
|
|
vcc11-supply = <&vcc_2v0_pldo_s3>;
|
|
vcc12-supply = <&vcc_5v0_sys_s5>;
|
|
vcc13-supply = <&vcc_1v1_nldo_s3>;
|
|
vcc14-supply = <&vcc_1v1_nldo_s3>;
|
|
vcca-supply = <&vcc_5v0_sys_s5>;
|
|
|
|
pwrkey {
|
|
status = "okay";
|
|
};
|
|
|
|
pinctrl_rk806: pinctrl_rk806 {
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
|
|
rk806_dvs1_null: rk806_dvs1_null {
|
|
pins = "gpio_pwrctrl2";
|
|
function = "pin_fun0";
|
|
};
|
|
|
|
rk806_dvs1_slp: rk806_dvs1_slp {
|
|
pins = "gpio_pwrctrl1";
|
|
function = "pin_fun1";
|
|
};
|
|
|
|
rk806_dvs1_pwrdn: rk806_dvs1_pwrdn {
|
|
pins = "gpio_pwrctrl1";
|
|
function = "pin_fun2";
|
|
};
|
|
|
|
rk806_dvs1_rst: rk806_dvs1_rst {
|
|
pins = "gpio_pwrctrl1";
|
|
function = "pin_fun3";
|
|
};
|
|
|
|
rk806_dvs2_null: rk806_dvs2_null {
|
|
pins = "gpio_pwrctrl2";
|
|
function = "pin_fun0";
|
|
};
|
|
|
|
rk806_dvs2_slp: rk806_dvs2_slp {
|
|
pins = "gpio_pwrctrl2";
|
|
function = "pin_fun1";
|
|
};
|
|
|
|
rk806_dvs2_pwrdn: rk806_dvs2_pwrdn {
|
|
pins = "gpio_pwrctrl2";
|
|
function = "pin_fun2";
|
|
};
|
|
|
|
rk806_dvs2_rst: rk806_dvs2_rst {
|
|
pins = "gpio_pwrctrl2";
|
|
function = "pin_fun3";
|
|
};
|
|
|
|
rk806_dvs2_dvs: rk806_dvs2_dvs {
|
|
pins = "gpio_pwrctrl2";
|
|
function = "pin_fun4";
|
|
};
|
|
|
|
rk806_dvs2_gpio: rk806_dvs2_gpio {
|
|
pins = "gpio_pwrctrl2";
|
|
function = "pin_fun5";
|
|
};
|
|
|
|
rk806_dvs3_null: rk806_dvs3_null {
|
|
pins = "gpio_pwrctrl3";
|
|
function = "pin_fun0";
|
|
};
|
|
|
|
rk806_dvs3_slp: rk806_dvs3_slp {
|
|
pins = "gpio_pwrctrl3";
|
|
function = "pin_fun1";
|
|
};
|
|
|
|
rk806_dvs3_pwrdn: rk806_dvs3_pwrdn {
|
|
pins = "gpio_pwrctrl3";
|
|
function = "pin_fun2";
|
|
};
|
|
|
|
rk806_dvs3_rst: rk806_dvs3_rst {
|
|
pins = "gpio_pwrctrl3";
|
|
function = "pin_fun3";
|
|
};
|
|
|
|
rk806_dvs3_dvs: rk806_dvs3_dvs {
|
|
pins = "gpio_pwrctrl3";
|
|
function = "pin_fun4";
|
|
};
|
|
|
|
rk806_dvs3_gpio: rk806_dvs3_gpio {
|
|
pins = "gpio_pwrctrl3";
|
|
function = "pin_fun5";
|
|
};
|
|
};
|
|
|
|
regulators {
|
|
vdd_cpu_big_s0: DCDC_REG1 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-init-microvolt = <850000>;
|
|
regulator-min-microvolt = <550000>;
|
|
regulator-max-microvolt = <950000>;
|
|
regulator-ramp-delay = <12500>;
|
|
regulator-name = "vdd_cpu_big_s0";
|
|
regulator-enable-ramp-delay = <400>;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vdd_npu_s0: DCDC_REG2 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <550000>;
|
|
regulator-max-microvolt = <950000>;
|
|
regulator-ramp-delay = <12500>;
|
|
regulator-name = "vdd_npu_s0";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vdd_cpu_lit_s0: DCDC_REG3 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-init-microvolt = <850000>;
|
|
regulator-min-microvolt = <550000>;
|
|
regulator-max-microvolt = <950000>;
|
|
regulator-ramp-delay = <12500>;
|
|
regulator-name = "vdd_cpu_lit_s0";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
regulator-suspend-microvolt = <750000>;
|
|
};
|
|
};
|
|
|
|
vcc_3v3_s3: DCDC_REG4 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-name = "vcc_3v3_s3";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <3300000>;
|
|
};
|
|
};
|
|
|
|
vdd_gpu_s0: DCDC_REG5 {
|
|
regulator-boot-on;
|
|
regulator-init-microvolt = <750000>;
|
|
regulator-min-microvolt = <550000>;
|
|
regulator-max-microvolt = <900000>;
|
|
regulator-ramp-delay = <12500>;
|
|
regulator-name = "vdd_gpu_s0";
|
|
regulator-enable-ramp-delay = <400>;
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
regulator-suspend-microvolt = <850000>;
|
|
};
|
|
};
|
|
|
|
vddq_ddr_s0: DCDC_REG6 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-name = "vddq_ddr_s0";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vdd_logic_s0: vdd_log_mem_s0: DCDC_REG7 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-init-microvolt = <750000>;
|
|
regulator-min-microvolt = <550000>;
|
|
regulator-max-microvolt = <800000>;
|
|
regulator-name = "vdd_logic_s0";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcc_1v8_s3: DCDC_REG8 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-name = "vcc_1v8_s3";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1800000>;
|
|
};
|
|
};
|
|
|
|
vdd2_ddr_s3: DCDC_REG9 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-name = "vdd2_ddr_s3";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
};
|
|
};
|
|
|
|
vdd_ddr_s0: DCDC_REG10 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <550000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-name = "vdd_ddr_s0";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcca_1v8_s0: PLDO_REG1 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-name = "vcca_1v8_s0";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcc_1v8_cam: PLDO_REG2 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-name = "vcc_1v8_cam";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vdda_1v2_s0: PLDO_REG3 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-name = "vdda_1v2_s0";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcca3v3_codec: PLDO_REG4 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-name = "vcca3v3_codec";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vccio_sd_s0: PLDO_REG5 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-name = "vccio_sd_s0";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcca1v8_pldo6_s3: PLDO_REG6 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-name = "vcca1v8_pldo6_s3";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1800000>;
|
|
};
|
|
};
|
|
|
|
vdd_0v75_s3: NLDO_REG1 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <750000>;
|
|
regulator-max-microvolt = <750000>;
|
|
regulator-name = "vdd_0v75_s3";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <750000>;
|
|
};
|
|
};
|
|
|
|
vdda_ddr_pll_s0: NLDO_REG2 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <850000>;
|
|
regulator-max-microvolt = <850000>;
|
|
regulator-name = "vdda_ddr_pll_s0";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vdda0v75_hdmi_s0: NLDO_REG3 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <750000>;
|
|
regulator-max-microvolt = <750000>;
|
|
regulator-name = "vdda0v75_hdmi_s0";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vdda_0v85_s0: NLDO_REG4 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <850000>;
|
|
regulator-max-microvolt = <850000>;
|
|
regulator-name = "vdda_0v85_s0";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vdda_0v75_s0: NLDO_REG5 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <750000>;
|
|
regulator-max-microvolt = <750000>;
|
|
regulator-name = "vdda_0v75_s0";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c7 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c7m2_xfer>;
|
|
|
|
hym8563: hym8563@51 {
|
|
compatible = "haoyu,hym8563";
|
|
reg = <0x51>;
|
|
#clock-cells = <0>;
|
|
clock-frequency = <32768>;
|
|
clock-output-names = "hym8563";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&rtc_int>;
|
|
|
|
interrupt-parent = <&gpio0>;
|
|
interrupts = <RK_PA0 IRQ_TYPE_LEVEL_LOW>;
|
|
wakeup-source;
|
|
};
|
|
};
|
|
|
|
&iep {
|
|
status = "okay";
|
|
};
|
|
|
|
&iep_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&jpegd {
|
|
status = "okay";
|
|
};
|
|
|
|
&jpege {
|
|
status = "okay";
|
|
};
|
|
|
|
&jpeg_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&mdio0 {
|
|
rgmii_phy0: phy@1 {
|
|
compatible = "ethernet-phy-ieee802.3-c22";
|
|
reg = <0x1>;
|
|
clocks = <&cru REFCLKO25M_GMAC0_OUT>;
|
|
};
|
|
};
|
|
|
|
&mdio1 {
|
|
rgmii_phy1: phy@1 {
|
|
compatible = "ethernet-phy-ieee802.3-c22";
|
|
reg = <0x1>;
|
|
clocks = <&cru REFCLKO25M_GMAC1_OUT>;
|
|
};
|
|
};
|
|
|
|
&mipidcphy0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&mpp_srv {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie0 {
|
|
rockchip,skip-scan-in-resume;
|
|
reset-gpios = <&gpio4 RK_PC7 GPIO_ACTIVE_HIGH>;
|
|
vpcie3v3-supply = <&vcc_3v3_pcie>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pinctrl {
|
|
hym8563 {
|
|
rtc_int: rtc-int {
|
|
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
gpio-leds {
|
|
leds_gpio: leds-gpio {
|
|
rockchip,pins = <3 16 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
pcie {
|
|
pcie_reset_gpio: pcie-reset-gpio {
|
|
rockchip,pins = <4 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
pcie_wake_gpio: pcie-wake-gpio {
|
|
rockchip,pins = <0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
pcie_pwren: pcie-pwren {
|
|
rockchip,pins = <2 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
sd {
|
|
sd_pwren: sd-pwren {
|
|
rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
touch {
|
|
touch_gpio: touch-gpio {
|
|
rockchip,pins =
|
|
<0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>,
|
|
<0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
|
|
ts_int_active: ts_int_active {
|
|
rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
|
|
ts_reset_active: ts_reset_active {
|
|
rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
|
|
ts_int_suspend: ts_int_suspend {
|
|
rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
|
|
ts_reset_suspend: ts_reset_suspend {
|
|
rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
};
|
|
|
|
usb {
|
|
usb_host_pwren: usb-host-pwren {
|
|
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
// usb_otg_pwren: usb-otg-pwren {
|
|
// rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
// };
|
|
};
|
|
|
|
wireless-bluetooth {
|
|
uart7_gpios: uart7-gpios {
|
|
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
bt_host_wake_irq: bt-host-wake-irq {
|
|
rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
bt_reset_gpio: bt-reset-gpio {
|
|
rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
bt_wake_gpio: bt-wake-gpio {
|
|
rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
};
|
|
|
|
wireless-wlan {
|
|
wifi_host_wake_irq: wifi-host-wake-irq {
|
|
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
|
|
wifi_poweren_gpio: wifi-poweren-gpio {
|
|
rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pwm1_6ch_1 {
|
|
status = "okay";
|
|
pinctrl-0 = <&pwm1m0_ch1>;
|
|
};
|
|
|
|
&pwm1_6ch_4 {
|
|
status = "okay";
|
|
pinctrl-0 = <&pwm1m0_ch4>;
|
|
};
|
|
|
|
&rga2_core0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&rga2_core0_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rga2_core1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&rga2_core1_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rknpu {
|
|
rknpu-supply = <&vdd_npu_s0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&rknpu_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvenc_ccu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvenc0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvenc0_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvenc1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvenc1_mmu {
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
&rkvdec {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkvdec_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&route_dsi {
|
|
status = "disabled";
|
|
connect = <&vp1_out_dsi>;
|
|
};
|
|
|
|
&route_hdmi {
|
|
status = "okay";
|
|
connect = <&vp0_out_hdmi>;
|
|
};
|
|
|
|
&sai2 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&sai2m1_lrck
|
|
&sai2m1_sclk
|
|
&sai2m1_sdi
|
|
&sai2m1_sdo>;
|
|
};
|
|
|
|
&saradc {
|
|
status = "okay";
|
|
vref-supply = <&vcca_1v8_s0>;
|
|
};
|
|
|
|
&sdhci {
|
|
bus-width = <8>;
|
|
no-sdio;
|
|
no-sd;
|
|
non-removable;
|
|
max-frequency = <200000000>;
|
|
mmc-hs400-1_8v;
|
|
mmc-hs400-enhanced-strobe;
|
|
full-pwr-cycle-in-suspend;
|
|
status = "okay";
|
|
};
|
|
|
|
&sdio {
|
|
max-frequency = <150000000>;
|
|
no-sd;
|
|
no-mmc;
|
|
bus-width = <4>;
|
|
disable-wp;
|
|
cap-sd-highspeed;
|
|
cap-sdio-irq;
|
|
keep-power-in-suspend;
|
|
mmc-pwrseq = <&sdio_pwrseq>;
|
|
non-removable;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&sdmmc1m1_bus4 &sdmmc1m1_clk &sdmmc1m1_cmd>;
|
|
sd-uhs-sdr104;
|
|
status = "okay";
|
|
};
|
|
|
|
&sdmmc {
|
|
supports-sd;
|
|
status = "okay";
|
|
};
|
|
|
|
&rockchip_suspend {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart7 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart7m0_xfer &uart7m0_ctsn>;
|
|
};
|
|
|
|
&u2phy0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy0_otg {
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy1_otg {
|
|
phy-supply = <&vcc5v0_usb30_host1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&ufs {
|
|
reset-gpios = <&gpio4 RK_PD0 GPIO_ACTIVE_HIGH>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdp_phy {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdp_phy_dp {
|
|
status = "disabled";
|
|
};
|
|
|
|
&usbdp_phy_u3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_drd0_dwc3 {
|
|
dr_mode = "peripheral";
|
|
extcon = <&u2phy0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_drd1_dwc3 {
|
|
dr_mode = "host";
|
|
// extcon = <&u2phy1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&vdpp {
|
|
status = "okay";
|
|
};
|
|
|
|
&vop {
|
|
status = "okay";
|
|
vop-supply = <&vdd_logic_s0>;
|
|
};
|
|
|
|
&vop_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vp2 {
|
|
assigned-clocks = <&cru DCLK_VP2_SRC>;
|
|
assigned-clock-parents = <&cru PLL_VPLL>;
|
|
};
|