0b1e03cc77
Since the PSR feature can help to reduce the power consumption, the Source device, which can support PSR function, should enable PSR if the PSR capability of Sink device is detected rather than depending on the user to add 'support-psr' DTS property manually. Change-Id: I2f51312621f62519f388e06561fb61f01145256b Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
150 lines
2.3 KiB
Plaintext
150 lines
2.3 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2025 Rockchip Electronics Co., Ltd.
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*
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*/
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/dts-v1/;
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#include "rk3576.dtsi"
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#include "rk3576-evb1.dtsi"
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#include "rk3576-evb1-cam-dcphy0.dtsi"
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#include "rk3576-android.dtsi"
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/ {
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model = "Rockchip RK3576 EVB1 V10 Board + RK Ext HDMImale to eDP V10";
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compatible = "rockchip,rk3576-evb1-v10-edp-NE160QAM-NX1", "rockchip,rk3576";
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panel-edp {
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compatible = "simple-panel";
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backlight = <&backlight>;
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prepare-delay-ms = <120>;
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enable-delay-ms = <120>;
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unprepare-delay-ms = <120>;
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disable-delay-ms = <120>;
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display-timings {
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native-mode = <&timing_4kp60>;
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timing_4kp60: timing0 {
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clock-frequency = <587520000>;
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hactive = <3840>;
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vactive = <2400>;
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hfront-porch = <48>;
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hsync-len = <32>;
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hback-porch = <80>;
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vfront-porch = <3>;
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vsync-len = <5>;
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vback-porch = <40>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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timing_4kp120: timing1 {
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clock-frequency = <1175040000>;
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hactive = <3840>;
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vactive = <2400>;
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hfront-porch = <48>;
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hsync-len = <32>;
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hback-porch = <80>;
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vfront-porch = <3>;
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vsync-len = <5>;
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vback-porch = <40>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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};
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port {
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panel_in_edp: endpoint {
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remote-endpoint = <&edp_out_panel>;
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};
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};
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};
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};
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&dp {
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status = "disabled";
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};
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&dp0 {
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status = "disabled";
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};
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&dp0_in_vp2 {
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status = "disabled";
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};
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&dsi {
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status = "disabled";
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};
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&dsi_in_vp1 {
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status = "disabled";
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};
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&edp {
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force-hpd;
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status = "okay";
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ports {
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port@1 {
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reg = <1>;
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edp_out_panel: endpoint {
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remote-endpoint = <&panel_in_edp>;
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};
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};
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};
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};
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&edp_in_vp0 {
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status = "okay";
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};
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&hdmi {
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status = "disabled";
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};
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&hdmi_in_vp0 {
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status = "disabled";
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};
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&hdmi_sound {
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status = "disabled";
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};
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&hdptxphy {
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status = "okay";
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};
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&hdptxphy_hdmi {
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status = "disabled";
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};
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&route_dsi {
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status = "disabled";
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};
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&route_edp {
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status = "okay";
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connect = <&vp0_out_edp>;
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};
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&route_hdmi {
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status = "disabled";
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};
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&vp0 {
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assigned-clocks = <&cru DCLK_VP0_SRC>;
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assigned-clock-parents = <&cru PLL_VPLL>;
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};
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&vp2 {
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/delete-property/ assigned-clocks;
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/delete-property/ assigned-clock-parents;
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};
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