Tao Huang
d4ae9d6ea7
Merge commit '40fac1a66ccf61bdf3afb70c18a5db7791410b22'
...
* commit '40fac1a66ccf61bdf3afb70c18a5db7791410b22': (220 commits)
Revert "tee: optee: interrupt an RPC when supplicant has been killed"
Revert "tee: optee: interrupt an RPC depend on shutdown flag"
arm64: dts: rockchip: rv1126bp-evb-v14: Adjust the matching voltage
media: rockchip: aiisp: delete one temp buffer to reduce memory
media: rockchip: isp: mp output buf notice to aiisp
media: rockchip: aiisp: modify for aiynr algo
rtc: rockchip: add ready flag for rtc setting time
soc: rockchip: cpuinfo: export chip unique id to userspace
media: rockchip: vpss: offline mode support auto unite output
drm/rockchip: vop2: Add "DIMMING_DATA" property for local dimming
media: rockchip: isp: aiisp switch for offline mode
media: rockchip: isp: aiisp switch for isp35
media: rockchip: isp: support aiisp yuv mode
input: touchscreen: gt1x: prefix global variables and functions with "gt1x_"
MALI: valhall: add gpu mem sysfs entry
drm/rockchip: Make the DRM panel as part of Rockchip DRM sub devices for panel loader protect
drm/rockchip: Pass struct rockchip_drm_sub_dev for &rockchip_drm_sub_dev.loader_protect()
pwm: rockchip: Add &rockchip_pwm_chip.oneshot_valid to indicate validity of configurations
pwm: rockchip: Add comments for why to add delay before disabling the dclk for PWM v4
input: touchscreen: hyn: reduce logs
...
Change-Id: I1b562efca0842173010b2506231d7200a5116e5a
2025-07-29 17:16:09 +08:00
Tao Huang
3db0398805
ARM: dts: rockchip: rockchip_headset: switch to using gpiod API
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sed -i \
-e 's/headset_gpio/headset-gpios/' \
-e 's/hook_gpio/hook-gpios/' \
$(git grep --name-only '"rockchip_headset"' arch/arm/boot/dts/rockchip/)
Change-Id: I9abfb77b04195c7b5af717c7a9be83b895287fc9
Signed-off-by: Tao Huang <huangtao@rock-chips.com >
2025-07-25 17:16:13 +08:00
Tao Huang
1ea51e4cb9
ARM: dts: rockchip: rfkill switch to use gpiod
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sed -i \
-e 's/uart_rts_gpios/uart_rts-gpios/' \
-e 's/BT,power_gpio/BT,power-gpios/' \
-e 's/BT,reset_gpio/BT,reset-gpios/' \
-e 's/BT,wake_gpio/BT,wake-gpios/' \
-e 's/BT,wake_host_irq/BT,wake_host-gpios/' \
-e 's/WIFI,poweren_gpio/WIFI,poweren-gpios/' \
-e 's/WIFI,vbat_gpio/WIFI,vbat-gpios/' \
-e 's/WIFI,reset_gpio/WIFI,reset-gpios/' \
-e 's/WIFI,host_wake_irq/WIFI,host_wake-gpios/' \
(git ls-files arch/arm/boot/dts/rockchip/)
Change-Id: Ie90f519e0281a297202fd76c92c94859cc93f6e0
Signed-off-by: Tao Huang <huangtao@rock-chips.com >
2025-07-25 12:22:58 +08:00
Wu Liangqing
d9599b3245
ARM: dts: rockchip: rk3288-evb: gsl3673 adapt to the gpiod API
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Change-Id: I01cae6ced5c8841deac65edf457f8b89a93e09ab
Signed-off-by: Wu Liangqing <wlq@rock-chips.com >
2025-07-25 12:16:43 +08:00
Tao Huang
72101c82b8
Merge commit '3a8b94c5be2ca4a2a9dd5916074e2f466ebcc57f'
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* commit '3a8b94c5be2ca4a2a9dd5916074e2f466ebcc57f': (873 commits)
arm64: dts: rockchip: rv1126b: Remove dma for i2c0, i2c4 and i2c5
dt-bindings: i2c: rockchip: add rockchip,rv1126b-i2c
i2c: rk3x: Add dma feature
arm64: dts: rockchip: rv1126b-evb: Change clock rates to 24M for fephy
ethernet: stmmac: dwmac-rk: Correct clock input/output sel for RV1126B
net: phy: rockchip-fephy: Add param to access group registers
net: phy: rockchip-fephy: Fix for the correct names
net: phy: rockchip-fephy: Add 24M clock rate setting
net: phy: rockchip-fephy: Change off-energy level0 threshold between link up/down
power: supply: rk817_battery: Supports battery aging calibration
power: supply: rk817_battery: Supporting battery charging with JEITA standards
drm/rockchip: vop2: update cluster fbc xoffset check rule
arm64: dts: rockchip: rk3576: Add customer demand nvmem cell for opp table
driver: rknpu: Add opp data for rk3576s
MALI: bifrost: Add opp data for rk3576s
cpufreq: rockchip: Add opp data for rk3576s
media: rockchip: isp: support wrap stream latter for isp35
arm64: dts: rockchip: rv1126b-pinctrl: update i2c config
arm64: dts: rockchip: rk3588: Adjust the HDMITX1 DDC M0 IO driver strength
media: rockchip: vicap add soft reset before start stream
...
Change-Id: I6973bf32974c14f06231e1e87f7da24a321efa22
2025-07-24 19:38:29 +08:00
Tao Huang
e5cfe280bc
ARM: dts: rockchip: Move rk3128.dtsi to rockchip subdirectory
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Change-Id: Icf41123c28406fe4b00b98fbce41215cfc9bb53b
Signed-off-by: Tao Huang <huangtao@rock-chips.com >
2025-07-23 19:39:12 +08:00
Tao Huang
2daab06426
ARM: dts: rockchip: rk312x: Sync with upstream v6.12 rk3128.dtsi
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Change-Id: Ida6c45b56245fdd900568ca42249d757853d1082
Signed-off-by: Tao Huang <huangtao@rock-chips.com >
2025-07-23 19:39:12 +08:00
Tao Huang
f516221c76
ARM: dts: rockchip: Move rv1126.dtsi to rockchip subdirectory
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Change-Id: Ic7cbdf82c2a6be405100a85fe396bf2dfe9f9d9a
Signed-off-by: Tao Huang <huangtao@rock-chips.com >
2025-07-23 19:39:12 +08:00
Tao Huang
9897e5e073
ARM: dts: rockchip: Move rv1126-pinctrl.dtsi to rockchip subdirectory
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Change-Id: I03deb44732e8b224dbd253fd1d93aa21043f2962
Signed-off-by: Tao Huang <huangtao@rock-chips.com >
2025-07-23 19:39:12 +08:00
Tao Huang
ad57250f94
ARM: dts: rockchip: Move .dts files to rockchip subdirectory
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According to commit 724ba67515 ("ARM: dts: Move .dts files to vendor sub-directories").
Signed-off-by: Tao Huang <huangtao@rock-chips.com >
Change-Id: I3a8da8240526c0f0d8114b591a5143d851ffac5b
2025-07-23 19:39:12 +08:00
Tao Huang
aa65b81218
Merge commit '62646c7ab19511b8fc17078cf4b0603e550e73cd'
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* commit '62646c7ab19511b8fc17078cf4b0603e550e73cd': (119202 commits)
clk: rockchip: Fix missing rkclk_cpuclk_div_setting prototype for rk3128
rtc: rk808: Explicitly include of.h for of_get_child_by_name
ASoC: rk817: Explicitly include gpio/consumer.h for devm_gpiod_get_optional
drm/rockchip: dsi2: add crtc post enable and pre disable callback
drm/rockchip: vop2: set dsc config done in crtc post enable
input: sensors: avoid -Wempty-body warning
input: sensors: accel: dmard10: Make gsensor_reset() static
ASoC: rk312x: Fix missing prototypes
arm64: dts: rockchip: rk3518: Add rockchip,video-1080p-freq for cpu opp table
soc: rockchip: system_monitor: Add support to limit cpu max freq when play 1080p video
net: phy: Convert to use sysfs_emit_at() API
drm/rockchip: dw_hdmi: Explicitly include pinctrl/consumer.h for devm_pinctrl_get
net: rfkill: bt: Explicitly include pinctrl/consumer.h for pinctrl_select_state
ASoC: codecs: rk_dsm: Explicitly include pinctrl/consumer.h for devm_pinctrl_get
spi: rockchip-slave: Explicitly include pinctrl/consumer.h for pinctrl_pm_select_sleep_state
media: rockchip: isp: Explicitly include platform_device.h
regulator: rk801: Explicitly include platform_device.h
soc: rockchip: decompress: Explicitly include of_platform.h for of_platform_device_create
soc: rockchip: thunderboot_mmc: Explicitly include of_platform.h for of_platform_device_create
soc: rockchip: thunderboot_sfc: Explicitly include of_platform.h for of_platform_device_create
...
Change-Id: I88628746fa5e58f85cf991634fe2f6355ac937e8
2025-07-17 15:26:12 +08:00
Johan Jonker
9e5e41f63a
ARM: dts: rockchip: fix rk3036 hdmi ports node
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[ Upstream commit 27ded76ef0fcfcf939914532aae575cf23c221b4 ]
Fix hdmi ports node so that it matches the
rockchip,inno-hdmi.yaml binding.
Signed-off-by: Johan Jonker <jbx6244@gmail.com >
Link: https://lore.kernel.org/r/9a2afac1-ed5c-382d-02b0-b2f5f1af3abb@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de >
Signed-off-by: Sasha Levin <sashal@kernel.org >
2024-02-05 20:14:22 +00:00
Alex Bee
a7fb9f15fe
ARM: dts: rockchip: Fix sdmmc_pwren's pinmux setting for RK3128
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[ Upstream commit 0c349b5001f8bdcead844484c15a0c4dfb341157 ]
RK3128's reference design uses sdmmc_pwren pincontrol as GPIO - see [0].
Let's change it in the SoC DT as well.
[0] https://github.com/rockchip-linux/kernel/commit/8c62deaf6025
Fixes: a0201bff62 ("ARM: dts: rockchip: add rk3128 soc dtsi")
Signed-off-by: Alex Bee <knaerzche@gmail.com >
Link: https://lore.kernel.org/r/20231127184643.13314-2-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de >
Signed-off-by: Sasha Levin <sashal@kernel.org >
2023-12-13 18:45:14 +01:00
Alex Bee
2c68d26f07
ARM: dts: rockchip: Fix timer clocks for RK3128
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Currently the Rockchip timer source clocks are set to xin24 for no obvious
reason and the actual timer clocks (SCLK_TIMER*) will get disabled during
boot process as they have no user. That will make the SoC stuck as no timer
source exists.
Fixes: a0201bff62 ("ARM: dts: rockchip: add rk3128 soc dtsi")
Signed-off-by: Alex Bee <knaerzche@gmail.com >
Link: https://lore.kernel.org/r/20230829203721.281455-12-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de >
2023-10-04 23:23:38 +02:00
Alex Bee
b0b4e97878
ARM: dts: rockchip: Add missing quirk for RK3128's dma engine
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Like most other Rockchip ARM SoCs, the PL330 needs the
arm,pl330-periph-burst quirk in order to work as expected.
Add it.
Fixes: a0201bff62 ("ARM: dts: rockchip: add rk3128 soc dtsi")
Signed-off-by: Alex Bee <knaerzche@gmail.com >
Link: https://lore.kernel.org/r/20230829203721.281455-10-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de >
2023-10-04 23:23:38 +02:00
Alex Bee
7e3be9ea29
ARM: dts: rockchip: Add missing arm timer interrupt for RK3128
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The Cortex-A7 timer has 4 interrupts.
Add the missing one.
Fixes: a0201bff62 ("ARM: dts: rockchip: add rk3128 soc dtsi")
Signed-off-by: Alex Bee <knaerzche@gmail.com >
Link: https://lore.kernel.org/r/20230829203721.281455-8-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de >
2023-10-04 23:23:38 +02:00
Alex Bee
2e9cbc4167
ARM: dts: rockchip: Fix i2c0 register address for RK3128
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The register address for i2c0 is missing a 0x to mark it as hex.
Fixes: a0201bff62 ("ARM: dts: rockchip: add rk3128 soc dtsi")
Signed-off-by: Alex Bee <knaerzche@gmail.com >
Link: https://lore.kernel.org/r/20230829203721.281455-6-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de >
2023-10-04 23:23:38 +02:00
Jagan Teki
1bf0dcb1e2
ARM: dts: rockchip: Add rv1126 VOP_LITE support
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RV1126 VOP_LITE supports the video output processing ofMIPI DSI,
RGB display interfaces with max output resolution of 1920x1080.
Add support for vop in rv1126.
Signed-off-by: Jagan Teki <jagan@edgeble.ai >
Link: https://lore.kernel.org/r/20230731110012.2913742-11-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de >
2023-08-12 14:59:15 +02:00
Jagan Teki
4fafaed5af
ARM: dts: rockchip: Add rv1126 PD_VO entry
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PD_VO power-domain tree diagram in RV1126 is connected to
- BIU_VO
- VOP
- RGA
- IEP
- DSIHOST
Add PD_VO power-domain entry in RV1126.
Signed-off-by: Jagan Teki <jagan@edgeble.ai >
Link: https://lore.kernel.org/r/20230731110012.2913742-10-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de >
2023-08-12 14:59:14 +02:00
Jagan Teki
c991ed9f57
ARM: dts: rockchip: Add 12V main supply for edgeble-neu2
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The Main supply volatge for Edgeble Neu2 IO board is 12V DC.
Add the 12v supply regulator for it and input to vcc5v0_sys.
Since the power regulator is part of IO board circuit, move the
regulator in IO dts file.
Signed-off-by: Jagan Teki <jagan@edgeble.ai >
Link: https://lore.kernel.org/r/20230731103518.2906147-14-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de >
2023-08-10 22:41:55 +02:00
Jagan Teki
5d1d164da4
ARM: dts: rockchip: Add 3V3_SYS regulator for edgeble-neu2
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Edgeble Neu2 IO board has 3V3_SYS regulator to power Audio, RS485,
and 4G Module.
Add regulator for it.
Signed-off-by: Jagan Teki <jagan@edgeble.ai >
Link: https://lore.kernel.org/r/20230731103518.2906147-13-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de >
2023-08-10 22:41:55 +02:00
Stephen Chen
f544630dc4
ARM: dts: rockchip: Enable SFC for edgeble-neu2
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Enable on module SPI Flash present in Edgeble Neu2.
Tested-by: Jagan Teki <jagan@edgeble.ai >
Signed-off-by: Stephen Chen <stephen@radxa.com >
Link: https://lore.kernel.org/r/20230731103518.2906147-12-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de >
2023-08-10 22:41:55 +02:00
Jagan Teki
012f90c31b
ARM: dts: rockchip: Drop EMMC_RSTN for edgeble-neu2
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EMMC_RSTN GPIO1_A3 is connected to FSPI_CLK in Edgeble Neu2
board.
So, drop the same GPIO pin from eMMC.
Signed-off-by: Jagan Teki <jagan@edgeble.ai >
Link: https://lore.kernel.org/r/20230731103518.2906147-11-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de >
2023-08-10 22:41:54 +02:00
Jagan Teki
753c8a7d8b
ARM: dts: rockchip: Add rv1126 uart5m2_xfer pins
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Add uart5m2_xfer pins for Rockchip RV1126 uart5.
Signed-off-by: Jagan Teki <jagan@edgeble.ai >
Link: https://lore.kernel.org/r/20230731103518.2906147-9-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de >
2023-08-10 22:41:54 +02:00
Jagan Teki
d91d25b1db
ARM: dts: rockchip: Add rv1126 FSPI pins
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Add fspi pins for rv1126 sfc controller.
Signed-off-by: Jagan Teki <jagan@edgeble.ai >
Link: https://lore.kernel.org/r/20230731103518.2906147-8-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de >
2023-08-10 22:41:54 +02:00
Jagan Teki
c3ae1484e1
ARM: dts: rockchip: Add SFC node to rv1126
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Add Rockchip SFC controller node for rv1126.
Signed-off-by: Jagan Teki <jagan@edgeble.ai >
Link: https://lore.kernel.org/r/20230731103518.2906147-7-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de >
2023-08-10 22:41:54 +02:00
Rob Herring
724ba67515
ARM: dts: Move .dts files to vendor sub-directories
...
The arm dts directory has grown to 1559 boards which makes it a bit
unwieldy to maintain and use. Past attempts stalled out due to plans to
move .dts files out of the kernel tree. Doing that is no longer planned
(any time soon at least), so let's go ahead and group .dts files by
vendors. This move aligns arm with arm64 .dts file structure.
There's no change to dtbs_install as the flat structure is maintained on
install.
The naming of vendor directories is roughly in this order of preference:
- Matching original and current SoC vendor prefix/name (e.g. ti, qcom)
- Current vendor prefix/name if still actively sold (SoCs which have
been aquired) (e.g. nxp/imx)
- Existing platform name for older platforms not sold/maintained by any
company (e.g. gemini, nspire)
The whole move was scripted with the exception of MAINTAINERS and a few
makefile fixups.
Acked-by: Viresh Kumar <viresh.kumar@linaro.org >
Acked-by: Michal Simek <michal.simek@amd.com > #Xilinx
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Acked-by: Neil Armstrong <neil.armstrong@linaro.org >
Acked-by: Paul Barker <paul.barker@sancloud.com >
Acked-by: Tony Lindgren <tony@atomide.com >
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com >
Acked-by: Heiko Stuebner <heiko@sntech.de >
Acked-by: Wei Xu <xuwei5@hisilicon.com > #hisilicon
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be >
Acked-by: Nick Hawkins <nick.hawkins@hpe.com >
Acked-by: Baruch Siach <baruch@tkos.co.il >
Reviewed-by: Linus Walleij <linus.walleij@linaro.org >
Reviewed-by: Andre Przywara <andre.przywara@arm.com >
Acked-by: Andre Przywara <andre.przywara@arm.com >
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com >
Acked-by: Peter Rosin <peda@axentia.se >
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com >
Acked-by: Sudeep Holla <sudeep.holla@arm.com >
Acked-by: Florian Fainelli <f.fainelli@gmail.com > #broadcom
Acked-by: Manivannan Sadhasivam <mani@kernel.org >
Reviewed-by: Jisheng Zhang <jszhang@kernel.org >
Acked-by: Patrice Chotard <patrice.chotard@foss.st.com >
Acked-by: Romain Perier <romain.perier@gmail.com >
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com >
Acked-by: Shawn Guo <shawnguo@kernel.org >
Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com >
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com >
Signed-off-by: Rob Herring <robh@kernel.org >
2023-06-21 11:39:50 -06:00