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arm64: dts: rockchip: adapter boards configuration for rk3566

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Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: I13acc6238bf7512a8327c23dc1a0991d23d48ddf
This commit is contained in:
Caesar Wang
2020-11-12 14:57:29 +08:00
committed by Tao Huang
parent 8f4b73ffda
commit d95072a003
7 changed files with 476 additions and 444 deletions
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2
arch/arm64/boot/dts/rockchip/Makefile
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@@ -70,7 +70,9 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-evb-v14-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-evb1-ddr4-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-evb1-ddr4-v10-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-evb2-lp4x-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-evb2-lp4x-v10-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-evb3-ddr3-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-evb3-ddr3-v10-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-ddr4-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-ddr4-v10-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb6-ddr3-v10.dtb

8
arch/arm64/boot/dts/rockchip/rk3566-evb2-lp4x-v10-linux.dts Normal file
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@@ -0,0 +1,8 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
#include "rk3566-evb2-lp4x-v10.dtsi"
#include "rk3568-linux.dtsi"

227
arch/arm64/boot/dts/rockchip/rk3566-evb2-lp4x-v10.dts
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@@ -4,230 +4,5 @@
*
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "rk3568-evb.dtsi"
#include "rk3566-evb2-lp4x-v10.dtsi"
#include "rk3568-android.dtsi"
/ {
model = "Rockchip RK3566 EVB2 LP4X V10 Board";
compatible = "rockchip,rk3566-evb2-lp4x-v10", "rockchip,rk3568";
rk_headset: rk-headset {
compatible = "rockchip_headset";
headset_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
};
};
/*
* mipi_dphy0 needs to be enabled
* when dsi0 is enabled
*/
&dsi0 {
status = "okay";
};
&dsi0_in_vp0 {
status = "okay";
};
&dsi0_in_vp1 {
status = "disabled";
};
&dsi0_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd0_rst_gpio>;
};
/*
* mipi_dphy1 needs to be enabled
* when dsi1 is enabled
*/
&dsi1 {
status = "disabled";
};
&dsi1_in_vp0 {
status = "disabled";
};
&dsi1_in_vp1 {
status = "disabled";
};
&dsi1_panel {
power-supply = <&vcc3v3_lcd1_n>;
reset-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd1_rst_gpio>;
};
&gmac1 {
phy-mode = "rgmii";
clock_in_out = "output";
snps,reset-gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
assigned-clock-rates = <0>, <125000000>;
pinctrl-names = "default";
pinctrl-0 = <&gmac1m1_miim_pins &gmac1m1_rgmii_pins>;
tx_delay = <0x4f>;
rx_delay = <0x25>;
phy-handle = <&rgmii_phy0>;
status = "okay";
};
&mdio1 {
rgmii_phy0: phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
};
};
/*
* power-supply should switche to vcc3v3_lcd1_n
* when mipi panel is connected to dsi1.
*/
&gt1x {
power-supply = <&vcc3v3_lcd0_n>;
};
&mipi_dphy0 {
status = "okay";
};
&mipi_dphy1 {
status = "disabled";
};
&pinctrl {
headphone {
hp_det: hp-det {
rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
sdio-pwrseq {
wifi_enable_h: wifi-enable-h {
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wireless-wlan {
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
wireless-bluetooth {
uart1_gpios: uart1-gpios {
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
lcd0 {
lcd0_rst_gpio: lcd0-rst-gpio {
rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
lcd1 {
lcd1_rst_gpio: lcd1-rst-gpio {
rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&sdmmc2 {
status = "disabled";
};
&sdmmc1 {
max-frequency = <150000000>;
supports-sdio;
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
sd-uhs-sdr104;
status = "okay";
};
&sdio_pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rk809 1>;
clock-names = "ext_clock";
pinctrl-names = "default";
pinctrl-0 = <&wifi_enable_h>;
/*
* On the module itself this is one of these (depending
* on the actual card populated):
* - SDIO_RESET_L_WL_REG_ON
* - PDN (power down when low)
*/
reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m0_xfer &uart1ctsnm0>;
};
&vcc3v3_lcd0_n {
gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
&vcc3v3_lcd1_n {
gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
&wireless_wlan {
compatible = "wlan-platdata";
rockchip,grf = <&grf>;
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_irq>;
wifi_chip_type = "ap6398s";
WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&wireless_bluetooth {
compatible = "bluetooth-platdata";
clocks = <&rk809 1>;
clock-names = "ext_clock";
//wifi-bt-power-toggle;
uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "rts_gpio";
pinctrl-0 = <&uart1rtsnm0>;
pinctrl-1 = <&uart1_gpios>;
BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
status = "okay";
};

232
arch/arm64/boot/dts/rockchip/rk3566-evb2-lp4x-v10.dtsi Normal file
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@@ -0,0 +1,232 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "rk3568-evb.dtsi"
/ {
model = "Rockchip RK3566 EVB2 LP4X V10 Board";
compatible = "rockchip,rk3566-evb2-lp4x-v10", "rockchip,rk3568";
rk_headset: rk-headset {
compatible = "rockchip_headset";
headset_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
};
};
/*
* mipi_dphy0 needs to be enabled
* when dsi0 is enabled
*/
&dsi0 {
status = "okay";
};
&dsi0_in_vp0 {
status = "okay";
};
&dsi0_in_vp1 {
status = "disabled";
};
&dsi0_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd0_rst_gpio>;
};
/*
* mipi_dphy1 needs to be enabled
* when dsi1 is enabled
*/
&dsi1 {
status = "disabled";
};
&dsi1_in_vp0 {
status = "disabled";
};
&dsi1_in_vp1 {
status = "disabled";
};
&dsi1_panel {
power-supply = <&vcc3v3_lcd1_n>;
reset-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd1_rst_gpio>;
};
&gmac1 {
phy-mode = "rgmii";
clock_in_out = "output";
snps,reset-gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
assigned-clock-rates = <0>, <125000000>;
pinctrl-names = "default";
pinctrl-0 = <&gmac1m1_miim_pins &gmac1m1_rgmii_pins>;
tx_delay = <0x4f>;
rx_delay = <0x25>;
phy-handle = <&rgmii_phy0>;
status = "okay";
};
&mdio1 {
rgmii_phy0: phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
};
};
/*
* power-supply should switche to vcc3v3_lcd1_n
* when mipi panel is connected to dsi1.
*/
&gt1x {
power-supply = <&vcc3v3_lcd0_n>;
};
&mipi_dphy0 {
status = "okay";
};
&mipi_dphy1 {
status = "disabled";
};
&pinctrl {
headphone {
hp_det: hp-det {
rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
sdio-pwrseq {
wifi_enable_h: wifi-enable-h {
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wireless-wlan {
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
wireless-bluetooth {
uart1_gpios: uart1-gpios {
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
lcd0 {
lcd0_rst_gpio: lcd0-rst-gpio {
rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
lcd1 {
lcd1_rst_gpio: lcd1-rst-gpio {
rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&sdmmc2 {
status = "disabled";
};
&sdmmc1 {
max-frequency = <150000000>;
supports-sdio;
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
sd-uhs-sdr104;
status = "okay";
};
&sdio_pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rk809 1>;
clock-names = "ext_clock";
pinctrl-names = "default";
pinctrl-0 = <&wifi_enable_h>;
/*
* On the module itself this is one of these (depending
* on the actual card populated):
* - SDIO_RESET_L_WL_REG_ON
* - PDN (power down when low)
*/
reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m0_xfer &uart1ctsnm0>;
};
&vcc3v3_lcd0_n {
gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
&vcc3v3_lcd1_n {
gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
&wireless_wlan {
compatible = "wlan-platdata";
rockchip,grf = <&grf>;
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_irq>;
wifi_chip_type = "ap6398s";
WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&wireless_bluetooth {
compatible = "bluetooth-platdata";
clocks = <&rk809 1>;
clock-names = "ext_clock";
//wifi-bt-power-toggle;
uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "rts_gpio";
pinctrl-0 = <&uart1rtsnm0>;
pinctrl-1 = <&uart1_gpios>;
BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
status = "okay";
};

8
arch/arm64/boot/dts/rockchip/rk3566-evb3-ddr3-v10-linux.dts Normal file
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@@ -0,0 +1,8 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
#include "rk3566-evb3-ddr3-v10.dtsi"
#include "rk3568-linux.dtsi"

219
arch/arm64/boot/dts/rockchip/rk3566-evb3-ddr3-v10.dts
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@@ -4,222 +4,5 @@
*
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "rk3568-evb.dtsi"
#include "rk3566-evb3-ddr3-v10.dtsi"
#include "rk3568-android.dtsi"
/ {
model = "Rockchip RK3566 EVB3 DDR3 V10 Board";
compatible = "rockchip,rk3566-evb3-DDR3-v10", "rockchip,rk3568";
rk_headset: rk-headset {
compatible = "rockchip_headset";
headset_gpio = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
};
};
/*
* mipi_dphy0 needs to be enabled
* when dsi0 is enabled
*/
&dsi0 {
status = "okay";
};
&dsi0_in_vp0 {
status = "okay";
};
&dsi0_in_vp1 {
status = "disabled";
};
&dsi0_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
};
&gt1x {
power-supply = <&vcc3v3_lcd0_n>;
};
&i2s1_8ch {
status = "disabled";
#sound-dai-cells = <0>;
};
&i2s3_2ch {
status = "okay";
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&i2s3sclkm1
&i2s3lrckm1
&i2s3sdim1
&i2s3sdom1>;
};
&mipi_dphy0 {
status = "okay";
};
&rk809_codec {
#sound-dai-cells = <0>;
compatible = "rockchip,rk809-codec", "rockchip,rk817-codec";
clocks = <&cru I2S3_MCLKOUT_TX>;
clock-names = "mclk";
pinctrl-names = "default";
pinctrl-0 = <&i2s3mclkm1>;
hp-volume = <20>;
spk-volume = <3>;
mic-in-differential;
status = "okay";
};
&rk809_sound {
status = "okay";
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "rockchip,rk809-codec";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,cpu {
sound-dai = <&i2s3_2ch>;
};
simple-audio-card,codec {
sound-dai = <&rk809_codec>;
};
};
&pinctrl {
headphone {
hp_det: hp-det {
rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
lcd {
lcd_rst_gpio: lcd-rst-gpio {
rockchip,pins = <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wireless-bluetooth {
uart1_gpios: uart1-gpios {
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&sdmmc2 {
status = "disabled";
};
&sdmmc1 {
max-frequency = <150000000>;
supports-sdio;
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
sd-uhs-sdr104;
status = "okay";
};
&sdio_pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&pmucru CLK_RTC_32K>;
clock-names = "ext_clock";
pinctrl-names = "default";
pinctrl-0 = <&wifi_enable_h>;
/*
* On the module itself this is one of these (depending
* on the actual card populated):
* - SDIO_RESET_L_WL_REG_ON
* - PDN (power down when low)
*/
reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
};
&gmac1 {
phy-mode = "rgmii";
clock_in_out = "output";
snps,reset-gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
assigned-clock-rates = <0>, <125000000>;
pinctrl-names = "default";
pinctrl-0 = <&gmac1m1_miim_pins &gmac1m1_rgmii_pins>;
tx_delay = <0x2a>;
rx_delay = <0x1a>;
phy-handle = <&rgmii_phy1>;
status = "okay";
};
&mdio1 {
rgmii_phy1: phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
};
};
&uart1 {
status = "okay";
};
&vcc3v3_lcd0_n {
gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
&wireless_wlan {
compatible = "wlan-platdata";
rockchip,grf = <&grf>;
wifi_chip_type = "ap6398s";
WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&wireless_bluetooth {
compatible = "bluetooth-platdata";
clocks = <&pmucru CLK_RTC_32K>;
clock-names = "ext_clock";
//wifi-bt-power-toggle;
uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "rts_gpio";
pinctrl-0 = <&uart1ctsnm0>;
pinctrl-1 = <&uart1_gpios>;
BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&sata2 {
status = "okay";
};
&spdif_8ch {
status = "disabled";
};

224
arch/arm64/boot/dts/rockchip/rk3566-evb3-ddr3-v10.dtsi Normal file
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@@ -0,0 +1,224 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "rk3568-evb.dtsi"
/ {
model = "Rockchip RK3566 EVB3 DDR3 V10 Board";
compatible = "rockchip,rk3566-evb3-DDR3-v10", "rockchip,rk3568";
rk_headset: rk-headset {
compatible = "rockchip_headset";
headset_gpio = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
};
};
/*
* mipi_dphy0 needs to be enabled
* when dsi0 is enabled
*/
&dsi0 {
status = "okay";
};
&dsi0_in_vp0 {
status = "okay";
};
&dsi0_in_vp1 {
status = "disabled";
};
&dsi0_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
};
&gt1x {
power-supply = <&vcc3v3_lcd0_n>;
};
&i2s1_8ch {
status = "disabled";
#sound-dai-cells = <0>;
};
&i2s3_2ch {
status = "okay";
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&i2s3sclkm1
&i2s3lrckm1
&i2s3sdim1
&i2s3sdom1>;
};
&mipi_dphy0 {
status = "okay";
};
&rk809_codec {
#sound-dai-cells = <0>;
compatible = "rockchip,rk809-codec", "rockchip,rk817-codec";
clocks = <&cru I2S3_MCLKOUT_TX>;
clock-names = "mclk";
pinctrl-names = "default";
pinctrl-0 = <&i2s3mclkm1>;
hp-volume = <20>;
spk-volume = <3>;
mic-in-differential;
status = "okay";
};
&rk809_sound {
status = "okay";
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "rockchip,rk809-codec";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,cpu {
sound-dai = <&i2s3_2ch>;
};
simple-audio-card,codec {
sound-dai = <&rk809_codec>;
};
};
&pinctrl {
headphone {
hp_det: hp-det {
rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
lcd {
lcd_rst_gpio: lcd-rst-gpio {
rockchip,pins = <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wireless-bluetooth {
uart1_gpios: uart1-gpios {
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&sdmmc2 {
status = "disabled";
};
&sdmmc1 {
max-frequency = <150000000>;
supports-sdio;
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
sd-uhs-sdr104;
status = "okay";
};
&sdio_pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&pmucru CLK_RTC_32K>;
clock-names = "ext_clock";
pinctrl-names = "default";
pinctrl-0 = <&wifi_enable_h>;
/*
* On the module itself this is one of these (depending
* on the actual card populated):
* - SDIO_RESET_L_WL_REG_ON
* - PDN (power down when low)
*/
reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
};
&gmac1 {
phy-mode = "rgmii";
clock_in_out = "output";
snps,reset-gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
assigned-clock-rates = <0>, <125000000>;
pinctrl-names = "default";
pinctrl-0 = <&gmac1m1_miim_pins &gmac1m1_rgmii_pins>;
tx_delay = <0x2a>;
rx_delay = <0x1a>;
phy-handle = <&rgmii_phy1>;
status = "okay";
};
&mdio1 {
rgmii_phy1: phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
};
};
&uart1 {
status = "okay";
};
&vcc3v3_lcd0_n {
gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
&wireless_wlan {
compatible = "wlan-platdata";
rockchip,grf = <&grf>;
wifi_chip_type = "ap6398s";
WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&wireless_bluetooth {
compatible = "bluetooth-platdata";
clocks = <&pmucru CLK_RTC_32K>;
clock-names = "ext_clock";
//wifi-bt-power-toggle;
uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "rts_gpio";
pinctrl-0 = <&uart1ctsnm0>;
pinctrl-1 = <&uart1_gpios>;
BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&sata2 {
status = "okay";
};
&spdif_8ch {
status = "disabled";
};