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arm64: dts: rockchip: rk3588s-tablet: add uboot charge suspend node

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Change-Id: I664b07c341be806ea47b71ca182c1e024247551e
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
This commit is contained in:
Wu Liangqing
2022-05-12 13:17:09 +00:00
committed by Tao Huang
parent 1fe13c137b
commit aa43b7e67d
2 changed files with 32 additions and 1 deletions
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13
arch/arm64/boot/dts/rockchip/rk3588s-tablet-single.dtsi
View File

@@ -85,6 +85,19 @@
rockchip,screen-on-voltage = <6900>;
rockchip,uboot-exit-charge-level = <2>;
rockchip,uboot-exit-charge-auto = <0>;
rockchip,system-suspend = <1>;
regulator-on-in-mem = <&vdd_log_s0>, <&vcc_2v0_pldo_s3>,
<&vdd2_ddr_s3>, <&vcc_1v8_s3>, <&vcc_1v8_s0>,
<&vdd_0v75_s3>, <&pldo6_s3>;
regulator-off-in-mem = <&vdd_gpu_s0>, <&vdd_npu_s0>,
<&vdd_vdenc_s0>, <&vdd_gpu_mem_s0>, <&vdd_npu_mem_s0>,
<&vdd_vdenc_mem_s0>, <&avcc_1v8_s0>, <&vcc_3v3_s0>,
<&vccio_sd_s0>, <&avdd_0v75_s0>, <&vdd_0v85_s0>,
<&vdd_cpu_big1_s0>, <&vdd_cpu_big0_s0>, <&vdd_cpu_lit_s0>,
<&vdd_cpu_big1_mem_s0>, <&vdd_cpu_big0_mem_s0>, <&vdd_cpu_lit_mem_s0>,
<&vddq_ddr_s0>, <&vdd_ddr_s0>, <&vdd_ddr_pll_s0>,
<&avdd_1v2_s0>, <&vdd_0v75_s0>, <&vcc_3v3_s3>;
status = "okay";
};

20
arch/arm64/boot/dts/rockchip/rk3588s-tablet.dtsi
View File

@@ -84,7 +84,25 @@
rockchip,uboot-low-power-voltage = <6800>;
rockchip,screen-on-voltage = <6900>;
rockchip,uboot-exit-charge-level = <2>;
rockchip,uboot-exit-charge-auto = <1>;
rockchip,uboot-exit-charge-auto = <0>;
rockchip,system-suspend = <1>;
regulator-on-in-mem = <&vdd_log_s0>, <&vcc_2v0_pldo_s3>,
<&vdd2_ddr_s3>, <&vcc_1v1_nldo_s3>,
<&vdd1_1v8_ddr_s3>, <&vcc_1v8_s3>,
<&master_pldo6_s3>, <&vdd_0v75_s3>,
<&vdd2l_0v9_ddr_s3>, <&vdd_1v8_pll_s0>, <&pldo6_s3>;
regulator-off-in-mem = <&vdd_gpu_s0>, <&vdd_npu_s0>,
<&vdd_vdenc_s0>, <&vdd_gpu_mem_s0>, <&vdd_npu_mem_s0>,
<&vdd_vdenc_mem_s0>, <&avcc_1v8_s0>, <&vcc_3v3_s0>,
<&vccio_sd_s0>, <&master_nldo3>, <&avdd_0v75_s0>,
<&vdd_0v85_s0>, <&vdd_cpu_big1_s0>, <&vdd_cpu_big0_s0>,
<&vdd_cpu_lit_s0>, <&vdd_cpu_big1_mem_s0>, <&vdd_cpu_big0_mem_s0>,
<&vcc_1v8_s0>, <&vdd_cpu_lit_mem_s0>, <&vddq_ddr_s0>,
<&vdd_ddr_s0>, <&vcc_1v8_cam_s0>, <&avdd1v8_ddr_pll_s0>,
<&vcc_3v3_sd_s0>, <&vcc_2v8_cam_s0>, <&vdd_0v75_pll_s0>,
<&vdd_ddr_pll_s0>, <&slave_nldo3>, <&avdd_1v2_cam_s0>,
<&avdd_1v2_s0>, <&vcc_3v3_s3>;
status = "okay";
};