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CHROMIUM: ARM: rockchip: Handle ERRATA 818325 / 852422 for resume

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The normal prov-v7.S code doesn't run on the main CPU during resume from
S3.  Apply the errata early in the resume at the same time that we
restore the l2ctlr.

BUG=chrome-os-partner:50137
TEST=CL:If49e61d7825bdfaf0eb3664c42aa9b0ba2fe66b2

Change-Id: I22549b24ee308524edf9db931d6817aa28e5efd3
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/329522
Reviewed-by: Olof Johansson <olofj@chromium.org>
(cherry picked from commit f6f678d14d507b58102c5d5e6f17af2584320934)
This commit is contained in:
Douglas Anderson
2016-02-26 12:38:49 -08:00
committed by Chris Zhong
parent ed65feb600
commit 74a45b7ad6
1 changed files with 10 additions and 0 deletions
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10
arch/arm/mach-rockchip/embedded/rk3288_resume.c
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@@ -59,6 +59,16 @@ static void __noreturn rk3288_resume_c(void)
asm("mcr p15, 1, %0, c9, c0, 2" : :
"r" (rk3288_resume_params.l2ctlr));
/* We will have lost this when the CPU powered off */
if (IS_ENABLED(CONFIG_ARM_ERRATA_818325_852422)) {
u32 diag_reg;
asm volatile("mrc p15, 0, %0, c15, c0, 1" : "=r" (diag_reg));
diag_reg |= (1 << 12);
asm volatile("mcr p15, 0, %0, c15, c0, 1" : : "r" (diag_reg));
asm volatile("isb");
}
if (rk3288_resume_params.ddr_resume_f)
rk3288_ddr_resume_early(&rk3288_resume_params.ddr_save_data);