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multiple-os: don't set rktimer in kernel

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uboot will use rktimer

Change-Id: Icb9bdf6f04916198296433a67332f28f9b43674e
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
This commit is contained in:
Jacob Chen
2016-10-31 23:52:13 +08:00
parent 7f0e7d3705
commit 1ec20817f5
2 changed files with 12 additions and 10 deletions
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2
arch/arm/boot/dts/rk3288.dtsi
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@@ -289,6 +289,7 @@
clock-frequency = <24000000>;
};
#if 0
timer: timer@ff810000 {
compatible = "rockchip,rk3288-timer";
reg = <0xff810000 0x20>;
@@ -296,6 +297,7 @@
clocks = <&xin24m>, <&cru PCLK_TIMER>;
clock-names = "timer", "pclk";
};
#endif
display-subsystem {
compatible = "rockchip,display-subsystem";

20
arch/arm/mach-rockchip/rockchip.c
View File

@@ -45,16 +45,16 @@ static void __init rockchip_timer_init(void)
* So make sure it is running during early boot.
*/
reg_base = ioremap(RK3288_TIMER6_7_PHYS, SZ_16K);
if (reg_base) {
writel(0, reg_base + 0x30);
writel(0xffffffff, reg_base + 0x20);
writel(0xffffffff, reg_base + 0x24);
writel(1, reg_base + 0x30);
dsb();
iounmap(reg_base);
} else {
pr_err("rockchip: could not map timer7 registers\n");
}
// if (reg_base) {
// writel(0, reg_base + 0x30);
// writel(0xffffffff, reg_base + 0x20);
// writel(0xffffffff, reg_base + 0x24);
// writel(1, reg_base + 0x30);
// dsb();
// iounmap(reg_base);
// } else {
// pr_err("rockchip: could not map timer7 registers\n");
// }
/*
* Disable auto jtag/sdmmc switching that causes issues