video: rockchip: hdmi: change the way to enable debug log
user can change hdmi_dbg_level value to printf log which you want.
1 : cec
2 : hdmi
3 : hdcp
such as, echo 2 > /sys/module/rockchip_hdmi_sysfs/parameters/hdmi_dbg_level
Change-Id: Iaa5a66c2926789694e0d544196bedc81fb3a755a
Signed-off-by: Shen Zhenyi <szy@rock-chips.com>
(cherry picked from commit 919cb0208a)
This commit is contained in:
@@ -82,7 +82,7 @@ void rockchip_hdmi_cec_submit_work(int event, int delay, void *data)
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{
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struct cec_delayed_work *work;
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CECDBG("%s event %04x delay %d\n", __func__, event, delay);
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HDMIDBG(1, "%s event %04x delay %d\n", __func__, event, delay);
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if (!cec_dev)
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return;
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@@ -97,7 +97,7 @@ void rockchip_hdmi_cec_submit_work(int event, int delay, void *data)
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&work->work,
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msecs_to_jiffies(delay));
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} else {
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CECDBG(KERN_WARNING "CEC: Cannot allocate memory\n");
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HDMIDBG(1, "CEC: Cannot allocate memory\n");
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}
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}
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@@ -1,9 +1,10 @@
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#ifndef __ROCKCHIP_HDMI_CEC_H__
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#define __ROCKCHIP_HDMI_CEC_H__
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#include "rockchip-hdmi.h"
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#include <linux/input.h>
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#include <linux/miscdevice.h>
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#include "rockchip-hdmi.h"
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enum {
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CEC_LOGADDR_TV = 0x00,
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CEC_LOGADDR_RECDEV1 = 0x01,
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@@ -169,13 +170,6 @@ struct cec_device {
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void (*setceclogicaddr)(struct hdmi *, int);
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};
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#ifdef DEBUG
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#define CECDBG(format, ...) \
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pr_info(format, ## __VA_ARGS__)
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#else
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#define CECDBG(format, ...)
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#endif
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/* for HAL ioctl*/
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#define HDMI_CEC_MAGIC 'N'
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#define HDMI_IOCTL_CECSEND _IOW(HDMI_CEC_MAGIC, 0, struct cec_framedata)
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#define HDMI_IOCTL_CECENAB _IOW(HDMI_CEC_MAGIC, 1, int)
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@@ -25,8 +25,8 @@ void hdmi_submit_work(struct hdmi *hdmi,
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{
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struct hdmi_delayed_work *work;
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DBG("%s event %04x delay %d sync %d\n",
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__func__, event, delay, sync);
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HDMIDBG(2, "%s event %04x delay %d sync %d\n",
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__func__, event, delay, sync);
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work = kmalloc(sizeof(*work), GFP_ATOMIC);
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@@ -64,14 +64,14 @@ static void hdmi_send_uevent(struct hdmi *hdmi, int uevent)
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static inline void hdmi_wq_set_output(struct hdmi *hdmi, int mute)
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{
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DBG("%s mute %d\n", __func__, mute);
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HDMIDBG(2, "%s mute %d\n", __func__, mute);
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if (hdmi->ops->setmute)
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hdmi->ops->setmute(hdmi, mute);
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}
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static inline void hdmi_wq_set_audio(struct hdmi *hdmi)
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{
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DBG("%s\n", __func__);
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HDMIDBG(2, "%s\n", __func__);
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if (hdmi->ops->setaudio)
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hdmi->ops->setaudio(hdmi, &hdmi->audio);
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}
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@@ -81,7 +81,7 @@ static void hdmi_wq_set_video(struct hdmi *hdmi)
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struct hdmi_video *video = &hdmi->video;
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int deepcolor;
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DBG("%s\n", __func__);
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HDMIDBG(2, "%s\n", __func__);
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video->sink_hdmi = hdmi->edid.sink_hdmi;
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video->format_3d = hdmi->mode_3d;
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@@ -164,7 +164,7 @@ static void hdmi_wq_parse_edid(struct hdmi *hdmi)
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if (!hdmi)
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return;
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DBG("%s\n", __func__);
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HDMIDBG(2, "%s\n", __func__);
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pedid = &hdmi->edid;
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fb_destroy_modelist(&pedid->modelist);
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@@ -246,7 +246,7 @@ out:
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static void hdmi_wq_insert(struct hdmi *hdmi)
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{
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DBG("%s\n", __func__);
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HDMIDBG(2, "%s\n", __func__);
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if (hdmi->ops->insert)
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hdmi->ops->insert(hdmi);
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hdmi_wq_parse_edid(hdmi);
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@@ -275,7 +275,7 @@ static void hdmi_wq_remove(struct hdmi *hdmi)
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struct rk_screen screen;
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int i;
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DBG("%s\n", __func__);
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HDMIDBG(2, "%s\n", __func__);
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if (hdmi->ops->remove)
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hdmi->ops->remove(hdmi);
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if (hdmi->property->feature & SUPPORT_CEC)
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@@ -317,9 +317,8 @@ static void hdmi_work_queue(struct work_struct *work)
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mutex_lock(&hdmi->ddev->lock);
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DBG("\nhdmi_work_queue() - evt= %x %d\n",
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(event & 0xFF00) >> 8,
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event & 0xFF);
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HDMIDBG(2, "\nhdmi_work_queue() - evt= %x %d\n",
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(event & 0xFF00) >> 8, event & 0xFF);
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if ((!hdmi->enable || hdmi->sleep) &&
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(event != HDMI_ENABLE_CTL) &&
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@@ -377,8 +376,8 @@ static void hdmi_work_queue(struct work_struct *work)
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case HDMI_HPD_CHANGE:
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if (hdmi->ops->getstatus)
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hpd = hdmi->ops->getstatus(hdmi);
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DBG("hdmi_work_queue() - hpd is %d hotplug is %d\n",
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hpd, hdmi->hotplug);
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HDMIDBG(2, "hdmi_work_queue() - hpd is %d hotplug is %d\n",
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hpd, hdmi->hotplug);
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if (hpd != hdmi->hotplug) {
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if (hpd == HDMI_HPD_ACTIVED) {
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hdmi->hotplug = hpd;
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@@ -467,9 +466,8 @@ exit:
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if (!hdmi_w->sync)
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kfree(hdmi_w);
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DBG("\nhdmi_work_queue() - exit evt= %x %d\n",
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(event & 0xFF00) >> 8,
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event & 0xFF);
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HDMIDBG(2, "\nhdmi_work_queue() - exit evt= %x %d\n",
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(event & 0xFF00) >> 8, event & 0xFF);
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mutex_unlock(&hdmi->ddev->lock);
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}
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@@ -492,8 +490,8 @@ struct hdmi *rockchip_hdmi_register(struct hdmi_property *property,
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if (i == HDMI_MAX_ID)
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return NULL;
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DBG("hdmi_register() - video source %d display %d\n",
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property->videosrc, property->display);
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HDMIDBG(2, "hdmi_register() - video source %d display %d\n",
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property->videosrc, property->display);
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hdmi = kmalloc(sizeof(*hdmi), GFP_KERNEL);
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if (!hdmi)
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@@ -2,8 +2,12 @@
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#include <linux/string.h>
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#include <linux/display-sys.h>
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#include <linux/interrupt.h>
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#include <linux/moduleparam.h>
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#include "rockchip-hdmi.h"
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int hdmi_dbg_level;
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module_param(hdmi_dbg_level, int, S_IRUGO | S_IWUSR);
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static int hdmi_get_enable(struct rk_display_device *device)
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{
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struct hdmi *hdmi = device->priv_data;
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@@ -536,12 +536,12 @@ struct hdmi {
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#define HDMI_AUDIO_DEFAULT_RATE HDMI_AUDIO_FS_44100
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#define HDMI_AUDIO_DEFAULT_WORDLENGTH HDMI_AUDIO_WORD_LENGTH_16bit
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#ifdef DEBUG
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#define DBG(format, ...) \
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pr_info(format, ## __VA_ARGS__)
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#else
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#define DBG(format, ...)
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#endif
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extern int hdmi_dbg_level;
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#define HDMIDBG(x, format, ...) do { \
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if (unlikely(hdmi_dbg_level >= x)) \
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pr_info(format, ## __VA_ARGS__); \
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} while (0)
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struct hdmi *rockchip_hdmi_register(struct hdmi_property *property,
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struct hdmi_ops *ops);
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@@ -24,7 +24,7 @@ static int rockchip_hdmiv1_cec_read_frame(struct hdmi *hdmi,
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hdmi_readl(hdmi_dev, CEC_RX_LENGTH, &length);
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hdmi_writel(hdmi_dev, CEC_RX_OFFSET, 0);
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CECDBG("CEC: %s length is %d\n", __func__, length);
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HDMIDBG(1, "CEC: %s length is %d\n", __func__, length);
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for (i = 0; i < length; i++) {
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hdmi_readl(hdmi_dev, CEC_DATA, &val);
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data[i] = val;
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@@ -39,14 +39,14 @@ static int rockchip_hdmiv1_cec_send_frame(struct hdmi *hdmi,
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int i;
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struct hdmi_dev *hdmi_dev = hdmi->property->priv;
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CECDBG("CEC: TX srcdestaddr %x opcode %x ",
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frame->srcdestaddr, frame->opcode);
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HDMIDBG(1, "CEC: TX srcdestaddr %x opcode %x ",
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frame->srcdestaddr, frame->opcode);
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if (frame->argcount) {
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DBG("args:");
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HDMIDBG(1, "args:");
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for (i = 0; i < frame->argcount; i++)
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DBG("%02x ", frame->args[i]);
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HDMIDBG(1, "%02x ", frame->args[i]);
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}
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CECDBG("\n");
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HDMIDBG(1, "\n");
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hdmi_writel(hdmi_dev, CEC_TX_OFFSET, 0);
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hdmi_writel(hdmi_dev, CEC_DATA, frame->srcdestaddr);
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@@ -60,13 +60,13 @@ static int rockchip_hdmiv1_cec_send_frame(struct hdmi *hdmi,
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/*Wait for bus free*/
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cec.busfree = 1;
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hdmi_writel(hdmi_dev, CEC_CTRL, m_BUSFREETIME_ENABLE);
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CECDBG("start wait bus free\n");
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HDMIDBG(1, "start wait bus free\n");
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if (wait_event_interruptible_timeout(cec.wait,
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cec.busfree == 0,
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msecs_to_jiffies(17)))
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return CEC_SEND_BUSY;
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CECDBG("end wait bus free,start tx,busfree=%d\n", cec.busfree);
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HDMIDBG(1, "end wait bus free,start tx,busfree=%d\n", cec.busfree);
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/*Start TX*/
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cec.tx_done = 0;
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hdmi_writel(hdmi_dev, CEC_CTRL, m_BUSFREETIME_ENABLE | m_START_TX);
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@@ -74,7 +74,7 @@ static int rockchip_hdmiv1_cec_send_frame(struct hdmi *hdmi,
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cec.tx_done != 0,
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msecs_to_jiffies(100)))
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hdmi_writel(hdmi_dev, CEC_CTRL, 0);
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CECDBG("end tx,tx_done=%d\n", cec.tx_done);
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HDMIDBG(1, "end tx,tx_done=%d\n", cec.tx_done);
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if (cec.tx_done == 1) {
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cec.tx_done = 0;
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@@ -88,7 +88,7 @@ void rockchip_hdmiv1_cec_setcecla(struct hdmi *hdmi, int ceclgaddr)
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{
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struct hdmi_dev *hdmi_dev = hdmi->property->priv;
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CECDBG("CEC: %s\n", __func__);
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HDMIDBG(1, "CEC: %s\n", __func__);
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hdmi_writel(hdmi_dev, CEC_LOGICADDR, ceclgaddr);
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}
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@@ -99,21 +99,21 @@ void rockchip_hdmiv1_cec_isr(struct hdmi_dev *hdmi_dev)
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hdmi_readl(hdmi_dev, CEC_TX_INT, &tx_isr);
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hdmi_readl(hdmi_dev, CEC_RX_INT, &rx_isr);
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CECDBG("CEC: rockchip_hdmiv1_cec_isr:tx_isr %02x rx_isr %02x\n\n",
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tx_isr, rx_isr);
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HDMIDBG(1, "CEC: rockchip_hdmiv1_cec_isr:tx_isr %02x rx_isr %02x\n\n",
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tx_isr, rx_isr);
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hdmi_writel(hdmi_dev, CEC_TX_INT, tx_isr);
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hdmi_writel(hdmi_dev, CEC_RX_INT, rx_isr);
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if (tx_isr & m_TX_BUSNOTFREE) {
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cec.busfree = 0;
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CECDBG("CEC: m_TX_BUSNOTFREE,busfree=%d\n", cec.busfree);
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HDMIDBG(1, "CEC: m_TX_BUSNOTFREE,busfree=%d\n", cec.busfree);
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} else if (tx_isr & m_TX_DONE) {
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cec.tx_done = 1;
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CECDBG("CEC: m_TX_DONE,busfree=%d\n", cec.tx_done);
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HDMIDBG(1, "CEC: m_TX_DONE,busfree=%d\n", cec.tx_done);
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} else {
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cec.tx_done = -1;
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CECDBG("CEC: else:busfree=%d\n", cec.tx_done);
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HDMIDBG(1, "CEC: else:busfree=%d\n", cec.tx_done);
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}
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wake_up_interruptible_all(&cec.wait);
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@@ -139,7 +139,7 @@ void rockchip_hdmiv1_cec_init(struct hdmi *hdmi)
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hdmi_writel(hdmi_dev, CEC_TX_INT, 0xFF);
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hdmi_writel(hdmi_dev, CEC_RX_INT, 0xFF);
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CECDBG(KERN_ERR "CEC: rockchip_hdmiv1_cec_init success\n");
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HDMIDBG(1, "CEC: rockchip_hdmiv1_cec_init sucess\n");
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rockchip_hdmi_cec_init(hdmi,
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rockchip_hdmiv1_cec_send_frame,
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rockchip_hdmiv1_cec_read_frame,
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@@ -147,6 +147,6 @@ void rockchip_hdmiv1_cec_init(struct hdmi *hdmi)
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init = 0;
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init_waitqueue_head(&cec.wait);
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}
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CECDBG("%s", __func__);
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HDMIDBG(1, "%s", __func__);
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}
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@@ -100,7 +100,7 @@ static int rockchip_hdmiv1_hdcp_key_check(struct hdcp_keys *key)
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{
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int i = 0;
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DBG("HDCP: check hdcp key\n");
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HDMIDBG(3, "HDCP: check hdcp key\n");
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/*check 40 private key */
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for (i = 0; i < HDCP_PRIVATE_KEY_SIZE; i++) {
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if (key->devicekey[i] != 0x00)
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@@ -125,7 +125,7 @@ static int rockchip_hdmiv1_hdcp_load_key2mem(void)
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return -1;
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hdmi_dev = hdcp->hdmi_dev;
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key = hdcp->keys;
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DBG("HDCP: rockchip_hdmiv1_hdcp_load_key2mem start\n");
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HDMIDBG(3, "HDCP: rockchip_hdmiv1_hdcp_load_key2mem start\n");
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/* Write 40 private key*/
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for (i = 0; i < HDCP_PRIVATE_KEY_SIZE; i++)
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hdmi_writel(hdmi_dev, HDCP_KEY_FIFO, key->devicekey[i]);
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@@ -135,7 +135,7 @@ static int rockchip_hdmiv1_hdcp_load_key2mem(void)
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/* Write 2nd aksv*/
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for (i = 0; i < 5; i++)
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hdmi_writel(hdmi_dev, HDCP_KEY_FIFO, key->ksv[i]);
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DBG("HDCP: rockchip_hdmiv1_hdcp_load_key2mem end\n");
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HDMIDBG(3, "HDCP: rockchip_hdmiv1_hdcp_load_key2mem end\n");
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return HDCP_OK;
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}
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@@ -278,7 +278,7 @@ static struct delayed_work *hdcp_submit_work(int event, int delay)
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{
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struct hdcp_delayed_work *work;
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DBG("%s event %04x delay %d\n", __func__, event, delay);
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HDMIDBG(3, "%s event %04x delay %d\n", __func__, event, delay);
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work = kmalloc(sizeof(*work), GFP_ATOMIC);
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if (work) {
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@@ -358,7 +358,7 @@ static void hdcp_wq_authentication_failure(void)
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hdcp->hdcp_state = HDCP_AUTHENTICATION_START;
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if (hdcp->auth_state == 1 && timer_state == 0) {
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DBG("add auth timer\n");
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HDMIDBG(3, "add auth timer\n");
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hdcp->auth_state = 0;
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hdcp->retry_cnt = HDCP_INFINITE_REAUTH;
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auth_timer.expires = jiffies + AUTH_TIMEOUT;
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@@ -373,7 +373,7 @@ static void hdcp_wq_authentication_failure(void)
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hdcp->hdcp_state = HDCP_ENABLE_PENDING;
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if (timer_state == 1) {
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DBG("delete auth timer\n");
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HDMIDBG(3, "delete auth timer\n");
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del_timer_sync(&auth_timer);
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timer_state = 0;
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}
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@@ -389,10 +389,10 @@ static void hdcp_wq_start_authentication(void)
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int status = HDCP_OK;
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hdcp->hdcp_state = HDCP_AUTHENTICATION_START;
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DBG("HDCP: authentication start\n");
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HDMIDBG(3, "HDCP: authentication start\n");
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status = rockchip_hdmiv1_hdcp_start_authentication(hdcp->hdmi_dev);
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if (status != HDCP_OK) {
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DBG("HDCP: authentication failed\n");
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HDMIDBG(3, "HDCP: authentication failed\n");
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hdcp_wq_authentication_failure();
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} else {
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/*hdcp->hdcp_state = HDCP_WAIT_KSV_LIST;*/
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@@ -434,7 +434,7 @@ static void hdcp_wq_authentication_success(void)
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{
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hdcp->auth_state = 1;
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if (timer_state == 1) {
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DBG("delete auth timer\n");
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HDMIDBG(3, "delete auth timer\n");
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timer_state = 0;
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del_timer_sync(&auth_timer);
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}
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@@ -473,12 +473,13 @@ static void hdcp_work_queue(struct work_struct *work)
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int event = hdcp_w->event;
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|
||||
mutex_lock(&hdcp->lock);
|
||||
DBG("hdcp_work_queue() - START - %u hdmi=%d hdcp=%d evt= %x %d\n",
|
||||
jiffies_to_msecs(jiffies),
|
||||
hdcp->hdmi_state,
|
||||
hdcp->hdcp_state,
|
||||
(event & 0xFF00) >> 8,
|
||||
event & 0xFF);
|
||||
HDMIDBG(3, "%s - START - %u hdmi=%d hdcp=%d evt= %x %d\n",
|
||||
__func__,
|
||||
jiffies_to_msecs(jiffies),
|
||||
hdcp->hdmi_state,
|
||||
hdcp->hdcp_state,
|
||||
(event & 0xFF00) >> 8,
|
||||
event & 0xFF);
|
||||
|
||||
if (event == HDCP_STOP_FRAME_EVENT)
|
||||
hdcp->hdmi_state = HDMI_STOPPED;
|
||||
@@ -559,7 +560,7 @@ static void hdcp_work_queue(struct work_struct *work)
|
||||
*/
|
||||
static void hdcp_start_frame_cb(struct hdmi *hdmi)
|
||||
{
|
||||
DBG("hdcp_start_frame_cb()\n");
|
||||
HDMIDBG(3, "hdcp_start_frame_cb()\n");
|
||||
|
||||
/* Cancel any pending work */
|
||||
if (hdcp->pending_start)
|
||||
@@ -568,7 +569,7 @@ static void hdcp_start_frame_cb(struct hdmi *hdmi)
|
||||
hdcp_cancel_work(&hdcp->pending_wq_event);
|
||||
|
||||
if (timer_state == 0) {
|
||||
DBG("add auth timer\n");
|
||||
HDMIDBG(3, "add auth timer\n");
|
||||
auth_timer.expires = jiffies + AUTH_TIMEOUT;
|
||||
add_timer(&auth_timer);
|
||||
timer_state = 1;
|
||||
@@ -591,7 +592,7 @@ static void hdcp_irq_cb(int status)
|
||||
rockchip_hdmiv1_hdcp_interrupt(hdcp->hdmi_dev,
|
||||
&interrupt1,
|
||||
&interrupt2);
|
||||
DBG("%s 0x%02x 0x%02x\n", __func__, interrupt1, interrupt2);
|
||||
HDMIDBG(3, "%s 0x%02x 0x%02x\n", __func__, interrupt1, interrupt2);
|
||||
if (interrupt1 & m_INT_HDCP_ERR) {
|
||||
if ((hdcp->hdcp_state != HDCP_DISABLED) &&
|
||||
(hdcp->hdcp_state != HDCP_ENABLE_PENDING))
|
||||
@@ -611,7 +612,7 @@ static void hdcp_irq_cb(int status)
|
||||
*/
|
||||
static int hdcp_power_on_cb(void)
|
||||
{
|
||||
DBG("%s", __func__);
|
||||
HDMIDBG(3, "%s", __func__);
|
||||
return rockchip_hdmiv1_hdcp_load_key2mem();
|
||||
}
|
||||
|
||||
@@ -623,9 +624,9 @@ static void hdcp_power_off_cb(struct hdmi *hdmi)
|
||||
{
|
||||
unsigned int time;
|
||||
|
||||
DBG("%s\n", __func__);
|
||||
HDMIDBG(3, "%s\n", __func__);
|
||||
if (timer_state == 1) {
|
||||
DBG("delete auth timer\n");
|
||||
HDMIDBG(3, "delete auth timer\n");
|
||||
timer_state = 0;
|
||||
del_timer_sync(&auth_timer);
|
||||
}
|
||||
@@ -664,8 +665,8 @@ static void hdcp_load_keys_cb(const struct firmware *fw, void *context)
|
||||
HDCP_WARN("HDCP: load hdcp key success\n");
|
||||
|
||||
if (fw->size > HDCP_KEY_SIZE) {
|
||||
DBG("%s invalid key size %d\n", __func__,
|
||||
(int)fw->size - HDCP_KEY_SIZE);
|
||||
HDMIDBG(3, "%s invalid key size %d\n", __func__,
|
||||
(int)fw->size - HDCP_KEY_SIZE);
|
||||
if ((fw->size - HDCP_KEY_SIZE) % 5) {
|
||||
pr_err("HDCP: failed to load invalid keys\n");
|
||||
return;
|
||||
@@ -759,7 +760,7 @@ int rockchip_hdmiv1_hdcp_init(struct hdmi *hdmi)
|
||||
{
|
||||
int ret;
|
||||
|
||||
DBG("[%s]\n", __func__);
|
||||
HDMIDBG(3, "[%s]\n", __func__);
|
||||
if (hdcp)
|
||||
return 0;
|
||||
|
||||
@@ -813,7 +814,7 @@ int rockchip_hdmiv1_hdcp_init(struct hdmi *hdmi)
|
||||
init_timer(&auth_timer);
|
||||
auth_timer.data = 0;
|
||||
auth_timer.function = auth_timer_func;
|
||||
DBG("%s success\n", __func__);
|
||||
HDMIDBG(3, "%s success\n", __func__);
|
||||
return 0;
|
||||
error5:
|
||||
destroy_workqueue(hdcp->workqueue);
|
||||
|
||||
@@ -430,7 +430,7 @@ static int rockchip_hdmiv1_config_vsi(struct hdmi *hdmi,
|
||||
char info[SIZE_VSI_INFOFRAME];
|
||||
int i;
|
||||
|
||||
DBG("[%s] vic_3d %d format %d.\n", __func__, vic_3d, format);
|
||||
HDMIDBG(2, "[%s] vic_3d %d format %d.\n", __func__, vic_3d, format);
|
||||
memset(info, 0, SIZE_VSI_INFOFRAME);
|
||||
hdmi_msk_reg(hdmi_dev, PACKET_SEND_AUTO,
|
||||
m_PACKET_VSI_EN, v_PACKET_VSI_EN(0));
|
||||
|
||||
@@ -152,7 +152,7 @@ static void rockchip_hdmiv2_early_suspend(struct early_suspend *h)
|
||||
struct hdmi *hdmi = hdmi_dev->hdmi;
|
||||
struct pinctrl_state *gpio_state;
|
||||
|
||||
HDMIDBG("hdmi enter early suspend\n");
|
||||
HDMIDBG(2, "hdmi enter early suspend\n");
|
||||
hdmi_submit_work(hdmi, HDMI_SUSPEND_CTL, 0, 1);
|
||||
/* iomux to gpio and pull down when suspend */
|
||||
gpio_state = pinctrl_lookup_state(hdmi_dev->dev->pins->p, "gpio");
|
||||
@@ -164,7 +164,7 @@ static void rockchip_hdmiv2_early_resume(struct early_suspend *h)
|
||||
{
|
||||
struct hdmi *hdmi = hdmi_dev->hdmi;
|
||||
|
||||
HDMIDBG("hdmi exit early resume\n");
|
||||
HDMIDBG(2, "hdmi exit early resume\n");
|
||||
/* iomux to default state for hdmi use when resume */
|
||||
pinctrl_select_state(hdmi_dev->dev->pins->p,
|
||||
hdmi_dev->dev->pins->default_state);
|
||||
@@ -341,7 +341,7 @@ static int rockchip_hdmiv2_fb_event_notify(struct notifier_block *self,
|
||||
case FB_BLANK_UNBLANK:
|
||||
break;
|
||||
default:
|
||||
HDMIDBG("suspend hdmi\n");
|
||||
HDMIDBG(2, "suspend hdmi\n");
|
||||
if (!hdmi->sleep) {
|
||||
hdmi_submit_work(hdmi,
|
||||
HDMI_SUSPEND_CTL,
|
||||
@@ -369,7 +369,7 @@ static int rockchip_hdmiv2_fb_event_notify(struct notifier_block *self,
|
||||
} else if (action == FB_EVENT_BLANK) {
|
||||
switch (*((int *)event->data)) {
|
||||
case FB_BLANK_UNBLANK:
|
||||
HDMIDBG("resume hdmi\n");
|
||||
HDMIDBG(2, "resume hdmi\n");
|
||||
if (hdmi->sleep) {
|
||||
#ifdef CONFIG_PINCTRL
|
||||
pinctrl_select_state(pins->p,
|
||||
@@ -565,7 +565,7 @@ static int rockchip_hdmiv2_probe(struct platform_device *pdev)
|
||||
int ret = -1;
|
||||
struct resource *res;
|
||||
|
||||
HDMIDBG("%s\n", __func__);
|
||||
HDMIDBG(2, "%s\n", __func__);
|
||||
hdmi_dev = kmalloc(sizeof(*hdmi_dev), GFP_KERNEL);
|
||||
if (!hdmi_dev) {
|
||||
dev_err(&pdev->dev, ">>rockchip hdmiv2 kmalloc fail!");
|
||||
|
||||
@@ -8,13 +8,6 @@
|
||||
#endif
|
||||
#include "../rockchip-hdmi.h"
|
||||
|
||||
#ifdef DEBUG
|
||||
#define HDMIDBG(format, ...) \
|
||||
pr_info(format, ## __VA_ARGS__)
|
||||
#else
|
||||
#define HDMIDBG(format, ...)
|
||||
#endif
|
||||
|
||||
#define HDMI_PD_ON BIT(0)
|
||||
#define HDMI_PCLK_ON BIT(1)
|
||||
#define HDMI_HDCPCLK_ON BIT(2)
|
||||
|
||||
@@ -7,11 +7,11 @@
|
||||
static int init = 1;
|
||||
void rockchip_hdmiv2_cec_isr(struct hdmi_dev *hdmi_dev, char cec_int)
|
||||
{
|
||||
CECDBG("%s cec 0x%x\n", __func__, cec_int);
|
||||
HDMIDBG(1, "%s cec 0x%x\n", __func__, cec_int);
|
||||
if (cec_int & m_EOM)
|
||||
rockchip_hdmi_cec_submit_work(EVENT_RX_FRAME, 0, NULL);
|
||||
if (cec_int & m_DONE)
|
||||
CECDBG("send frame success\n");
|
||||
HDMIDBG(1, "send frame success\n");
|
||||
}
|
||||
|
||||
static int rockchip_hdmiv2_cec_readframe(struct hdmi *hdmi,
|
||||
@@ -24,10 +24,10 @@ static int rockchip_hdmiv2_cec_readframe(struct hdmi *hdmi,
|
||||
if (((hdmi_dev->clk_on & HDMI_PCLK_ON) == 0) || !frame)
|
||||
return -1;
|
||||
count = hdmi_readl(hdmi_dev, CEC_RX_CNT);
|
||||
CECDBG("%s count %d\n", __func__, count);
|
||||
HDMIDBG(1, "%s count %d\n", __func__, count);
|
||||
for (i = 0; i < count; i++) {
|
||||
data[i] = hdmi_readl(hdmi_dev, CEC_RX_DATA0 + i);
|
||||
CECDBG("%02x\n", data[i]);
|
||||
HDMIDBG(1, "%02x\n", data[i]);
|
||||
}
|
||||
frame->argcount = count - 2;
|
||||
hdmi_writel(hdmi_dev, CEC_LOCK, 0x0);
|
||||
@@ -56,14 +56,14 @@ static int rockchip_hdmiv2_cec_sendframe(struct hdmi *hdmi,
|
||||
|
||||
if ((hdmi_dev->clk_on & HDMI_PCLK_ON) == 0)
|
||||
return CEC_SEND_NACK;
|
||||
CECDBG("TX srcdestaddr %02x opcode %02x ",
|
||||
frame->srcdestaddr, frame->opcode);
|
||||
HDMIDBG(1, "TX srcdestaddr %02x opcode %02x ",
|
||||
frame->srcdestaddr, frame->opcode);
|
||||
if (frame->argcount) {
|
||||
CECDBG("args:");
|
||||
HDMIDBG(1, "args:");
|
||||
for (i = 0; i < frame->argcount; i++)
|
||||
CECDBG("%02x ", frame->args[i]);
|
||||
HDMIDBG(1, "%02x ", frame->args[i]);
|
||||
}
|
||||
CECDBG("\n");
|
||||
HDMIDBG(1, "\n");
|
||||
if ((frame->srcdestaddr & 0x0f) == ((frame->srcdestaddr >> 4) & 0x0f)) {
|
||||
/*it is a ping command*/
|
||||
hdmi_writel(hdmi_dev, CEC_TX_DATA0, frame->srcdestaddr);
|
||||
@@ -92,7 +92,7 @@ static int rockchip_hdmiv2_cec_sendframe(struct hdmi *hdmi,
|
||||
break;
|
||||
}
|
||||
}
|
||||
CECDBG("%s interrupt 0x%02x\n", __func__, interrupt);
|
||||
HDMIDBG(1, "%s interrupt 0x%02x\n", __func__, interrupt);
|
||||
if (interrupt & m_DONE)
|
||||
return CEC_SEND_SUCCESS;
|
||||
else if (interrupt & m_NACK)
|
||||
@@ -116,5 +116,5 @@ void rockchip_hdmiv2_cec_init(struct hdmi *hdmi)
|
||||
|
||||
hdmi_writel(hdmi_dev, IH_MUTE_CEC_STAT0, m_ERR_INITIATOR |
|
||||
m_ARB_LOST | m_NACK | m_DONE);
|
||||
CECDBG("%s", __func__);
|
||||
HDMIDBG(1, "%s", __func__);
|
||||
}
|
||||
|
||||
@@ -375,7 +375,7 @@ static void rockchip_hdmiv2_scdc_set_tmds_rate(struct hdmi_dev *hdmi_dev)
|
||||
static int rockchip_hdmiv2_scrambling_enable(struct hdmi_dev *hdmi_dev,
|
||||
int enable)
|
||||
{
|
||||
HDMIDBG("%s enable %d\n", __func__, enable);
|
||||
HDMIDBG(2, "%s enable %d\n", __func__, enable);
|
||||
if (enable == 1) {
|
||||
/* Write on Rx the bit Scrambling_Enable, register 0x20 */
|
||||
rockchip_hdmiv2_i2cm_write_data(hdmi_dev, 1, SCDC_TMDS_CONFIG);
|
||||
@@ -406,7 +406,7 @@ static const struct ext_pll_config_tab *get_phy_ext_tab(
|
||||
|
||||
if (pixclock == 0)
|
||||
return NULL;
|
||||
HDMIDBG("%s pixClock %u tmdsclk %u colorDepth %d\n",
|
||||
HDMIDBG(2, "%s pixClock %u tmdsclk %u colorDepth %d\n",
|
||||
__func__, pixclock, tmdsclk, colordepth);
|
||||
for (i = 0; i < ARRAY_SIZE(EXT_PLL_TABLE); i++) {
|
||||
if ((EXT_PLL_TABLE[i].pix_clock == pixclock) &&
|
||||
@@ -425,7 +425,7 @@ static const struct phy_mpll_config_tab *get_phy_mpll_tab(
|
||||
|
||||
if (pixclock == 0)
|
||||
return NULL;
|
||||
HDMIDBG("%s pixClock %u tmdsclk %u pixRepet %d colorDepth %d\n",
|
||||
HDMIDBG(2, "%s pixClock %u tmdsclk %u pixRepet %d colorDepth %d\n",
|
||||
__func__, pixclock, tmdsclk, pixrepet, colordepth);
|
||||
for (i = 0; i < ARRAY_SIZE(PHY_MPLL_TABLE); i++) {
|
||||
if ((PHY_MPLL_TABLE[i].pix_clock == pixclock) &&
|
||||
@@ -1388,7 +1388,7 @@ static int hdmi_dev_detect_hotplug(struct hdmi *hdmi)
|
||||
u32 value;
|
||||
|
||||
value = hdmi_readl(hdmi_dev, PHY_STAT0);
|
||||
HDMIDBG("[%s] reg%x value %02x\n", __func__, PHY_STAT0, value);
|
||||
HDMIDBG(2, "[%s] reg%x value %02x\n", __func__, PHY_STAT0, value);
|
||||
if (value & m_PHY_HPD)
|
||||
return HDMI_HPD_ACTIVED;
|
||||
|
||||
@@ -1402,7 +1402,7 @@ static int hdmi_dev_read_edid(struct hdmi *hdmi, int block, unsigned char *buff)
|
||||
int offset = (block % 2) * 0x80;
|
||||
int interrupt = 0;
|
||||
|
||||
HDMIDBG("[%s] block %d\n", __func__, block);
|
||||
HDMIDBG(2, "[%s] block %d\n", __func__, block);
|
||||
|
||||
rockchip_hdmiv2_i2cm_reset(hdmi_dev);
|
||||
|
||||
@@ -1563,7 +1563,7 @@ static int hdmi_dev_config_vsi(struct hdmi *hdmi,
|
||||
|
||||
struct hdmi_dev *hdmi_dev = hdmi->property->priv;
|
||||
|
||||
HDMIDBG("[%s] vic %d format %d.\n", __func__, vic_3d, format);
|
||||
HDMIDBG(2, "[%s] vic %d format %d.\n", __func__, vic_3d, format);
|
||||
|
||||
hdmi_msk_reg(hdmi_dev, FC_DATAUTO0, m_VSD_AUTO, v_VSD_AUTO(0));
|
||||
hdmi_writel(hdmi_dev, FC_VSDIEEEID2, id & 0xff);
|
||||
@@ -1634,7 +1634,7 @@ static int hdmi_dev_config_video(struct hdmi *hdmi, struct hdmi_video *vpara)
|
||||
{
|
||||
struct hdmi_dev *hdmi_dev = hdmi->property->priv;
|
||||
|
||||
HDMIDBG("%s vic %d 3dformat %d color mode %d color depth %d\n",
|
||||
HDMIDBG(2, "%s vic %d 3dformat %d color mode %d color depth %d\n",
|
||||
__func__, vpara->vic, vpara->format_3d,
|
||||
vpara->color_output, vpara->color_output_depth);
|
||||
|
||||
@@ -1751,7 +1751,7 @@ static int hdmi_dev_config_audio(struct hdmi *hdmi, struct hdmi_audio *audio)
|
||||
int rate = 0;
|
||||
char design_id;
|
||||
|
||||
HDMIDBG("%s\n", __func__);
|
||||
HDMIDBG(2, "%s\n", __func__);
|
||||
|
||||
if (audio->channel < 3)
|
||||
channel = I2S_CHANNEL_1_2;
|
||||
@@ -1868,7 +1868,7 @@ static int hdmi_dev_config_audio(struct hdmi *hdmi, struct hdmi_audio *audio)
|
||||
word_length = I2S_16BIT_SAMPLE;
|
||||
}
|
||||
|
||||
HDMIDBG("rate = %d, tmdsclk = %u, N = %d, CTS = %d\n",
|
||||
HDMIDBG(2, "rate = %d, tmdsclk = %u, N = %d, CTS = %d\n",
|
||||
audio->rate, hdmi_dev->tmdsclk, N, CTS);
|
||||
/* more than 2 channels => layout 1 else layout 0 */
|
||||
hdmi_msk_reg(hdmi_dev, FC_AUDSCONF,
|
||||
@@ -1918,7 +1918,7 @@ static int hdmi_dev_config_audio(struct hdmi *hdmi, struct hdmi_audio *audio)
|
||||
*/
|
||||
if (audio->type == HDMI_AUDIO_NLPCM) {
|
||||
if (channel == I2S_CHANNEL_7_8) {
|
||||
HDMIDBG("hbr mode.\n");
|
||||
HDMIDBG(2, "hbr mode.\n");
|
||||
hdmi_writel(hdmi_dev, AUD_CONF2, 0x1);
|
||||
word_length = I2S_24BIT_SAMPLE;
|
||||
} else if ((audio->rate == HDMI_AUDIO_FS_32000) ||
|
||||
@@ -1926,7 +1926,7 @@ static int hdmi_dev_config_audio(struct hdmi *hdmi, struct hdmi_audio *audio)
|
||||
(audio->rate == HDMI_AUDIO_FS_48000) ||
|
||||
(audio->rate == HDMI_AUDIO_FS_176400) ||
|
||||
(audio->rate == HDMI_AUDIO_FS_192000)) {
|
||||
HDMIDBG("nlpcm mode.\n");
|
||||
HDMIDBG(2, "nlpcm mode.\n");
|
||||
hdmi_writel(hdmi_dev, AUD_CONF2, 0x2);
|
||||
word_length = I2S_24BIT_SAMPLE;
|
||||
} else {
|
||||
@@ -1982,7 +1982,7 @@ static int hdmi_dev_control_output(struct hdmi *hdmi, int enable)
|
||||
struct hdmi_dev *hdmi_dev = hdmi->property->priv;
|
||||
struct hdmi_video vpara;
|
||||
|
||||
HDMIDBG("[%s] %d\n", __func__, enable);
|
||||
HDMIDBG(2, "[%s] %d\n", __func__, enable);
|
||||
if (enable == HDMI_AV_UNMUTE) {
|
||||
hdmi_writel(hdmi_dev, FC_DBGFORCE, 0x00);
|
||||
if (hdmi->edid.sink_hdmi == OUTPUT_HDMI)
|
||||
@@ -2027,7 +2027,7 @@ static int hdmi_dev_insert(struct hdmi *hdmi)
|
||||
{
|
||||
struct hdmi_dev *hdmi_dev = hdmi->property->priv;
|
||||
|
||||
HDMIDBG("%s\n", __func__);
|
||||
HDMIDBG(2, "%s\n", __func__);
|
||||
if (!hdmi->uboot)
|
||||
hdmi_writel(hdmi_dev, MC_CLKDIS, m_HDCPCLK_DISABLE);
|
||||
return HDMI_ERROR_SUCCESS;
|
||||
@@ -2037,7 +2037,7 @@ static int hdmi_dev_remove(struct hdmi *hdmi)
|
||||
{
|
||||
struct hdmi_dev *hdmi_dev = hdmi->property->priv;
|
||||
|
||||
HDMIDBG("%s\n", __func__);
|
||||
HDMIDBG(2, "%s\n", __func__);
|
||||
if (hdmi->ops->hdcp_power_off_cb)
|
||||
hdmi->ops->hdcp_power_off_cb(hdmi);
|
||||
rockchip_hdmiv2_powerdown(hdmi_dev);
|
||||
@@ -2049,7 +2049,7 @@ static int hdmi_dev_enable(struct hdmi *hdmi)
|
||||
{
|
||||
struct hdmi_dev *hdmi_dev = hdmi->property->priv;
|
||||
|
||||
HDMIDBG("%s\n", __func__);
|
||||
HDMIDBG(2, "%s\n", __func__);
|
||||
if (!hdmi_dev->enable) {
|
||||
hdmi_writel(hdmi_dev, IH_MUTE, 0x00);
|
||||
hdmi_dev->enable = 1;
|
||||
@@ -2062,7 +2062,7 @@ static int hdmi_dev_disable(struct hdmi *hdmi)
|
||||
{
|
||||
struct hdmi_dev *hdmi_dev = hdmi->property->priv;
|
||||
|
||||
HDMIDBG("%s\n", __func__);
|
||||
HDMIDBG(2, "%s\n", __func__);
|
||||
if (hdmi_dev->enable) {
|
||||
hdmi_dev->enable = 0;
|
||||
hdmi_writel(hdmi_dev, IH_MUTE, 0x1);
|
||||
|
||||
Reference in New Issue
Block a user