10 Commits

Author SHA1 Message Date
cyw
6c04d006ae isp11: rockchip: adjust the calculation for isp clk
per isp clk cycle one Byte, don't reserved 20%.

Change-Id: Ibb09a1d9bb31643c8e89b8be67ccf4a1c28a6ac6
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2018-01-30 14:15:22 +08:00
Tao Huang
248b20b009 drivers: remove unused mtk_wcn_combo and mtk_wcn_bt
Change-Id: Ia906b9b60d327e286104fb22796eae901c27ce9e
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-01-30 11:50:30 +08:00
Hu Kejun
a07f02ef62 camera: rockchip: support set flip api
Change-Id: Ie1aea078e81a317bb938d2112902111ebbfe5fb8
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
2018-01-30 11:07:37 +08:00
Cai YiWei
1b195eb6be camera: rockchip: gc2023 update reg list
for high temperature defect rate.

Change-Id: Iab6d11bd4d7e13bcafcb4861936a9b7fdc368e60
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2018-01-29 17:53:02 +08:00
wuqiang
fb529f5ee8 ARM: dts: rv1108-campen-v10: enable audio codec
Change-Id: Ia231ade44a35006076ef4c0152dbfe33a23a7be0
Signed-off-by: Qiang Wu <xianlee.wu@rock-chips.com>
2018-01-29 17:24:35 +08:00
William Wu
85ed84263b usb: quirks: add device quirk for HD Camera PID 0x9320
The commit 3fbba5d340 ("uvcvideo: add quirk for devices
with broken auto suspend") introduced quirk to workaround
an issue with some HD Cameras.

There is one more model that has the same issue - idProduct
=0x9320, so applying the same quirk as well.

Change-Id: I07ea92ddea111f4c77e012ef32431e06909fe9b9
Signed-off-by: William Wu <william.wu@rock-chips.com>
2018-01-29 14:13:18 +08:00
Dingqiang Lin
c80fd8ff5e driver: rkflash: rejust ftl ecc detection strategy
devide flash into two ecc categories according to max_ecc_bits

Change-Id: I21d54ecc829548558992d77e04e6de4c57484a3f
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
2018-01-29 11:26:06 +08:00
Marc Zyngier
dd45e9fc9e FROMLIST: arm: Invalidate BTB on prefetch abort outside of user mapping on Cortex A8, A9, A12 and A17
In order to prevent aliasing attacks on the branch predictor,
invalidate the BTB on CPUs that are known to be affected when taking
a prefetch abort on a address that is outside of a user task limit.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
(cherry picked from git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git kpti
 commit a07373c8c365746583f25f49fee41b1bc0ff94b2)

CVE-2017-5715
Signed-off-by: Tao Huang <huangtao@rock-chips.com>

Change-Id: Ibc33f2f58ab8ba6b92ed64c0ea4d967e089fa584
2018-01-26 10:14:26 +08:00
Marc Zyngier
8b54045ce4 FROMLIST: arm: Add BTB invalidation on switch_mm for Cortex-A9, A12 and A17
In order to avoid aliasing attacks against the branch predictor,
some implementations require to invalidate the BTB when switching
from one user context to another.

For this, we reuse the existing implementation for Cortex-A8, and
apply it to A9, A12 and A17.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
(cherry picked from git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git kpti
 commit efcd0e857a656bbd1c1da15ff984ad6402332c61)

CVE-2017-5715
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(use overwrite other than initdata)

Change-Id: I82e36a84e0fabadb160ced0831cebd8a2c3ff46d
2018-01-26 10:01:37 +08:00
Meng Dongyang
49f9d46eda usb: gadget: uac: fix error of uac unit and add control unit
Accordding to the "Universal Serial Bus Device Class Definition
for Audio Devices", there are some error in the f_audio_source
driver. The audio source can't be recognize by the Windows PC
if control unit is not support. In order to support Windows PC,
this patch fix error in f_audio_source driver and add support of
control unit.

Change-Id: I527d00ff45aa7cda037ccb6150fedd218b5db1c3
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
2018-01-25 18:37:30 +08:00
316 changed files with 517 additions and 238695 deletions

View File

@@ -366,8 +366,10 @@
};
&camera2 {
rockchip,camera-ls = <&light_sensor0>;
rockchip,camera-ls-range = <0 750 950 1024>;
rockchip,pwr-gpio = <&gpio1 GPIO_D0 GPIO_ACTIVE_HIGH>;
rockchip,camera-module-name = "LA6271";
rockchip,camera-module-flip = <1>;
rockchip,camera-module-mirror = <1>;
};
&cif1to4 {
@@ -539,19 +541,17 @@
status = "okay";
};
&codec {
spk_ctl_io = <&gpio0 GPIO_B0 GPIO_ACTIVE_HIGH>;
rockchip,single-ended = <1>;
status = "okay";
};
&hdmi {
status = "okay";
pinctrl-0 = <&hdmi_cec &i2c2m1_xfer &hdmi_hpd>;
};
&camera2 {
rockchip,pwr-gpio = <&gpio1 GPIO_D0 GPIO_ACTIVE_HIGH>;
rockchip,camera-module-name = "LA6271";
rockchip,camera-module-flip = <1>;
rockchip,camera-module-mirror = <1>;
};
&pinctrl {
cif_dvp_pins {
cif-dvp-clk-out {

View File

@@ -222,12 +222,8 @@
#endif
#ifdef CONFIG_CPU_V7
# ifdef CPU_NAME
# undef MULTI_CPU
# define MULTI_CPU
# else
# define CPU_NAME cpu_v7
# endif
#endif
#ifdef CONFIG_CPU_PJ4B

View File

@@ -473,6 +473,10 @@ void __init smp_setup_processor_id(void)
printk(KERN_INFO "Booting Linux on physical CPU 0x%x\n", mpidr);
}
#ifdef CONFIG_CPU_V7
extern void cpu_v7_btbinv_switch_mm(unsigned long pgd_phys, struct mm_struct *mm);
#endif
static void __init setup_processor(void)
{
struct proc_info_list *list;
@@ -494,6 +498,17 @@ static void __init setup_processor(void)
#ifdef MULTI_CPU
processor = *list->proc;
#ifdef CONFIG_CPU_V7
switch(read_cpuid_part()) {
case ARM_CPU_PART_CORTEX_A8:
case ARM_CPU_PART_CORTEX_A9:
case ARM_CPU_PART_CORTEX_A12:
case ARM_CPU_PART_CORTEX_A17:
processor.switch_mm = cpu_v7_btbinv_switch_mm;
break;
}
printk("cpu_do_switch_mm is %pf\n", cpu_do_switch_mm);
#endif
#endif
#ifdef MULTI_TLB
cpu_tlb = *list->tlb;

View File

@@ -20,6 +20,8 @@
#include <linux/highmem.h>
#include <linux/perf_event.h>
#include <asm/cp15.h>
#include <asm/cputype.h>
#include <asm/exception.h>
#include <asm/pgtable.h>
#include <asm/system_misc.h>
@@ -181,6 +183,7 @@ __do_user_fault(struct task_struct *tsk, unsigned long addr,
si.si_errno = 0;
si.si_code = code;
si.si_addr = (void __user *)addr;
force_sig_info(sig, &si, tsk);
}
@@ -393,12 +396,35 @@ no_context:
__do_kernel_fault(mm, addr, fsr, regs);
return 0;
}
static int
do_pabt_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
{
if (addr > TASK_SIZE) {
switch(read_cpuid_part()) {
case ARM_CPU_PART_CORTEX_A8:
case ARM_CPU_PART_CORTEX_A9:
case ARM_CPU_PART_CORTEX_A12:
case ARM_CPU_PART_CORTEX_A17:
asm volatile("mcr p15, 0, %0, c7, c5, 6" : : "r" (0));
break;
}
}
return do_page_fault(addr, fsr, regs);
}
#else /* CONFIG_MMU */
static int
do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
{
return 0;
}
static int
do_pabt_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
{
return 0;
}
#endif /* CONFIG_MMU */
/*

View File

@@ -50,7 +50,7 @@ static struct fsr_info ifsr_info[] = {
{ do_bad, SIGBUS, 0, "unknown 4" },
{ do_translation_fault, SIGSEGV, SEGV_MAPERR, "section translation fault" },
{ do_bad, SIGSEGV, SEGV_ACCERR, "page access flag fault" },
{ do_page_fault, SIGSEGV, SEGV_MAPERR, "page translation fault" },
{ do_pabt_page_fault, SIGSEGV, SEGV_MAPERR, "page translation fault" },
{ do_bad, SIGBUS, 0, "external abort on non-linefetch" },
{ do_bad, SIGSEGV, SEGV_ACCERR, "section domain fault" },
{ do_bad, SIGBUS, 0, "unknown 10" },
@@ -58,7 +58,7 @@ static struct fsr_info ifsr_info[] = {
{ do_bad, SIGBUS, 0, "external abort on translation" },
{ do_sect_fault, SIGSEGV, SEGV_ACCERR, "section permission fault" },
{ do_bad, SIGBUS, 0, "external abort on translation" },
{ do_page_fault, SIGSEGV, SEGV_ACCERR, "page permission fault" },
{ do_pabt_page_fault, SIGSEGV, SEGV_ACCERR, "page permission fault" },
{ do_bad, SIGBUS, 0, "unknown 16" },
{ do_bad, SIGBUS, 0, "unknown 17" },
{ do_bad, SIGBUS, 0, "unknown 18" },

View File

@@ -65,4 +65,69 @@ static struct fsr_info fsr_info[] = {
{ do_bad, SIGBUS, 0, "unknown 63" },
};
#define ifsr_info fsr_info
static struct fsr_info ifsr_info[] = {
{ do_bad, SIGBUS, 0, "unknown 0" },
{ do_bad, SIGBUS, 0, "unknown 1" },
{ do_bad, SIGBUS, 0, "unknown 2" },
{ do_bad, SIGBUS, 0, "unknown 3" },
{ do_bad, SIGBUS, 0, "reserved translation fault" },
{ do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 1 translation fault" },
{ do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 2 translation fault" },
{ do_pabt_page_fault, SIGSEGV, SEGV_MAPERR, "level 3 translation fault" },
{ do_bad, SIGBUS, 0, "reserved access flag fault" },
{ do_bad, SIGSEGV, SEGV_ACCERR, "level 1 access flag fault" },
{ do_pabt_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 access flag fault" },
{ do_pabt_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 access flag fault" },
{ do_bad, SIGBUS, 0, "reserved permission fault" },
{ do_bad, SIGSEGV, SEGV_ACCERR, "level 1 permission fault" },
{ do_pabt_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 permission fault" },
{ do_pabt_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 permission fault" },
{ do_bad, SIGBUS, 0, "synchronous external abort" },
{ do_bad, SIGBUS, 0, "asynchronous external abort" },
{ do_bad, SIGBUS, 0, "unknown 18" },
{ do_bad, SIGBUS, 0, "unknown 19" },
{ do_bad, SIGBUS, 0, "synchronous abort (translation table walk)" },
{ do_bad, SIGBUS, 0, "synchronous abort (translation table walk)" },
{ do_bad, SIGBUS, 0, "synchronous abort (translation table walk)" },
{ do_bad, SIGBUS, 0, "synchronous abort (translation table walk)" },
{ do_bad, SIGBUS, 0, "synchronous parity error" },
{ do_bad, SIGBUS, 0, "asynchronous parity error" },
{ do_bad, SIGBUS, 0, "unknown 26" },
{ do_bad, SIGBUS, 0, "unknown 27" },
{ do_bad, SIGBUS, 0, "synchronous parity error (translation table walk" },
{ do_bad, SIGBUS, 0, "synchronous parity error (translation table walk" },
{ do_bad, SIGBUS, 0, "synchronous parity error (translation table walk" },
{ do_bad, SIGBUS, 0, "synchronous parity error (translation table walk" },
{ do_bad, SIGBUS, 0, "unknown 32" },
{ do_bad, SIGBUS, BUS_ADRALN, "alignment fault" },
{ do_bad, SIGBUS, 0, "debug event" },
{ do_bad, SIGBUS, 0, "unknown 35" },
{ do_bad, SIGBUS, 0, "unknown 36" },
{ do_bad, SIGBUS, 0, "unknown 37" },
{ do_bad, SIGBUS, 0, "unknown 38" },
{ do_bad, SIGBUS, 0, "unknown 39" },
{ do_bad, SIGBUS, 0, "unknown 40" },
{ do_bad, SIGBUS, 0, "unknown 41" },
{ do_bad, SIGBUS, 0, "unknown 42" },
{ do_bad, SIGBUS, 0, "unknown 43" },
{ do_bad, SIGBUS, 0, "unknown 44" },
{ do_bad, SIGBUS, 0, "unknown 45" },
{ do_bad, SIGBUS, 0, "unknown 46" },
{ do_bad, SIGBUS, 0, "unknown 47" },
{ do_bad, SIGBUS, 0, "unknown 48" },
{ do_bad, SIGBUS, 0, "unknown 49" },
{ do_bad, SIGBUS, 0, "unknown 50" },
{ do_bad, SIGBUS, 0, "unknown 51" },
{ do_bad, SIGBUS, 0, "implementation fault (lockdown abort)" },
{ do_bad, SIGBUS, 0, "unknown 53" },
{ do_bad, SIGBUS, 0, "unknown 54" },
{ do_bad, SIGBUS, 0, "unknown 55" },
{ do_bad, SIGBUS, 0, "unknown 56" },
{ do_bad, SIGBUS, 0, "unknown 57" },
{ do_bad, SIGBUS, 0, "implementation fault (coprocessor abort)" },
{ do_bad, SIGBUS, 0, "unknown 59" },
{ do_bad, SIGBUS, 0, "unknown 60" },
{ do_bad, SIGBUS, 0, "unknown 61" },
{ do_bad, SIGBUS, 0, "unknown 62" },
{ do_bad, SIGBUS, 0, "unknown 63" },
};

View File

@@ -37,6 +37,11 @@
* It is assumed that:
* - we are not using split page tables
*/
ENTRY(cpu_v7_btbinv_switch_mm)
#ifdef CONFIG_MMU
mov r2, #0
mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB
#endif
ENTRY(cpu_v7_switch_mm)
#ifdef CONFIG_MMU
mov r2, #0
@@ -61,6 +66,7 @@ ENTRY(cpu_v7_switch_mm)
#endif
mov pc, lr
ENDPROC(cpu_v7_switch_mm)
ENDPROC(cpu_v7_btbinv_switch_mm)
/*
* cpu_v7_set_pte_ext(ptep, pte)

View File

@@ -45,6 +45,11 @@
* Set the translation table base pointer to be pgd_phys (physical address of
* the new TTB).
*/
ENTRY(cpu_v7_btbinv_switch_mm)
#ifdef CONFIG_MMU
mov r2, #0
mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB
#endif
ENTRY(cpu_v7_switch_mm)
#ifdef CONFIG_MMU
mmid r1, r1 @ get mm->context.id
@@ -55,6 +60,7 @@ ENTRY(cpu_v7_switch_mm)
#endif
mov pc, lr
ENDPROC(cpu_v7_switch_mm)
ENDPROC(cpu_v7_btbinv_switch_mm)
#ifdef __ARMEB__
#define rl r3

View File

@@ -51,8 +51,6 @@ void aptina_camera_module_reset(
cam_mod->exp_config.auto_exp = false;
cam_mod->exp_config.auto_gain = false;
cam_mod->wb_config.auto_wb = false;
cam_mod->hflip = false;
cam_mod->vflip = false;
cam_mod->auto_adjust_fps = true;
cam_mod->rotation = 0;
cam_mod->ctrl_updt = 0;
@@ -1153,12 +1151,14 @@ int aptina_camera_module_s_ext_ctrls(
cam_mod->hflip = true;
else
cam_mod->hflip = false;
cam_mod->flip_flg = true;
break;
case V4L2_CID_VFLIP:
if (ctrl->value)
cam_mod->vflip = true;
else
cam_mod->vflip = false;
cam_mod->flip_flg = true;
break;
default:
pltfrm_camera_module_pr_warn(&cam_mod->sd,
@@ -1329,7 +1329,22 @@ long aptina_camera_module_ioctl(struct v4l2_subdev *sd,
int aptina_camera_module_get_flip_mirror(
struct aptina_camera_module *cam_mod)
{
return pltfrm_camera_module_get_flip_mirror(&cam_mod->sd);
int mode = 0;
if (!cam_mod->flip_flg)
return -1;
if (cam_mod->hflip)
mode |= APTINA_MIRROR_BIT_MASK;
else
mode &= ~APTINA_MIRROR_BIT_MASK;
if (cam_mod->vflip)
mode |= APTINA_FLIP_BIT_MASK;
else
mode &= ~APTINA_FLIP_BIT_MASK;
return mode;
}
int aptina_camera_module_enum_frameintervals(
@@ -1425,9 +1440,13 @@ int aptina_camera_module_init(struct aptina_camera_module *cam_mod,
struct aptina_camera_module_custom_config *custom)
{
int ret = 0;
int mode = 0;
pltfrm_camera_module_pr_debug(&cam_mod->sd, "\n");
cam_mod->hflip = false;
cam_mod->vflip = false;
cam_mod->flip_flg = false;
aptina_camera_module_reset(cam_mod);
if (IS_ERR_OR_NULL(custom->start_streaming) ||
@@ -1455,6 +1474,13 @@ int aptina_camera_module_init(struct aptina_camera_module *cam_mod,
goto err;
}
mode = pltfrm_camera_module_get_flip_mirror(&cam_mod->sd);
if (mode != -1) {
cam_mod->hflip = mode & APTINA_MIRROR_BIT_MASK ? true : false;
cam_mod->vflip = mode & APTINA_FLIP_BIT_MASK ? true : false;
cam_mod->flip_flg = true;
}
return 0;
err:
pltfrm_camera_module_pr_err(&cam_mod->sd,

View File

@@ -189,6 +189,7 @@ struct aptina_camera_module {
bool frm_intrvl_valid;
bool hflip;
bool vflip;
bool flip_flg;
u32 rotation;
void *pltfm_data;
bool inited;

View File

@@ -136,9 +136,10 @@ static struct gc_camera_module_reg gc2023_init_tab_1920_1080_30fps_1lane[] = {
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0x24, 0xc1},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0x25, 0x18},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0x26, 0x64},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0x28, 0xf4},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0x28, 0xe8},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0x29, 0x08},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0x2a, 0x08},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0x2b, 0x48},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0x2f, 0x40},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0x30, 0x99},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0x34, 0x00},
@@ -148,7 +149,7 @@ static struct gc_camera_module_reg gc2023_init_tab_1920_1080_30fps_1lane[] = {
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0xcc, 0x8a},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0xcd, 0x99},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0xcf, 0x70},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0xd0, 0x9a},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0xd0, 0x9c},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0xd2, 0xc1},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0xd8, 0x80},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0xda, 0x28},
@@ -168,8 +169,8 @@ static struct gc_camera_module_reg gc2023_init_tab_1920_1080_30fps_1lane[] = {
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0x88, 0x73},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0x89, 0x03},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0x90, 0x01},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0x92, 0x00}, /* crop win y */
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0x94, 0x00}, /* crop win x */
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0x92, 0x02}, /* crop win y */
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0x94, 0x02}, /* crop win x */
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0x95, 0x04}, /* crop win height */
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0x96, 0x38},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0x97, 0x07}, /* crop win width 1920 */
@@ -185,7 +186,7 @@ static struct gc_camera_module_reg gc2023_init_tab_1920_1080_30fps_1lane[] = {
/* GAIN */
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0xfe, 0x00},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0xb0, 0x48},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0xb0, 0x58},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0xb1, 0x01},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0xb2, 0x00},
{GC_CAMERA_MODULE_REG_SINGLE_ONE_BYTE_DATA, 0xb6, 0x00},

View File

@@ -45,8 +45,6 @@ static void gc_camera_module_reset(
cam_mod->exp_config.auto_exp = false;
cam_mod->exp_config.auto_gain = false;
cam_mod->wb_config.auto_wb = false;
cam_mod->hflip = false;
cam_mod->vflip = false;
cam_mod->auto_adjust_fps = true;
cam_mod->rotation = 0;
cam_mod->ctrl_updt = 0;
@@ -931,12 +929,14 @@ int gc_camera_module_s_ext_ctrls(
cam_mod->hflip = true;
else
cam_mod->hflip = false;
cam_mod->flip_flg = true;
break;
case V4L2_CID_VFLIP:
if (ctrl->value)
cam_mod->vflip = true;
else
cam_mod->vflip = false;
cam_mod->flip_flg = true;
break;
default:
pltfrm_camera_module_pr_warn(&cam_mod->sd,
@@ -1107,7 +1107,22 @@ long gc_camera_module_ioctl(struct v4l2_subdev *sd,
int gc_camera_module_get_flip_mirror(
struct gc_camera_module *cam_mod)
{
return pltfrm_camera_module_get_flip_mirror(&cam_mod->sd);
int mode = 0;
if (!cam_mod->flip_flg)
return -1;
if (cam_mod->hflip)
mode |= GC_MIRROR_BIT_MASK;
else
mode &= ~GC_MIRROR_BIT_MASK;
if (cam_mod->vflip)
mode |= GC_FLIP_BIT_MASK;
else
mode &= ~GC_FLIP_BIT_MASK;
return mode;
}
/* ======================================================================== */
@@ -1224,9 +1239,13 @@ int gc_camera_module_init(struct gc_camera_module *cam_mod,
struct gc_camera_module_custom_config *custom)
{
int ret = 0;
int mode = 0;
pltfrm_camera_module_pr_debug(&cam_mod->sd, "\n");
cam_mod->hflip = false;
cam_mod->vflip = false;
cam_mod->flip_flg = false;
gc_camera_module_reset(cam_mod);
if (IS_ERR_OR_NULL(custom->start_streaming) ||
@@ -1254,6 +1273,13 @@ int gc_camera_module_init(struct gc_camera_module *cam_mod,
goto err;
}
mode = pltfrm_camera_module_get_flip_mirror(&cam_mod->sd);
if (mode != -1) {
cam_mod->hflip = mode & GC_MIRROR_BIT_MASK ? true : false;
cam_mod->vflip = mode & GC_FLIP_BIT_MASK ? true : false;
cam_mod->flip_flg = true;
}
/*
if (custom->check_camera_id) {
gc_camera_module_s_power(&cam_mod->sd, 1);

View File

@@ -202,6 +202,7 @@ struct gc_camera_module {
bool frm_intrvl_valid;
bool hflip;
bool vflip;
bool flip_flg;
u32 rotation;
void *pltfm_data;
bool inited;

View File

@@ -45,8 +45,6 @@ static void imx_camera_module_reset(
cam_mod->exp_config.auto_exp = false;
cam_mod->exp_config.auto_gain = false;
cam_mod->wb_config.auto_wb = false;
cam_mod->hflip = false;
cam_mod->vflip = false;
cam_mod->auto_adjust_fps = true;
cam_mod->rotation = 0;
cam_mod->ctrl_updt = 0;
@@ -910,12 +908,14 @@ int imx_camera_module_s_ext_ctrls(
cam_mod->hflip = true;
else
cam_mod->hflip = false;
cam_mod->flip_flg = true;
break;
case V4L2_CID_VFLIP:
if (ctrl->value)
cam_mod->vflip = true;
else
cam_mod->vflip = false;
cam_mod->flip_flg = true;
break;
default:
pltfrm_camera_module_pr_warn(&cam_mod->sd,
@@ -1103,7 +1103,22 @@ long imx_camera_module_ioctl(struct v4l2_subdev *sd,
int imx_camera_module_get_flip_mirror(
struct imx_camera_module *cam_mod)
{
return pltfrm_camera_module_get_flip_mirror(&cam_mod->sd);
int mode = 0;
if (!cam_mod->flip_flg)
return -1;
if (cam_mod->hflip)
mode |= IMX_MIRROR_BIT_MASK;
else
mode &= ~IMX_MIRROR_BIT_MASK;
if (cam_mod->vflip)
mode |= IMX_FLIP_BIT_MASK;
else
mode &= ~IMX_FLIP_BIT_MASK;
return mode;
}
/* ======================================================================== */
@@ -1200,9 +1215,13 @@ int imx_camera_module_init(struct imx_camera_module *cam_mod,
struct imx_camera_module_custom_config *custom)
{
int ret = 0;
int mode = 0;
pltfrm_camera_module_pr_debug(&cam_mod->sd, "\n");
cam_mod->hflip = false;
cam_mod->vflip = false;
cam_mod->flip_flg = false;
imx_camera_module_reset(cam_mod);
if (IS_ERR_OR_NULL(custom->start_streaming) ||
@@ -1229,6 +1248,13 @@ int imx_camera_module_init(struct imx_camera_module *cam_mod,
imx_camera_module_release(cam_mod);
goto err;
}
mode = pltfrm_camera_module_get_flip_mirror(&cam_mod->sd);
if (mode != -1) {
cam_mod->hflip = mode & IMX_MIRROR_BIT_MASK ? true : false;
cam_mod->vflip = mode & IMX_FLIP_BIT_MASK ? true : false;
cam_mod->flip_flg = true;
}
/*
if (custom->check_camera_id) {
imx_camera_module_s_power(&cam_mod->sd, 1);

View File

@@ -194,6 +194,7 @@ struct imx_camera_module {
bool frm_intrvl_valid;
bool hflip;
bool vflip;
bool flip_flg;
u32 rotation;
void *pltfm_data;
bool inited;

View File

@@ -45,8 +45,6 @@ static void ov_camera_module_reset(
cam_mod->exp_config.auto_exp = false;
cam_mod->exp_config.auto_gain = false;
cam_mod->wb_config.auto_wb = false;
cam_mod->hflip = false;
cam_mod->vflip = false;
cam_mod->auto_adjust_fps = true;
cam_mod->rotation = 0;
cam_mod->ctrl_updt = 0;
@@ -931,12 +929,14 @@ int ov_camera_module_s_ext_ctrls(
cam_mod->hflip = true;
else
cam_mod->hflip = false;
cam_mod->flip_flg = true;
break;
case V4L2_CID_VFLIP:
if (ctrl->value)
cam_mod->vflip = true;
else
cam_mod->vflip = false;
cam_mod->flip_flg = true;
break;
default:
pltfrm_camera_module_pr_warn(&cam_mod->sd,
@@ -1122,7 +1122,22 @@ long ov_camera_module_ioctl(struct v4l2_subdev *sd,
int ov_camera_module_get_flip_mirror(
struct ov_camera_module *cam_mod)
{
return pltfrm_camera_module_get_flip_mirror(&cam_mod->sd);
int mode = 0;
if (!cam_mod->flip_flg)
return -1;
if (cam_mod->hflip)
mode |= OV_MIRROR_BIT_MASK;
else
mode &= ~OV_MIRROR_BIT_MASK;
if (cam_mod->vflip)
mode |= OV_FLIP_BIT_MASK;
else
mode &= ~OV_FLIP_BIT_MASK;
return mode;
}
/* ======================================================================== */
@@ -1236,9 +1251,13 @@ int ov_camera_module_init(struct ov_camera_module *cam_mod,
struct ov_camera_module_custom_config *custom)
{
int ret = 0;
int mode = 0;
pltfrm_camera_module_pr_debug(&cam_mod->sd, "\n");
cam_mod->hflip = false;
cam_mod->vflip = false;
cam_mod->flip_flg = false;
ov_camera_module_reset(cam_mod);
if (IS_ERR_OR_NULL(custom->start_streaming) ||
@@ -1266,6 +1285,13 @@ int ov_camera_module_init(struct ov_camera_module *cam_mod,
goto err;
}
mode = pltfrm_camera_module_get_flip_mirror(&cam_mod->sd);
if (mode != -1) {
cam_mod->hflip = mode & OV_MIRROR_BIT_MASK ? true : false;
cam_mod->vflip = mode & OV_FLIP_BIT_MASK ? true : false;
cam_mod->flip_flg = true;
}
/*
if (custom->check_camera_id) {
ov_camera_module_s_power(&cam_mod->sd, 1);

View File

@@ -198,6 +198,7 @@ struct ov_camera_module {
bool frm_intrvl_valid;
bool hflip;
bool vflip;
bool flip_flg;
u32 rotation;
void *pltfm_data;
bool inited;

View File

@@ -51,8 +51,6 @@ void samsung_camera_module_reset(
cam_mod->exp_config.auto_exp = false;
cam_mod->exp_config.auto_gain = false;
cam_mod->wb_config.auto_wb = false;
cam_mod->hflip = false;
cam_mod->vflip = false;
cam_mod->auto_adjust_fps = true;
cam_mod->rotation = 0;
cam_mod->ctrl_updt = 0;
@@ -943,12 +941,14 @@ int samsung_camera_module_s_ext_ctrls(
cam_mod->hflip = true;
else
cam_mod->hflip = false;
cam_mod->flip_flg = true;
break;
case V4L2_CID_VFLIP:
if (ctrl->value)
cam_mod->vflip = true;
else
cam_mod->vflip = false;
cam_mod->flip_flg = true;
break;
default:
pltfrm_camera_module_pr_warn(&cam_mod->sd,
@@ -1134,7 +1134,22 @@ long samsung_camera_module_ioctl(struct v4l2_subdev *sd,
int samsung_camera_module_get_flip_mirror(
struct samsung_camera_module *cam_mod)
{
return pltfrm_camera_module_get_flip_mirror(&cam_mod->sd);
int mode = 0;
if (!cam_mod->flip_flg)
return -1;
if (cam_mod->hflip)
mode |= SAMSUNG_MIRROR_BIT_MASK;
else
mode &= ~SAMSUNG_MIRROR_BIT_MASK;
if (cam_mod->vflip)
mode |= SAMSUNG_FLIP_BIT_MASK;
else
mode &= ~SAMSUNG_FLIP_BIT_MASK;
return mode;
}
int samsung_camera_module_enum_frameintervals(
@@ -1232,9 +1247,13 @@ int samsung_camera_module_init(struct samsung_camera_module *cam_mod,
struct samsung_camera_module_custom_config *custom)
{
int ret = 0;
int mode = 0;
pltfrm_camera_module_pr_debug(&cam_mod->sd, "\n");
cam_mod->hflip = false;
cam_mod->vflip = false;
cam_mod->flip_flg = false;
samsung_camera_module_reset(cam_mod);
if (IS_ERR_OR_NULL(custom->start_streaming) ||
@@ -1262,6 +1281,13 @@ int samsung_camera_module_init(struct samsung_camera_module *cam_mod,
goto err;
}
mode = pltfrm_camera_module_get_flip_mirror(&cam_mod->sd);
if (mode != -1) {
cam_mod->hflip = mode & SAMSUNG_MIRROR_BIT_MASK ? true : false;
cam_mod->vflip = mode & SAMSUNG_FLIP_BIT_MASK ? true : false;
cam_mod->flip_flg = true;
}
return 0;
err:
pltfrm_camera_module_pr_err(&cam_mod->sd,

View File

@@ -194,6 +194,7 @@ struct samsung_camera_module {
bool frm_intrvl_valid;
bool hflip;
bool vflip;
bool flip_flg;
u32 rotation;
void *pltfm_data;
bool inited;

View File

@@ -49,8 +49,6 @@ static void xc9080_camera_module_reset(
cam_mod->exp_config.auto_exp = false;
cam_mod->exp_config.auto_gain = false;
cam_mod->wb_config.auto_wb = false;
cam_mod->hflip = false;
cam_mod->vflip = false;
cam_mod->auto_adjust_fps = true;
cam_mod->rotation = 0;
cam_mod->ctrl_updt = 0;
@@ -950,12 +948,14 @@ int xc9080_camera_module_s_ext_ctrls(
cam_mod->hflip = true;
else
cam_mod->hflip = false;
cam_mod->flip_flg = true;
break;
case V4L2_CID_VFLIP:
if (ctrl->value)
cam_mod->vflip = true;
else
cam_mod->vflip = false;
cam_mod->flip_flg = true;
break;
default:
pltfrm_camera_module_pr_warn(&cam_mod->sd,
@@ -1125,7 +1125,22 @@ long xc9080_camera_module_ioctl(struct v4l2_subdev *sd,
int xc9080_camera_module_get_flip_mirror(
struct xc9080_camera_module *cam_mod)
{
return pltfrm_camera_module_get_flip_mirror(&cam_mod->sd);
int mode = 0;
if (!cam_mod->flip_flg)
return -1;
if (cam_mod->hflip)
mode |= XC9080_MIRROR_BIT_MASK;
else
mode &= ~XC9080_MIRROR_BIT_MASK;
if (cam_mod->vflip)
mode |= XC9080_FLIP_BIT_MASK;
else
mode &= ~XC9080_FLIP_BIT_MASK;
return mode;
}
/* ======================================================================== */
@@ -1407,9 +1422,13 @@ int xc9080_camera_module_init(struct xc9080_camera_module *cam_mod,
struct xc9080_camera_module_custom_config *custom)
{
int ret = 0;
int mode = 0;
pltfrm_camera_module_pr_debug(&cam_mod->sd, "\n");
cam_mod->hflip = false;
cam_mod->vflip = false;
cam_mod->flip_flg = false;
xc9080_camera_module_reset(cam_mod);
if (IS_ERR_OR_NULL(custom->start_streaming) ||
@@ -1437,6 +1456,13 @@ int xc9080_camera_module_init(struct xc9080_camera_module *cam_mod,
goto err;
}
mode = pltfrm_camera_module_get_flip_mirror(&cam_mod->sd);
if (mode != -1) {
cam_mod->hflip = mode & XC9080_MIRROR_BIT_MASK ? true : false;
cam_mod->vflip = mode & XC9080_FLIP_BIT_MASK ? true : false;
cam_mod->flip_flg = true;
}
return 0;
err:
pltfrm_camera_module_pr_err(&cam_mod->sd,

View File

@@ -30,6 +30,8 @@
#define XC9080_CAMERA_MODULE_REG_TYPE_DATA_SINGLE \
PLTFRM_CAMERA_MODULE_REG_TYPE_DATA_SINGLE
#define xc9080_camera_module_reg pltfrm_camera_module_reg
#define XC9080_FLIP_BIT_MASK (1 << PLTFRM_CAMERA_MODULE_FLIP_BIT)
#define XC9080_MIRROR_BIT_MASK (1 << PLTFRM_CAMERA_MODULE_MIRROR_BIT)
#define XC9080_CAMERA_MODULE_CTRL_UPDT_GAIN 0x01
#define XC9080_CAMERA_MODULE_CTRL_UPDT_EXP_TIME 0x02
@@ -204,6 +206,7 @@ struct xc9080_camera_module {
bool frm_intrvl_valid;
bool hflip;
bool vflip;
bool flip_flg;
u32 rotation;
void *pltfm_data;
bool inited;

View File

@@ -271,18 +271,18 @@ static int soc_clk_disable(void)
static int soc_isp_clk_cfg(int *data_rate)
{
int isp_clk[] = {396, 480, 594};
int isp_clk[] = {400, 480, 594};
int tmp, i;
struct cif_isp11_clk_rst_rv1108 *clk_rst = &rv1108->clk_rst;
tmp = (*data_rate * 10) >> 6;
tmp = *data_rate >> 3;
for (i = 0; i < ARRAY_SIZE(isp_clk); i++)
if (tmp <= isp_clk[i])
break;
if (i == ARRAY_SIZE(isp_clk))
i--;
if (isp_clk[i] > 396)
if (isp_clk[i] > 400)
pr_warn("rv1108 isp signoff is 360MHz, using %dMHz maybe unstable\n",
isp_clk[i]);

View File

@@ -1,47 +0,0 @@
# Copyright Statement:
#
# This software/firmware and related documentation ("MediaTek Software") are
# protected under relevant copyright laws. The information contained herein is
# confidential and proprietary to MediaTek Inc. and/or its licensors. Without
# the prior written permission of MediaTek inc. and/or its licensors, any
# reproduction, modification, use or disclosure of MediaTek Software, and
# information contained herein, in whole or in part, shall be strictly
# prohibited.
#
# MediaTek Inc. (C) 2010. All rights reserved.
#
# BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
# THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
# RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
# ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
# WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
# WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
# NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
# RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
# INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
# TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
# RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
# OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
# SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
# RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
# STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
# ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
# RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
# MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
# CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
#
# The following software/firmware and/or related documentation ("MediaTek
# Software") have been modified by MediaTek Inc. All revisions are subject to
# any receiver's applicable license agreements with MediaTek Inc.
#
# Makefile for the MediaTek Bluetooth hardware control driver.
#
ccflags-y += -fno-pic
obj-y += bt_hwctl.o
bt_hwctl-y := bt_hwctl_dev.o
bt_hwctl-y += bt_eirq_handler.o
bt_hwctl-y += bt_plat_smdk.o
bt_hwctl-objs := $(bt_hwctl-y)

View File

@@ -1,79 +0,0 @@
/* Copyright Statement:
*
* This software/firmware and related documentation ("MediaTek Software") are
* protected under relevant copyright laws. The information contained herein is
* confidential and proprietary to MediaTek Inc. and/or its licensors. Without
* the prior written permission of MediaTek inc. and/or its licensors, any
* reproduction, modification, use or disclosure of MediaTek Software, and
* information contained herein, in whole or in part, shall be strictly
* prohibited.
*
* MediaTek Inc. (C) 2010. All rights reserved.
*
* BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
* ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
* WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
* WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
* NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
* RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
* INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
* TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
* RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
* OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
* SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
* RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
* STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
* ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
* RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
* MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
* CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
*
* The following software/firmware and/or related documentation ("MediaTek
* Software") have been modified by MediaTek Inc. All revisions are subject to
* any receiver's applicable license agreements with MediaTek Inc.
*/
#include <net/bluetooth/bluetooth.h>
#include <net/bluetooth/hci_core.h>
#include "bt_hwctl.h"
extern wait_queue_head_t eint_wait;
extern int eint_gen;
extern int eint_handle_method; // 0: for 4.1; 1: for 4.2
irqreturn_t mt_bt_eirq_handler(int i, void *arg)
{
struct hci_dev *hdev = NULL;
//printk(KERN_ALERT "mt_bt_eirq_handler\n");
mt_bt_disable_irq();
if(eint_handle_method == 0) {
//#ifdef CONFIG_BT_HCIUART
/* BlueZ stack, hci_uart driver */
hdev = hci_dev_get(0);
if(hdev == NULL){
/* Avoid the early interrupt before hci0 registered */
//BT_HWCTL_ALERT("hdev is NULL\n");
}else{
//BT_HWCTL_ALERT("EINT arrives! notify host wakeup\n");
//printk("Send host wakeup command\n");
hci_send_cmd(hdev, 0xFCC1, 0, NULL);
/* enable irq after receiving host wakeup command's event */
}
mt_bt_enable_irq();
} else {
//#else
/* Maybe handle the interrupt in user space? */
eint_gen = 1;
wake_up_interruptible(&eint_wait);
/* Send host wakeup command in user space, enable irq then */
//#endif
}
return IRQ_HANDLED;
}

View File

@@ -1,66 +0,0 @@
/* Copyright Statement:
*
* This software/firmware and related documentation ("MediaTek Software") are
* protected under relevant copyright laws. The information contained herein is
* confidential and proprietary to MediaTek Inc. and/or its licensors. Without
* the prior written permission of MediaTek inc. and/or its licensors, any
* reproduction, modification, use or disclosure of MediaTek Software, and
* information contained herein, in whole or in part, shall be strictly
* prohibited.
*
* MediaTek Inc. (C) 2010. All rights reserved.
*
* BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
* ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
* WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
* WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
* NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
* RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
* INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
* TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
* RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
* OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
* SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
* RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
* STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
* ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
* RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
* MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
* CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
*
* The following software/firmware and/or related documentation ("MediaTek
* Software") have been modified by MediaTek Inc. All revisions are subject to
* any receiver's applicable license agreements with MediaTek Inc.
*/
#ifndef __MTK_BT_HWCTL_H
#define __MTK_BT_HWCTL_H
#include <linux/types.h>
#include <linux/irq.h>
#include <linux/rfkill-rk.h>
#include <linux/wakelock.h>
struct gpio_set {
unsigned int gpio;
int requested;
char *label;
};
extern void mt_bt_gpio_init(void);
extern void mt_bt_gpio_release(void);
extern int mt_bt_power_init(void);
extern int mt_bt_power_on(void);
extern void mt_bt_power_off(void);
extern irqreturn_t mt_bt_eirq_handler(int, void*);
extern void mt_bt_enable_irq(void);
extern void mt_bt_disable_irq(void);
extern void *mt_bt_get_platform_data(void);
extern int mt6622_suspend(struct platform_device *pdev, pm_message_t state);
extern int mt6622_resume(struct platform_device *pdev);
#endif

View File

@@ -1,442 +0,0 @@
/* Copyright Statement:
*
* This software/firmware and related documentation ("MediaTek Software") are
* protected under relevant copyright laws. The information contained herein is
* confidential and proprietary to MediaTek Inc. and/or its licensors. Without
* the prior written permission of MediaTek inc. and/or its licensors, any
* reproduction, modification, use or disclosure of MediaTek Software, and
* information contained herein, in whole or in part, shall be strictly
* prohibited.
*
* MediaTek Inc. (C) 2010. All rights reserved.
*
* BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
* ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
* WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
* WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
* NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
* RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
* INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
* TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
* RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
* OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
* SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
* RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
* STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
* ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
* RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
* MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
* CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
*
* The following software/firmware and/or related documentation ("MediaTek
* Software") have been modified by MediaTek Inc. All revisions are subject to
* any receiver's applicable license agreements with MediaTek Inc.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/wait.h>
#include <linux/slab.h>
#include <linux/fs.h>
#include <linux/sched.h>
#include <linux/poll.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/cdev.h>
#include <linux/errno.h>
#include <asm/io.h>
#include <asm/uaccess.h>
#include <net/bluetooth/bluetooth.h>
#include <net/bluetooth/hci_core.h>
#include <linux/gpio.h>
#include <mach/gpio.h>
#include "bt_hwctl.h"
#define BT_HWCTL_DEBUG_EN 0
#define BT_HWCTL_ALERT(f, s...) \
printk(KERN_ALERT "BTHWCTL " f, ## s)
#if BT_HWCTL_DEBUG_EN
#define BT_HWCTL_DEBUG(f, s...) \
printk(KERN_INFO "BTHWCTL " f, ## s)
#else
#define BT_HWCTL_DEBUG(f, s...) \
((void)0)
#endif
/**************************************************************************
* D E F I N I T I O N S *
***************************************************************************/
#define BTHWCTL_NAME "bthwctl"
#define BTHWCTL_DEV_NAME "/dev/bthwctl"
#define BTHWCTL_IOC_MAGIC 0xf6
#define BTHWCTL_IOCTL_SET_POWER _IOWR(BTHWCTL_IOC_MAGIC, 0, uint32_t)
#define BTHWCTL_IOCTL_SET_EINT _IOWR(BTHWCTL_IOC_MAGIC, 1, uint32_t)
wait_queue_head_t eint_wait;
int eint_gen;
int eint_mask;
int eint_handle_method = 0; // 0: for 4.1; 1: for 4.2
struct wake_lock mt6622_irq_wakelock;
int mt6622_suspend_flag;
struct bt_hwctl {
bool powerup;
dev_t dev_t;
struct class *cls;
struct device *dev;
struct cdev cdev;
struct mutex sem;
};
static struct bt_hwctl *bh = NULL;
static struct mt6622_platform_data *mt6622_pdata;
/*****************************************************************************
* bt_hwctl_open
*****************************************************************************/
static int bt_hwctl_open(struct inode *inode, struct file *file)
{
BT_HWCTL_DEBUG("bt_hwctl_open\n");
eint_gen = 0;
eint_mask = 0;
return 0;
}
/*****************************************************************************
* bt_hwctl_ioctl
*****************************************************************************/
static long bt_hwctl_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
int ret = 0;
BT_HWCTL_DEBUG("bt_hwctl_ioctl\n");
if(!bh) {
BT_HWCTL_ALERT("bt_hwctl struct not initialized\n");
return -EFAULT;
}
switch(cmd)
{
case BTHWCTL_IOCTL_SET_POWER:
{
unsigned long pwr = 0;
if (copy_from_user(&pwr, (void*)arg, sizeof(unsigned long)))
return -EFAULT;
BT_HWCTL_DEBUG("BTHWCTL_IOCTL_SET_POWER: %d\n", (int)pwr);
mutex_lock(&bh->sem);
if (pwr){
ret = mt_bt_power_on();
}
else{
mt_bt_power_off();
}
mutex_unlock(&bh->sem);
break;
}
case BTHWCTL_IOCTL_SET_EINT:
{
unsigned long eint = 0;
if (copy_from_user(&eint, (void*)arg, sizeof(unsigned long)))
return -EFAULT;
BT_HWCTL_DEBUG("BTHWCTL_IOCTL_SET_EINT: %d\n", (int)eint);
mutex_lock(&bh->sem);
if (eint){
/* Enable irq from user space */
BT_HWCTL_DEBUG("Set BT EINT enable\n");
mt_bt_enable_irq();
}
else{
/* Disable irq from user space, maybe time to close driver */
BT_HWCTL_DEBUG("Set BT EINT disable\n");
mt_bt_disable_irq();
eint_mask = 1;
wake_up_interruptible(&eint_wait);
}
mutex_unlock(&bh->sem);
break;
}
default:
BT_HWCTL_ALERT("BTHWCTL_IOCTL not support\n");
return -EPERM;
}
return ret;
}
/*****************************************************************************
* bt_hwctl_release
*****************************************************************************/
static int bt_hwctl_release(struct inode *inode, struct file *file)
{
BT_HWCTL_DEBUG("bt_hwctl_release\n");
eint_gen = 0;
eint_mask = 0;
return 0;
}
/*****************************************************************************
* bt_hwctl_poll
*****************************************************************************/
static unsigned int bt_hwctl_poll(struct file *file, poll_table *wait)
{
uint32_t mask = 0;
eint_handle_method = 1;
BT_HWCTL_DEBUG("bt_hwctl_poll eint_gen %d, eint_mask %d ++\n", eint_gen, eint_mask);
//poll_wait(file, &eint_wait, wait);
wait_event_interruptible(eint_wait, (eint_gen == 1 || eint_mask == 1));
BT_HWCTL_DEBUG("bt_hwctl_poll eint_gen %d, eint_mask %d --\n", eint_gen, eint_mask);
if(mt6622_suspend_flag == 1) {
printk("mt6622 wake lock 5000ms\n");
mt6622_suspend_flag = 0;
wake_lock_timeout(&mt6622_irq_wakelock, msecs_to_jiffies(5000));
}
if(eint_gen == 1){
mask = POLLIN|POLLRDNORM;
eint_gen = 0;
}
else if (eint_mask == 1){
mask = POLLERR;
eint_mask = 0;
}
return mask;
}
static void mtk_wcn_bt_work_fun(struct work_struct *work)
{
struct hci_dev *hdev = NULL;
/* BlueZ stack, hci_uart driver */
hdev = hci_dev_get(0);
if(hdev == NULL){
/* Avoid the early interrupt before hci0 registered */
//printk(KERN_ALERT "hdev is NULL\n ");
}else{
//printk(KERN_ALERT "Send host wakeup command\n");
hci_send_cmd(hdev, 0xFCC1, 0, NULL);
}
mt_bt_enable_irq();
}
static int mt6622_probe(struct platform_device *pdev)
{
struct mt6622_platform_data *pdata = pdev->dev.platform_data;
printk("mt6622_probe.\n");
mt6622_pdata = pdata;
if(pdata == NULL) {
printk("mt6622_probe failed.\n");
return -1;
}
if(pdata->power_gpio.io != INVALID_GPIO) {
if (gpio_request(pdata->power_gpio.io, "BT_PWR_EN")){
printk("mt6622 power_gpio is busy!\n");
//return -1;
}
}
if(pdata->reset_gpio.io != INVALID_GPIO) {
if (gpio_request(pdata->reset_gpio.io, "BT_RESET")){
printk("mt6622 reset_gpio is busy!\n");
gpio_free(pdata->power_gpio.io);
//return -1;
}
}
if(pdata->irq_gpio.io != INVALID_GPIO) {
if (gpio_request(pdata->irq_gpio.io, "BT_EINT")){
printk("mt6622 irq_gpio is busy!\n");
gpio_free(pdata->power_gpio.io);
gpio_free(pdata->reset_gpio.io);
//return -1;
}
}
mt_bt_power_init();
return 0;
}
static int mt6622_remove(struct platform_device *pdev)
{
struct mt6622_platform_data *pdata = pdev->dev.platform_data;
printk("mt6622_remove.\n");
if(pdata) {
if(pdata->power_gpio.io != INVALID_GPIO)
gpio_free(pdata->power_gpio.io);
if(pdata->reset_gpio.io != INVALID_GPIO)
gpio_free(pdata->reset_gpio.io);
if(pdata->irq_gpio.io != INVALID_GPIO)
gpio_free(pdata->irq_gpio.io);
}
return 0;
}
void *mt_bt_get_platform_data(void)
{
return (void *)mt6622_pdata;
}
/**************************************************************************
* K E R N E L I N T E R F A C E S *
***************************************************************************/
static struct file_operations bt_hwctl_fops = {
.owner = THIS_MODULE,
// .ioctl = bt_hwctl_ioctl,
.unlocked_ioctl = bt_hwctl_ioctl,
.open = bt_hwctl_open,
.release = bt_hwctl_release,
.poll = bt_hwctl_poll,
};
static struct platform_driver mt6622_driver = {
.probe = mt6622_probe,
.remove = mt6622_remove,
.suspend = mt6622_suspend,
.resume = mt6622_resume,
.driver = {
.name = "mt6622",
.owner = THIS_MODULE,
},
};
/*****************************************************************************/
static int __init bt_hwctl_init(void)
{
int ret = -1, err = -1;
BT_HWCTL_DEBUG("bt_hwctl_init\n");
platform_driver_register(&mt6622_driver);
if (!(bh = kzalloc(sizeof(struct bt_hwctl), GFP_KERNEL)))
{
BT_HWCTL_ALERT("bt_hwctl_init allocate dev struct failed\n");
err = -ENOMEM;
goto ERR_EXIT;
}
ret = alloc_chrdev_region(&bh->dev_t, 0, 1, BTHWCTL_NAME);
if (ret) {
BT_HWCTL_ALERT("alloc chrdev region failed\n");
goto ERR_EXIT;
}
BT_HWCTL_DEBUG("alloc %s:%d:%d\n", BTHWCTL_NAME, MAJOR(bh->dev_t), MINOR(bh->dev_t));
cdev_init(&bh->cdev, &bt_hwctl_fops);
bh->cdev.owner = THIS_MODULE;
bh->cdev.ops = &bt_hwctl_fops;
err = cdev_add(&bh->cdev, bh->dev_t, 1);
if (err) {
BT_HWCTL_ALERT("add chrdev failed\n");
goto ERR_EXIT;
}
bh->cls = class_create(THIS_MODULE, BTHWCTL_NAME);
if (IS_ERR(bh->cls)) {
err = PTR_ERR(bh->cls);
BT_HWCTL_ALERT("class_create failed, errno:%d\n", err);
goto ERR_EXIT;
}
bh->dev = device_create(bh->cls, NULL, bh->dev_t, NULL, BTHWCTL_NAME);
mutex_init(&bh->sem);
init_waitqueue_head(&eint_wait);
wake_lock_init(&mt6622_irq_wakelock, WAKE_LOCK_SUSPEND, "mt6622_irq_wakelock");
/*INIT_WORK(&mtk_wcn_bt_event_work, mtk_wcn_bt_work_fun);
mtk_wcn_bt_workqueue = create_singlethread_workqueue("mtk_wcn_bt");
if (!mtk_wcn_bt_workqueue) {
printk("create_singlethread_workqueue failed.\n");
err = -ESRCH;
goto ERR_EXIT;
}*/
/* request gpio used by BT */
//mt_bt_gpio_init();
BT_HWCTL_DEBUG("bt_hwctl_init ok\n");
return 0;
ERR_EXIT:
if (err == 0)
cdev_del(&bh->cdev);
if (ret == 0)
unregister_chrdev_region(bh->dev_t, 1);
if (bh){
kfree(bh);
bh = NULL;
}
return -1;
}
/*****************************************************************************/
static void __exit bt_hwctl_exit(void)
{
BT_HWCTL_DEBUG("bt_hwctl_exit\n");
wake_lock_destroy(&mt6622_irq_wakelock);
platform_driver_unregister(&mt6622_driver);
if (bh){
cdev_del(&bh->cdev);
unregister_chrdev_region(bh->dev_t, 1);
device_destroy(bh->cls, bh->dev_t);
class_destroy(bh->cls);
mutex_destroy(&bh->sem);
kfree(bh);
bh = NULL;
}
/* release gpio used by BT */
//mt_bt_gpio_release();
}
EXPORT_SYMBOL(mt_bt_get_platform_data);
EXPORT_SYMBOL(eint_wait);
EXPORT_SYMBOL(eint_gen);
//EXPORT_SYMBOL(mtk_wcn_bt_event_work);
//EXPORT_SYMBOL(mtk_wcn_bt_workqueue);
module_init(bt_hwctl_init);
module_exit(bt_hwctl_exit);
MODULE_AUTHOR("Tingting Lei <tingting.lei@mediatek.com>");
MODULE_DESCRIPTION("Bluetooth hardware control driver");
MODULE_LICENSE("GPL");

View File

@@ -1,291 +0,0 @@
/* Copyright Statement:
*
* This software/firmware and related documentation ("MediaTek Software") are
* protected under relevant copyright laws. The information contained herein is
* confidential and proprietary to MediaTek Inc. and/or its licensors. Without
* the prior written permission of MediaTek inc. and/or its licensors, any
* reproduction, modification, use or disclosure of MediaTek Software, and
* information contained herein, in whole or in part, shall be strictly
* prohibited.
*
* MediaTek Inc. (C) 2010. All rights reserved.
*
* BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
* ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
* WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
* WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
* NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
* RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
* INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
* TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
* RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
* OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
* SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
* RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
* STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
* ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
* RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
* MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
* CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
*
* The following software/firmware and/or related documentation ("MediaTek
* Software") have been modified by MediaTek Inc. All revisions are subject to
* any receiver's applicable license agreements with MediaTek Inc.
*/
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/gpio.h>
#include <mach/gpio.h>
#include <mach/iomux.h>
//#include <plat/gpio-cfg.h>
#include "bt_hwctl.h"
extern int mt6622_suspend_flag;
/****************************************************************************
* C O N S T A N T S *
*****************************************************************************/
#define MODULE_TAG "[MT6622] "
static int irq_num = -1;
#ifdef CONFIG_ARCH_RK29
#define rk_mux_api_set(name,mode) rk29_mux_api_set(name,mode)
#elif defined (CONFIG_ARCH_RK30)
#define rk_mux_api_set(name,mode) rk30_mux_api_set(name,mode)
#else
#define rk_mux_api_set(name,mode) rk30_mux_api_set(name,mode)
#endif
static int irq_num;
// to avoid irq enable and disable not match
static unsigned int irq_mask;
//static spinlock_t bt_irq_lock;
/****************************************************************************
* I R Q F U N C T I O N S *
*****************************************************************************/
static int mt_bt_request_irq(void)
{
int iRet;
int trigger = IRQF_TRIGGER_RISING;
struct mt6622_platform_data *pdata = (struct mt6622_platform_data *)mt_bt_get_platform_data();
irq_mask = 0;
if(pdata->irq_gpio.enable == GPIO_LOW)
trigger = IRQF_TRIGGER_FALLING;
iRet = request_irq(irq_num, mt_bt_eirq_handler,
trigger, "BT_INT_B", NULL);
if (iRet){
printk(KERN_ALERT MODULE_TAG "request_irq IRQ%d fails, errno %d\n", irq_num, iRet);
}
else{
printk(KERN_INFO MODULE_TAG "request_irq IRQ%d success\n", irq_num);
mt_bt_disable_irq();
/* enable irq when driver init complete, at hci_uart_open */
}
return iRet;
}
static void mt_bt_free_irq(void)
{
if(irq_num != -1)
free_irq(irq_num, NULL);
irq_mask = 0;
irq_num = -1;
}
int mt6622_suspend(struct platform_device *pdev, pm_message_t state)
{
if(irq_num != -1) {
printk(KERN_INFO MODULE_TAG "mt6622_suspend\n");
mt6622_suspend_flag = 1;
enable_irq_wake(irq_num);
}
return 0;
}
int mt6622_resume(struct platform_device *pdev)
{
if(irq_num != -1) {
printk(KERN_INFO MODULE_TAG "mt6622_resume\n");
disable_irq_wake(irq_num);
}
return 0;
}
void mt_bt_enable_irq(void)
{
if (irq_mask){
irq_mask = 0;
enable_irq(irq_num);
}
}
EXPORT_SYMBOL(mt_bt_enable_irq);
void mt_bt_disable_irq(void)
{
if (!irq_mask){
irq_mask = 1;
disable_irq_nosync(irq_num);
}
}
EXPORT_SYMBOL(mt_bt_disable_irq);
/****************************************************************************
* P O W E R C O N T R O L *
*****************************************************************************/
int mt_bt_power_init(void)
{
struct mt6622_platform_data *pdata;
printk(KERN_INFO MODULE_TAG "mt_bt_power_init\n");
pdata = (struct mt6622_platform_data *)mt_bt_get_platform_data();
if(pdata) {
// PWR_EN and RESET
/* PWR_EN set to gpio output low */
if(pdata->power_gpio.io != INVALID_GPIO)
gpio_direction_output(pdata->power_gpio.io, 0);
/* RESET set to gpio output low */
if(pdata->reset_gpio.io != INVALID_GPIO)
gpio_direction_output(pdata->reset_gpio.io, 0);
msleep(200);
/* PWR_EN pull up */
//if(pdata->power_gpio.io != INVALID_GPIO)
// gpio_direction_output(pdata->power_gpio.io, 0);
//msleep(200);
/* RESET pull up */
if(pdata->reset_gpio.io != INVALID_GPIO)
gpio_direction_output(pdata->reset_gpio.io, 1);
msleep(1000);
//pdata->power_gpio.io = INVALID_GPIO;
pdata->reset_gpio.io = INVALID_GPIO;
}
return 0;
}
EXPORT_SYMBOL(mt_bt_power_init);
int mt_bt_power_on(void)
{
int error;
struct mt6622_platform_data *pdata;
printk(KERN_INFO MODULE_TAG "mt_bt_power_on ++\n");
pdata = (struct mt6622_platform_data *)mt_bt_get_platform_data();
if(pdata) {
// UART TX/RX
// PCMIN, PCMOUT, PCMCLK, PCMSYNC
// EINT
//--s3c_gpio_cfgpin(GPIO_BT_EINT_PIN, S3C_GPIO_SFN(0));
//--s3c_gpio_setpull(GPIO_BT_EINT_PIN, S3C_GPIO_PULL_DOWN);
if(pdata->irq_gpio.io != INVALID_GPIO)
gpio_direction_input(pdata->irq_gpio.io);
//gpio_pull_updown(pdata->irq_gpio->io, GPIOPullDown);
/* set to EINT mode */
//--s3c_gpio_cfgpin(GPIO_BT_EINT_PIN, S3C_GPIO_SFN(0xF));
/* get irq number */
if(pdata->irq_gpio.io != INVALID_GPIO)
irq_num = gpio_to_irq(pdata->irq_gpio.io);
//mt_set_gpio_mode(GPIO_BT_EINT_PIN, GPIO_BT_EINT_PIN_M_GPIO);
//mt_set_gpio_pull_enable(GPIO_BT_EINT_PIN, 1);
//mt_set_gpio_pull_select(GPIO_BT_EINT_PIN, GPIO_PULL_DOWN);
//mt_set_gpio_mode(GPIO_BT_EINT_PIN, GPIO_BT_EINT_PIN_M_EINT);
// 32k CLK
//mt_set_gpio_mode(GPIO_BT_CLK_PIN , GPIO_BT_CLK_PIN_M_CLK);
//mt_set_clock_output(GPIO_BT_CLK_PIN_CLK, CLK_SRC_F32K, 1);
if(gpio_is_valid(pdata->rts_gpio.io)) {
printk(KERN_INFO MODULE_TAG "mt_bt_power_on rts iomux\n");
rk_mux_api_set(pdata->rts_gpio.iomux.name, pdata->rts_gpio.iomux.fgpio);
gpio_direction_output(pdata->rts_gpio.io, 0);
}
// PWR_EN and RESET
/* PWR_EN set to gpio output low */
if(pdata->power_gpio.io != INVALID_GPIO)
gpio_direction_output(pdata->power_gpio.io, 0);
/* RESET set to gpio output low */
if(pdata->reset_gpio.io != INVALID_GPIO)
gpio_direction_output(pdata->reset_gpio.io, 0);
msleep(200);
/* PWR_EN pull up */
if(pdata->power_gpio.io != INVALID_GPIO)
gpio_direction_output(pdata->power_gpio.io, 1);
msleep(200);
/* RESET pull up */
if(pdata->reset_gpio.io != INVALID_GPIO)
gpio_direction_output(pdata->reset_gpio.io, 1);
msleep(1000);
if(gpio_is_valid(pdata->rts_gpio.io)) {
rk_mux_api_set(pdata->rts_gpio.iomux.name, pdata->rts_gpio.iomux.fmux);
}
error = mt_bt_request_irq();
if (error){
if(pdata->power_gpio.io != INVALID_GPIO)
gpio_direction_output(pdata->power_gpio.io, 0);
if(pdata->reset_gpio.io != INVALID_GPIO)
gpio_direction_output(pdata->reset_gpio.io, 0);
//--s3c_gpio_cfgpin(GPIO_BT_EINT_PIN, S3C_GPIO_SFN(1));
if(pdata->irq_gpio.io != INVALID_GPIO)
gpio_direction_output(pdata->irq_gpio.io, 0);
return error;
}
}
printk(KERN_INFO MODULE_TAG "mt_bt_power_on --\n");
return 0;
}
EXPORT_SYMBOL(mt_bt_power_on);
void mt_bt_power_off(void)
{
struct mt6622_platform_data *pdata;
pdata = (struct mt6622_platform_data *)mt_bt_get_platform_data();
printk(KERN_INFO MODULE_TAG "mt_bt_power_off ++\n");
if(pdata) {
// PWR_EN and RESET
if(pdata->power_gpio.io != INVALID_GPIO)
gpio_direction_output(pdata->power_gpio.io, 0);
if(pdata->reset_gpio.io != INVALID_GPIO)
gpio_direction_output(pdata->reset_gpio.io, 0);
// EINT
//--s3c_gpio_cfgpin(GPIO_BT_EINT_PIN, S3C_GPIO_SFN(1));
if(pdata->irq_gpio.io != INVALID_GPIO)
gpio_direction_output(pdata->irq_gpio.io, 0);
mt_bt_free_irq();
}
printk(KERN_INFO MODULE_TAG "mt_bt_power_off --\n");
}
EXPORT_SYMBOL(mt_bt_power_off);

View File

@@ -1,149 +0,0 @@
menu "MediaTek Connectivity Combo Chip Config"
config MTK_COMBO
bool "MediaTek Connectivity Combo Chip Support"
help
MTK connectivity combo chip driver for MT6620
#
# MTK Combo Chip Selection
#
choice
prompt "Select Chip"
depends on MTK_COMBO
config MTK_COMBO_CHIP_MT6620
bool "MT6620"
#config MTK_COMBO_CHIP_MT6628
# bool "MT6628"
endchoice
#
# Target Platform Selection
#
config MTK_COMBO_PLAT_PATH
string "Platform folder name"
depends on MTK_COMBO
default "sample" if MTK_COMBO_PLAT_SAMPLE
help
Specify platform folder under common driver platform folder:
mtk_wcn_combo/common/platform/*
config MTK_COMBO_DRIVER_VERSION_JB2
depends on MTK_COMBO
bool "MediaTek Connectivity Combo Driver version is JB2 V1.0"
default n
help
MTK driver V3.1 will use a different configuration about SDIO.
#
# MTK COMBO Chip Configuration
#
config MTK_COMBO_COMM
depends on MTK_COMBO
tristate "MediaTek Combo Chip Common part driver"
help
MediaTek combo chip common part driver
#config MTK_COMBO_COMM_PS
# depends on MTK_COMBO_COMM
# bool "Enable PS support"
# default n
# help
# Enable PS support of common UART interface
config MTK_COMBO_COMM_UART
depends on MTK_COMBO_COMM
tristate "Common interface UART"
help
Use UART for common part interface type
#config MTK_COMBO_COMM_SDIO
# depends on MTK_COMBO_COMM
# tristate "Common interface SDIO"
# help
# Use SDIO for common part interface type
config MTK_COMBO_BT
tristate "MediaTek Combo Chip BT driver"
depends on MTK_COMBO
help
MTK BT /dev/stpbt driver for Bluedroid (mtk_stp_bt.ko)
config MTK_COMBO_BT_HCI
tristate "MediaTek Combo Chip BlueZ driver"
depends on BT && MTK_COMBO
help
MTK BT driver for BlueZ (hci_stp.ko)
config MTK_COMBO_FM
tristate "MediaTek Combo Chip FM driver"
depends on MTK_COMBO
help
MTK FM /dev/fm driver (mt6620_fm_drv.ko, mtk_fm_priv.ko)
config MTK_COMBO_WIFI
tristate "MediaTek Combo Chip Wi-Fi support"
depends on MTK_COMBO
depends on MMC
depends on IPV6
select WIRELESS_EXT
select WEXT_PRIV
help
This module adds support for wireless adapters based on
MTK MT6620 chipset.
This driver uses the kernel's wireless extensions subsystem.
If you choose to build a module, it'll be called dhd. Say M if
unsure.
#config MTK_COMBO_WIFI_FW_PATH
# depends on MTK_COMBO_WIFI
# string "Firmware path"
# default "/system/etc/firmware/WIFI_RAM_CODE"
# help
# Path to the firmware file
config MTK_COMBO_WIFI_DEBUG
depends on MTK_COMBO_WIFI
bool "Enable debug output from MT6620 driver"
help
Enable debug messages output from MT6620 driver
config MTK_COMBO_WIFI_PROC
depends on MTK_COMBO_WIFI
bool "Enable procfs support"
help
Enable procfs support.
#config MTK_WAPI_SUPPORT
# depends on MTK_COMBO_WIFI
# bool "Enable WAPI support in MT6620 driver"
# help
# Enable WAPI support for devices using MT6620
choice
prompt "Host Interface"
depends on MTK_COMBO_WIFI
config MTK_COMBO_WIFI_HIF_SDIO1
bool "SDIO #1"
depends on MTK_COMBO_WIFI
endchoice
config MTK_GPS
tristate "MediaTek GPS Support"
help
MTK GPS /dev/gps driver (mtk_gps.ko)
config MTK_COMBO_GPS
tristate "MediaTek Combo Chip GPS driver"
depends on MTK_COMBO && MTK_GPS
help
MTK GPS /dev/stpgps driver (mtk_stp_gps.ko)
endmenu

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@@ -1,60 +0,0 @@
# Copyright Statement:
#
# This software/firmware and related documentation ("MediaTek Software") are
# protected under relevant copyright laws. The information contained herein
# is confidential and proprietary to MediaTek Inc. and/or its licensors.
# Without the prior written permission of MediaTek inc. and/or its licensors,
# any reproduction, modification, use or disclosure of MediaTek Software,
# and information contained herein, in whole or in part, shall be strictly prohibited.
#
# MediaTek Inc. (C) 2010. All rights reserved.
#
# BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
# THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
# RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
# AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
# NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
# SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
# SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
# THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
# THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
# CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
# SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
# STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
# CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
# AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
# OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
# MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
#
# The following software/firmware and/or related documentation ("MediaTek Software")
# have been modified by MediaTek Inc. All revisions are subject to any receiver's
# applicable license agreements with MediaTek Inc.
# combo driver: MT6620
# If KERNELRELEASE is defined, we've been invoked from the
# kernel build system and can use its language.
ifneq ($(KERNELRELEASE),)
#subdir-ccflags-y can be used in 2.6.34 in the future
#subdir-ccflags-y += -I$(src)/common/include -I$(src)/common/linux/include
#used for binary release script
#KERNEL_PATH := $(pwd)
#OBJ_PATH := $(pwd)
obj-$(CONFIG_MTK_COMBO) += common/
obj-$(CONFIG_MTK_COMBO_FM) += drv_fm/
obj-$(CONFIG_MTK_COMBO_WIFI) += drv_wlan/
#Use BT HCI driver
obj-$(CONFIG_MTK_COMBO_BT_HCI) += drv_bt/
obj-$(CONFIG_MTK_GPS) += gps/
# Otherwise we were called directly from the command
# line; invoke the kernel build system.
else
KERNELDIR ?= /lib/modules/$(shell uname -r)/build
PWD := $(shell pwd)
default:
$(MAKE) -C $(KERNELDIR) M=$(PWD) modules
endif

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@@ -1,79 +0,0 @@
#ccflags-y += -I$(src)/core/include
ccflags-y += -I$(src)/linux/include -I$(src)/core/include -I$(src)/include -I$(src)/
ccflags-y += -DWMT_PLAT_APEX=1
ccflags-y += -DWMT_PLAT_ALPS=0
ccflags-y += -DWMT_UART_RX_MODE_WORK=1 # 1. work thread 0. tasklet
#ifeq ($(MTK_COMBO_CHIP), MT6628)
#EXT_FLAG=
#else
#EXT_FLAG=_mt6628
#endif
EXT_FLAG=
COMMON_SRC_PATH := $(src)
COMMON_OBJ_PATH := $(src)
# WMT DRIVER
obj-$(CONFIG_MTK_COMBO_COMM) += mtk_stp_wmt$(EXT_FLAG).o
# WMT DRIVER-core part
mtk_stp_wmt$(EXT_FLAG)-objs := core/wmt_core.o core/wmt_ctrl.o core/wmt_func.o core/wmt_ic_6620.o core/wmt_lib.o core/wmt_conf.o core/wmt_dbg.o core/wmt_exp.o
#ifeq ($(MTK_COMBO_CHIP), MT6628)
mtk_stp_wmt$(EXT_FLAG)-objs += core/wmt_ic_6628.o
#endif
# WMT DRIVER-linux private part
mtk_stp_wmt$(EXT_FLAG)-objs += linux/wmt_dev.o
mtk_stp_wmt$(EXT_FLAG)-objs += linux/wmt_tm.o
# WMT DRIVER-OSAL
mtk_stp_wmt$(EXT_FLAG)-objs += linux/osal.o
# WMT DRIVER-platform implementation
#ccflags-y += -D WMT_PLAT_ALPS #Jake modify
# WMT DRIVER-platform part, specified by string CONFIG_MTK_COMBO_PLAT_PATH
PLAT := $(shell echo $(CONFIG_MTK_COMBO_PLAT_PATH))
#obj-y += platform/$(PLAT)/mtk_wcn_cmb_stub_$(PLAT).o
mtk_stp_wmt$(EXT_FLAG)-objs += platform/$(PLAT)/wmt_plat_$(PLAT).o
mtk_stp_wmt$(EXT_FLAG)-objs += platform/$(PLAT)/wmt_plat_stub.o
# FIXME: select desired hw according to project configuration
#ifeq ($(MTK_COMBO_CHIP), MT6628)
#mtk_stp_wmt$(EXT_FLAG)-objs += platform/alps/mtk_wcn_cmb_hw_6628.o
#else
mtk_stp_wmt$(EXT_FLAG)-objs += platform/$(PLAT)/mtk_wcn_cmb_hw.o
#endif
mtk_stp_wmt$(EXT_FLAG)-objs += core/stp_exp.o core/stp_core.o core/psm_core.o core/btm_core.o linux/stp_dbg.o
#ifeq ($(MTK_COMBO_CHIP), MT6628)
# WMT stub part (built-in kernel image)
obj-y += platform/$(PLAT)/mtk_wcn_cmb_stub_$(PLAT).o
#endif
obj-$(CONFIG_MTK_COMBO_COMM_UART) += mtk_stp_uart$(EXT_FLAG).o
mtk_stp_uart$(EXT_FLAG)-objs := linux/stp_uart.o
obj-$(CONFIG_MTK_COMBO_COMM) += mtk_hif_sdio$(EXT_FLAG).o
mtk_hif_sdio$(EXT_FLAG)-objs := linux/hif_sdio.o
mtk_hif_sdio$(EXT_FLAG)-objs += linux/hif_sdio_chrdev.o
mtk_hif_sdio$(EXT_FLAG)-objs += platform/$(PLAT)/mtk_wcn_cmb_hw.o
mtk_hif_sdio$(EXT_FLAG)-objs += platform/$(PLAT)/wmt_plat_$(PLAT).o
mtk_hif_sdio$(EXT_FLAG)-objs += linux/osal.o
# obj-$(CONFIG_MTK_COMBO) += mtk_stp_sdio$(EXT_FLAG).o
# mtk_stp_sdio$(EXT_FLAG)-objs := linux/stp_sdio.o
# mtk_stp_sdio$(EXT_FLAG)-objs += linux/osal.o
obj-$(CONFIG_MTK_COMBO_BT) += mtk_stp_bt$(EXT_FLAG).o
mtk_stp_bt$(EXT_FLAG)-objs := linux/stp_chrdev_bt.o
obj-$(CONFIG_MTK_COMBO_GPS) += mtk_stp_gps$(EXT_FLAG).o
mtk_stp_gps$(EXT_FLAG)-objs := linux/stp_chrdev_gps.o
obj-$(CONFIG_MTK_COMBO_WIFI) += mtk_wmt_wifi$(EXT_FLAG).o
mtk_wmt_wifi$(EXT_FLAG)-objs := linux/wmt_chrdev_wifi.o

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@@ -1,761 +0,0 @@
#include "osal_typedef.h"
#include "osal.h"
#include "stp_dbg.h"
#include "stp_core.h"
#include "btm_core.h"
#define PFX_BTM "[STP-BTM] "
#define STP_BTM_LOG_LOUD 4
#define STP_BTM_LOG_DBG 3
#define STP_BTM_LOG_INFO 2
#define STP_BTM_LOG_WARN 1
#define STP_BTM_LOG_ERR 0
INT32 gBtmDbgLevel = STP_BTM_LOG_INFO;
#define STP_BTM_LOUD_FUNC(fmt, arg...) if(gBtmDbgLevel >= STP_BTM_LOG_LOUD){ osal_dbg_print(PFX_BTM "%s: " fmt, __FUNCTION__ ,##arg);}
#define STP_BTM_DBG_FUNC(fmt, arg...) if(gBtmDbgLevel >= STP_BTM_LOG_DBG){ osal_dbg_print(PFX_BTM "%s: " fmt, __FUNCTION__ ,##arg);}
#define STP_BTM_INFO_FUNC(fmt, arg...) if(gBtmDbgLevel >= STP_BTM_LOG_INFO){ osal_dbg_print(PFX_BTM "[I]%s: " fmt, __FUNCTION__ ,##arg);}
#define STP_BTM_WARN_FUNC(fmt, arg...) if(gBtmDbgLevel >= STP_BTM_LOG_WARN){ osal_dbg_print(PFX_BTM "[W]%s: " fmt, __FUNCTION__ ,##arg);}
#define STP_BTM_ERR_FUNC(fmt, arg...) if(gBtmDbgLevel >= STP_BTM_LOG_ERR){ osal_dbg_print(PFX_BTM "[E]%s(%d):ERROR! " fmt, __FUNCTION__ , __LINE__, ##arg);}
#define STP_BTM_TRC_FUNC(f) if(gBtmDbgLevel >= STP_BTM_LOG_DBG){ osal_dbg_print(PFX_BTM "<%s> <%d>\n", __FUNCTION__, __LINE__);}
INT32 gDumplogflag = 0;
#if WMT_PLAT_ALPS
extern void dump_uart_history(void);
#endif
#define ASSERT(expr)
MTKSTP_BTM_T stp_btm_i;
MTKSTP_BTM_T *stp_btm = &stp_btm_i;
const PCHAR g_btm_op_name[]={
"STP_OPID_BTM_RETRY",
"STP_OPID_BTM_RST",
"STP_OPID_BTM_DBG_DUMP",
"STP_OPID_BTM_EXIT"
};
#if 0
static PCHAR _stp_pkt_type(INT32 type){
static CHAR s[10];
switch(type){
case WMT_TASK_INDX:
osal_memcpy(s, "WMT", strlen("WMT")+1);
break;
case BT_TASK_INDX:
osal_memcpy(s, "BT", strlen("BT")+1);
break;
case GPS_TASK_INDX:
osal_memcpy(s, "GPS", strlen("GPS")+1);
break;
case FM_TASK_INDX:
osal_memcpy(s, "FM", strlen("FM")+1);
break;
default:
osal_memcpy(s, "UNKOWN", strlen("UNKOWN")+1);
break;
}
return s;
}
#endif
static INT32 _stp_btm_put_dump_to_nl(void)
{
#define NUM_FETCH_ENTRY 8
static UINT8 buf[2048];
static UINT8 tmp[2048];
UINT32 buf_len;
STP_PACKET_T *pkt;
STP_DBG_HDR_T *hdr;
INT32 remain=0, index =0;
INT32 retry = 0, rc = 0, nl_retry = 0;
STP_BTM_INFO_FUNC("Enter..\n");
index = 0;
tmp[index++]='[';
tmp[index++]='M';
tmp[index++]=']';
do
{
index = 3;
remain = stp_dbg_dmp_out_ex(&buf[0], &buf_len);
if (buf_len > 0)
{
pkt = (STP_PACKET_T *)buf;
hdr = &pkt->hdr;
if (hdr->dbg_type == STP_DBG_FW_DMP){
osal_memcpy(&tmp[index], pkt->raw, pkt->hdr.len);
if(pkt->hdr.len <= 1500)
{
tmp[index + pkt->hdr.len] = '\n';
tmp[index + pkt->hdr.len + 1] = '\0';
//printk("\n%s\n+++\n", tmp);
rc = stp_dbg_nl_send((PCHAR)&tmp, 2);
while(rc){
nl_retry++;
if(nl_retry > 1000){
break;
}
STP_BTM_WARN_FUNC("**dump send fails, and retry again.**\n");
osal_msleep(3);
rc = stp_dbg_nl_send((PCHAR)&tmp, 2);
if(!rc){
STP_BTM_WARN_FUNC("****retry again ok!**\n");
}
}
//schedule();
} else {
STP_BTM_INFO_FUNC("dump entry length is over long\n");
osal_bug_on(0);
}
retry = 0;
}
}else
{
retry ++;
osal_msleep(100);
}
}while((remain > 0) || (retry < 2));
STP_BTM_INFO_FUNC("Exit..\n");
return 0;
}
static INT32 _stp_btm_put_dump_to_aee(void)
{
static UINT8 buf[2048];
static UINT8 tmp[2048];
UINT32 buf_len;
STP_PACKET_T *pkt;
STP_DBG_HDR_T *hdr;
INT32 remain = 0;
INT32 retry = 0;
INT32 ret = 0;
STP_BTM_INFO_FUNC("Enter..\n");
do {
remain = stp_dbg_dmp_out_ex(&buf[0], &buf_len);
if (buf_len > 0) {
pkt = (STP_PACKET_T*)buf;
hdr = &pkt->hdr;
if (hdr->dbg_type == STP_DBG_FW_DMP) {
osal_memcpy(&tmp[0], pkt->raw, pkt->hdr.len);
if (pkt->hdr.len <= 1500) {
tmp[pkt->hdr.len] = '\n';
tmp[pkt->hdr.len + 1] = '\0';
ret = stp_dbg_aee_send(tmp, pkt->hdr.len, 0);
} else {
STP_BTM_INFO_FUNC("dump entry length is over long\n");
osal_bug_on(0);
}
retry = 0;
}
} else {
retry ++;
osal_msleep(100);
}
}while ((remain > 0) || (retry < 2));
STP_BTM_INFO_FUNC("Exit..\n");
return ret;
}
#define COMBO_DUMP2AEE
static INT32 _stp_btm_handler(MTKSTP_BTM_T *stp_btm, P_STP_BTM_OP pStpOp)
{
INT32 ret = -1;
INT32 dump_sink = 1; //core dump target, 0: aee; 1: netlink
if (NULL == pStpOp)
{
return -1;
}
switch(pStpOp->opId)
{
case STP_OPID_BTM_EXIT:
// TODO: clean all up?
ret = 0;
break;
/*tx timeout retry*/
case STP_OPID_BTM_RETRY:
stp_do_tx_timeout();
ret = 0;
break;
/*whole chip reset*/
case STP_OPID_BTM_RST:
STP_BTM_INFO_FUNC("whole chip reset start!\n");
STP_BTM_INFO_FUNC("....+\n");
if(stp_btm->wmt_notify)
{
stp_btm->wmt_notify(BTM_RST_OP);
ret = 0;
}
else
{
STP_BTM_ERR_FUNC("stp_btm->wmt_notify is NULL.");
ret = -1;
}
STP_BTM_INFO_FUNC("whole chip reset end!\n");
break;
case STP_OPID_BTM_DBG_DUMP:
/*Notify the wmt to get dump data*/
STP_BTM_DBG_FUNC("wmt dmp notification\n");
dump_sink = ((stp_btm->wmt_notify(BTM_GET_AEE_SUPPORT_FLAG) == MTK_WCN_BOOL_TRUE) ? 0 : 1);
if (dump_sink == 0) {
_stp_btm_put_dump_to_aee();
} else if (dump_sink == 1) {
_stp_btm_put_dump_to_nl();
} else {
STP_BTM_ERR_FUNC("unknown sink %d\n", dump_sink);
}
break;
case STP_OPID_BTM_DUMP_TIMEOUT:
// Flush dump data, and reset compressor
STP_BTM_INFO_FUNC("Flush dump data\n");
wcn_core_dump_flush(0);
break;
default:
ret = -1;
break;
}
return ret;
}
static P_OSAL_OP _stp_btm_get_op (
MTKSTP_BTM_T *stp_btm,
P_OSAL_OP_Q pOpQ
)
{
P_OSAL_OP pOp;
//INT32 ret = 0;
if (!pOpQ)
{
STP_BTM_WARN_FUNC("!pOpQ \n");
return NULL;
}
osal_lock_unsleepable_lock(&(stp_btm->wq_spinlock));
/* acquire lock success */
RB_GET(pOpQ, pOp);
osal_unlock_unsleepable_lock(&(stp_btm->wq_spinlock));
if (!pOp)
{
//STP_BTM_WARN_FUNC("RB_GET fail\n");
}
return pOp;
}
static INT32 _stp_btm_put_op (
MTKSTP_BTM_T *stp_btm,
P_OSAL_OP_Q pOpQ,
P_OSAL_OP pOp
)
{
INT32 ret;
if (!pOpQ || !pOp)
{
STP_BTM_WARN_FUNC("invalid input param: 0x%p, 0x%p \n", pOpQ, pOp);
return 0;//;MTK_WCN_BOOL_FALSE;
}
ret = 0;
osal_lock_unsleepable_lock(&(stp_btm->wq_spinlock));
/* acquire lock success */
if (!RB_FULL(pOpQ))
{
RB_PUT(pOpQ, pOp);
}
else
{
ret = -1;
}
osal_unlock_unsleepable_lock(&(stp_btm->wq_spinlock));
if (ret)
{
STP_BTM_WARN_FUNC("RB_FULL(0x%p) %d ,rFreeOpQ = %p, rActiveOpQ = %p\n", pOpQ, RB_COUNT(pOpQ),
&stp_btm->rFreeOpQ, &stp_btm->rActiveOpQ);
return 0;
}
else
{
//STP_BTM_WARN_FUNC("RB_COUNT = %d\n",RB_COUNT(pOpQ));
return 1;
}
}
P_OSAL_OP _stp_btm_get_free_op (
MTKSTP_BTM_T *stp_btm
)
{
P_OSAL_OP pOp;
if (stp_btm)
{
pOp = _stp_btm_get_op(stp_btm, &stp_btm->rFreeOpQ);
if (pOp)
{
osal_memset(&pOp->op, 0, sizeof(pOp->op));
}
return pOp;
}
else {
return NULL;
}
}
INT32 _stp_btm_put_act_op (
MTKSTP_BTM_T *stp_btm,
P_OSAL_OP pOp
)
{
INT32 bRet = 0;
INT32 bCleanup = 0;
LONG wait_ret = -1;
P_OSAL_SIGNAL pSignal = NULL;
do {
if (!stp_btm || !pOp)
{
break;
}
pSignal = &pOp->signal;
if (pSignal->timeoutValue)
{
pOp->result = -9;
osal_signal_init(&pOp->signal);
}
/* put to active Q */
bRet = _stp_btm_put_op(stp_btm, &stp_btm->rActiveOpQ, pOp);
if(0 == bRet)
{
STP_BTM_WARN_FUNC("put active queue fail\n");
bCleanup = 1;//MTK_WCN_BOOL_TRUE;
break;
}
/* wake up wmtd */
osal_trigger_event(&stp_btm->STPd_event);
if (pSignal->timeoutValue == 0)
{
bRet = 1;//MTK_WCN_BOOL_TRUE;
/* clean it in wmtd */
break;
}
/* wait result, clean it here */
bCleanup = 1;//MTK_WCN_BOOL_TRUE;
/* check result */
wait_ret = osal_wait_for_signal_timeout(&pOp->signal);
STP_BTM_DBG_FUNC("wait completion:%ld\n", wait_ret);
if (!wait_ret)
{
STP_BTM_ERR_FUNC("wait completion timeout \n");
// TODO: how to handle it? retry?
}
else
{
if (pOp->result)
{
STP_BTM_WARN_FUNC("op(%d) result:%d\n", pOp->op.opId, pOp->result);
}
bRet = (pOp->result) ? 0 : 1;
}
} while(0);
if (bCleanup) {
/* put Op back to freeQ */
_stp_btm_put_op(stp_btm, &stp_btm->rFreeOpQ, pOp);
}
return bRet;
}
static INT32 _stp_btm_wait_for_msg(void *pvData)
{
MTKSTP_BTM_T *stp_btm = (MTKSTP_BTM_T *)pvData;
return ((!RB_EMPTY(&stp_btm->rActiveOpQ)) || osal_thread_should_stop(&stp_btm->BTMd));
}
static INT32 _stp_btm_proc (void *pvData)
{
MTKSTP_BTM_T *stp_btm = (MTKSTP_BTM_T *)pvData;
P_OSAL_OP pOp;
INT32 id;
INT32 result;
if (!stp_btm)
{
STP_BTM_WARN_FUNC("!stp_btm \n");
return -1;
}
for (;;)
{
pOp = NULL;
osal_wait_for_event(&stp_btm->STPd_event,
_stp_btm_wait_for_msg,
(void *)stp_btm
);
if (osal_thread_should_stop(&stp_btm->BTMd))
{
STP_BTM_INFO_FUNC("should stop now... \n");
// TODO: clean up active opQ
break;
}
#if 1
if(gDumplogflag)
{
//printk("enter place1\n");
#if WMT_PLAT_ALPS
dump_uart_history();
#endif
gDumplogflag = 0;
continue;
}
#endif
/* get Op from activeQ */
pOp = _stp_btm_get_op(stp_btm, &stp_btm->rActiveOpQ);
if (!pOp)
{
STP_BTM_WARN_FUNC("get_lxop activeQ fail\n");
continue;
}
id = osal_op_get_id(pOp);
STP_BTM_DBG_FUNC("======> lxop_get_opid = %d, %s, remaining count = *%d*\n",
id, (id >= 4)?("???"):(g_btm_op_name[id]), RB_COUNT(&stp_btm->rActiveOpQ));
if (id >= STP_OPID_BTM_NUM)
{
STP_BTM_WARN_FUNC("abnormal opid id: 0x%x \n", id);
result = -1;
goto handler_done;
}
result = _stp_btm_handler(stp_btm, &pOp->op);
handler_done:
if (result)
{
STP_BTM_WARN_FUNC("opid id(0x%x)(%s) error(%d)\n", id, (id >= 4)?("???"):(g_btm_op_name[id]), result);
}
if (osal_op_is_wait_for_signal(pOp))
{
osal_op_raise_signal(pOp, result);
}
else
{
/* put Op back to freeQ */
_stp_btm_put_op(stp_btm, &stp_btm->rFreeOpQ, pOp);
}
if (STP_OPID_BTM_EXIT == id)
{
break;
} else if (STP_OPID_BTM_RST == id) {
/* prevent multi reset case */
stp_btm_reset_btm_wq(stp_btm);
}
}
STP_BTM_INFO_FUNC("exits \n");
return 0;
};
static inline INT32 _stp_btm_notify_wmt_rst_wq(MTKSTP_BTM_T *stp_btm)
{
P_OSAL_OP pOp;
INT32 bRet;
INT32 retval;
if(stp_btm == NULL)
{
return STP_BTM_OPERATION_FAIL;
}
else
{
pOp = _stp_btm_get_free_op(stp_btm);
if (!pOp)
{
STP_BTM_WARN_FUNC("get_free_lxop fail \n");
return -1;//break;
}
pOp->op.opId = STP_OPID_BTM_RST;
pOp->signal.timeoutValue= 0;
bRet = _stp_btm_put_act_op(stp_btm, pOp);
STP_BTM_DBG_FUNC("OPID(%d) type(%d) bRet(%d) \n\n",
pOp->op.opId,
pOp->op.au4OpData[0],
bRet);
retval = (0 == bRet) ? STP_BTM_OPERATION_FAIL : STP_BTM_OPERATION_SUCCESS;
}
return retval;
}
static inline INT32 _stp_btm_notify_stp_retry_wq(MTKSTP_BTM_T *stp_btm){
P_OSAL_OP pOp;
INT32 bRet;
INT32 retval;
if(stp_btm == NULL)
{
return STP_BTM_OPERATION_FAIL;
}
else
{
pOp = _stp_btm_get_free_op(stp_btm);
if (!pOp)
{
STP_BTM_WARN_FUNC("get_free_lxop fail \n");
return -1;//break;
}
pOp->op.opId = STP_OPID_BTM_RETRY;
pOp->signal.timeoutValue= 0;
bRet = _stp_btm_put_act_op(stp_btm, pOp);
STP_BTM_DBG_FUNC("OPID(%d) type(%d) bRet(%d) \n\n",
pOp->op.opId,
pOp->op.au4OpData[0],
bRet);
retval = (0 == bRet) ? STP_BTM_OPERATION_FAIL : STP_BTM_OPERATION_SUCCESS;
}
return retval;
}
static inline INT32 _stp_btm_notify_coredump_timeout_wq(MTKSTP_BTM_T *stp_btm){
P_OSAL_OP pOp;
INT32 bRet;
INT32 retval;
if (!stp_btm) {
return STP_BTM_OPERATION_FAIL;
} else {
pOp = _stp_btm_get_free_op(stp_btm);
if (!pOp) {
STP_BTM_WARN_FUNC("get_free_lxop fail \n");
return -1;//break;
}
pOp->op.opId = STP_OPID_BTM_DUMP_TIMEOUT;
pOp->signal.timeoutValue= 0;
bRet = _stp_btm_put_act_op(stp_btm, pOp);
STP_BTM_DBG_FUNC("OPID(%d) type(%d) bRet(%d) \n\n",
pOp->op.opId,
pOp->op.au4OpData[0],
bRet);
retval = (0 == bRet) ? STP_BTM_OPERATION_FAIL : STP_BTM_OPERATION_SUCCESS;
}
return retval;
}
static inline INT32 _stp_btm_notify_wmt_dmp_wq(MTKSTP_BTM_T *stp_btm){
P_OSAL_OP pOp;
INT32 bRet;
INT32 retval;
if(stp_btm == NULL)
{
return STP_BTM_OPERATION_FAIL;
}
else
{
pOp = _stp_btm_get_free_op(stp_btm);
if (!pOp)
{
//STP_BTM_WARN_FUNC("get_free_lxop fail \n");
return -1;//break;
}
pOp->op.opId = STP_OPID_BTM_DBG_DUMP;
pOp->signal.timeoutValue= 0;
bRet = _stp_btm_put_act_op(stp_btm, pOp);
STP_BTM_DBG_FUNC("OPID(%d) type(%d) bRet(%d) \n\n",
pOp->op.opId,
pOp->op.au4OpData[0],
bRet);
retval = (0 == bRet) ? STP_BTM_OPERATION_FAIL : STP_BTM_OPERATION_SUCCESS;
}
return retval;
}
INT32 stp_btm_notify_wmt_rst_wq(MTKSTP_BTM_T *stp_btm)
{
return _stp_btm_notify_wmt_rst_wq(stp_btm);
}
INT32 stp_btm_notify_stp_retry_wq(MTKSTP_BTM_T *stp_btm)
{
return _stp_btm_notify_stp_retry_wq(stp_btm);
}
INT32 stp_btm_notify_coredump_timeout_wq(MTKSTP_BTM_T *stp_btm)
{
return _stp_btm_notify_coredump_timeout_wq(stp_btm);
}
INT32 stp_btm_notify_wmt_dmp_wq(MTKSTP_BTM_T *stp_btm)
{
return _stp_btm_notify_wmt_dmp_wq(stp_btm);
}
MTKSTP_BTM_T *stp_btm_init(void)
{
INT32 i = 0x0;
INT32 ret =-1;
osal_unsleepable_lock_init(&stp_btm->wq_spinlock);
osal_event_init(&stp_btm->STPd_event);
stp_btm->wmt_notify = wmt_lib_btm_cb;
RB_INIT(&stp_btm->rFreeOpQ, STP_BTM_OP_BUF_SIZE);
RB_INIT(&stp_btm->rActiveOpQ, STP_BTM_OP_BUF_SIZE);
/* Put all to free Q */
for (i = 0; i < STP_BTM_OP_BUF_SIZE; i++)
{
osal_signal_init(&(stp_btm->arQue[i].signal));
_stp_btm_put_op(stp_btm, &stp_btm->rFreeOpQ, &(stp_btm->arQue[i]));
}
/*Generate PSM thread, to servie STP-CORE for packet retrying and core dump receiving*/
stp_btm->BTMd.pThreadData = (VOID *)stp_btm;
stp_btm->BTMd.pThreadFunc = (VOID *)_stp_btm_proc;
osal_memcpy(stp_btm->BTMd.threadName, BTM_THREAD_NAME , osal_strlen(BTM_THREAD_NAME));
ret = osal_thread_create(&stp_btm->BTMd);
if (ret < 0)
{
STP_BTM_ERR_FUNC("osal_thread_create fail...\n");
goto ERR_EXIT1;
}
/* Start STPd thread*/
ret = osal_thread_run(&stp_btm->BTMd);
if(ret < 0)
{
STP_BTM_ERR_FUNC("osal_thread_run FAILS\n");
goto ERR_EXIT1;
}
return stp_btm;
ERR_EXIT1:
return NULL;
}
INT32 stp_btm_deinit(MTKSTP_BTM_T *stp_btm){
UINT32 ret = -1;
STP_BTM_INFO_FUNC("btm deinit\n");
if(!stp_btm)
{
return STP_BTM_OPERATION_FAIL;
}
ret = osal_thread_destroy(&stp_btm->BTMd);
if(ret < 0)
{
STP_BTM_ERR_FUNC("osal_thread_destroy FAILS\n");
return STP_BTM_OPERATION_FAIL;
}
return STP_BTM_OPERATION_SUCCESS;
}
INT32 stp_btm_reset_btm_wq(MTKSTP_BTM_T *stp_btm)
{
UINT32 i = 0;
osal_lock_unsleepable_lock(&(stp_btm->wq_spinlock));
RB_INIT(&stp_btm->rFreeOpQ, STP_BTM_OP_BUF_SIZE);
RB_INIT(&stp_btm->rActiveOpQ, STP_BTM_OP_BUF_SIZE);
osal_unlock_unsleepable_lock(&(stp_btm->wq_spinlock));
/* Put all to free Q */
for (i = 0; i < STP_BTM_OP_BUF_SIZE; i++)
{
osal_signal_init(&(stp_btm->arQue[i].signal));
_stp_btm_put_op(stp_btm, &stp_btm->rFreeOpQ, &(stp_btm->arQue[i]));
}
return 0;
}
INT32 stp_notify_btm_dump(MTKSTP_BTM_T *stp_btm)
{
//printk("%s:enter++\n",__func__);
if(NULL == stp_btm)
{
osal_dbg_print("%s: NULL POINTER\n",__func__);
return -1;
}
else
{
gDumplogflag = 1;
osal_trigger_event(&stp_btm->STPd_event);
return 0;
}
}

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@@ -1,107 +0,0 @@
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
#ifndef _BTM_CORE_H
#define _BTM_CORE_H
#include "osal_typedef.h"
#include "osal.h"
#include "stp_wmt.h"
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
#define STP_BTM_OPERATION_FAIL (-1)
#define STP_BTM_OPERATION_SUCCESS (0)
#define STP_BTM_OP_BUF_SIZE (64)
#define BTM_THREAD_NAME "mtk_stp_btm"
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
typedef enum _ENUM_STP_BTM_OPID_T {
STP_OPID_BTM_RETRY = 0x0,
STP_OPID_BTM_RST = 0x1,
STP_OPID_BTM_DBG_DUMP = 0x2,
STP_OPID_BTM_DUMP_TIMEOUT = 0x3,
STP_OPID_BTM_EXIT,
STP_OPID_BTM_NUM
} ENUM_STP_BTM_OPID_T, *P_ENUM_STP_BTM_OPID_T;
typedef OSAL_OP_DAT STP_BTM_OP;
typedef P_OSAL_OP_DAT P_STP_BTM_OP;
typedef struct mtk_stp_btm
{
OSAL_THREAD BTMd; /* main thread (wmtd) handle */
OSAL_EVENT STPd_event;
OSAL_UNSLEEPABLE_LOCK wq_spinlock;
OSAL_OP_Q rFreeOpQ; /* free op queue */
OSAL_OP_Q rActiveOpQ; /* active op queue */
OSAL_OP arQue[STP_BTM_OP_BUF_SIZE]; /* real op instances */
/*wmt_notify*/
INT32 (*wmt_notify)(MTKSTP_BTM_WMT_OP_T);
}MTKSTP_BTM_T;
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
INT32 stp_btm_notify_wmt_rst_wq(MTKSTP_BTM_T *stp_btm);
INT32 stp_btm_notify_stp_retry_wq(MTKSTP_BTM_T *stp_btm);
INT32 stp_btm_notify_coredump_timeout_wq(MTKSTP_BTM_T *stp_btm);
INT32 stp_btm_notify_wmt_dmp_wq(MTKSTP_BTM_T *stp_btm);
INT32 stp_btm_deinit(MTKSTP_BTM_T *stp_btm);
INT32 stp_btm_reset_btm_wq(MTKSTP_BTM_T *stp_btm);
INT32 stp_notify_btm_dump(MTKSTP_BTM_T *stp_btm);
MTKSTP_BTM_T *stp_btm_init(void);
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
#endif

View File

@@ -1,63 +0,0 @@
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
#ifndef _DBG_CORE_H
#define _DBG_CORE_H
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
#endif

View File

@@ -1,209 +0,0 @@
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
#ifndef _PSM_CORE_H
#define _PSM_CORE_H
#include "osal_typedef.h"
#include "osal.h"
#include "stp_wmt.h"
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
#define PFX_PSM "[STP-PSM] "
#define STP_PSM_LOG_LOUD 4
#define STP_PSM_LOG_DBG 3
#define STP_PSM_LOG_INFO 2
#define STP_PSM_LOG_WARN 1
#define STP_PSM_LOG_ERR 0
#define ASSERT(expr)
#define STP_PSM_FIFO_SIZE 0x2000//8kbytes
#define STP_PSM_TX_SIZE 0x800 //2kbytes
#define STP_PSM_OPERATION_FAIL (-1)
#define STP_PSM_OPERATION_SUCCESS (0)
#define STP_PSM_PACKET_SIZE_MAX (2000)
#if WMT_UART_RX_MODE_WORK
#define CFG_PSM_CORE_FIFO_SPIN_LOCK 0
#else
#define CFG_PSM_CORE_FIFO_SPIN_LOCK 1
#endif
#define PSM_HANDLING 127
#define STP_PSM_WMT_PS_TASK_HANDLING_TIME 30 //20 milli-seconds
#define STP_PSM_IDLE_TIME_SLEEP 5000 //temporary for stress testing
#define STP_PSM_SDIO_IDLE_TIME_SLEEP 100 //temporary for SDIO stress testing
#define STP_PSM_WAIT_EVENT_TIMEOUT 6000
#define STP_PSM_WMT_EVENT_SLEEP_EN (0x1UL << 0)
#define STP_PSM_WMT_EVENT_WAKEUP_EN (0x1UL << 1)
#define STP_PSM_BLOCK_DATA_EN (0x1UL << 2)
#define STP_PSM_WMT_EVENT_DISABLE_MONITOR (0x1UL << 3)
#define STP_PSM_WMT_EVENT_ROLL_BACK_EN (0x1UL << 4)
#define STP_PSM_RESET_EN (0x1UL << 5)
#define STP_PSM_WMT_EVENT_HOST_WAKEUP_EN (0x1UL << 6)
#define STP_PSM_WMT_EVENT_DISABLE_MONITOR_TX_HIGH_DENSITY (0x1UL << 7)
#define STP_PSM_WMT_EVENT_DISABLE_MONITOR_RX_HIGH_DENSITY (0x1UL << 8)
/* OP command ring buffer : must be power of 2 */
#define STP_OP_BUF_SIZE (16)
#define PSM_THREAD_NAME "mtk_stp_psm"
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
typedef enum {
ACT = 0,
ACT_INACT,
INACT,
INACT_ACT,
STP_PSM_MAX_STATE,
}MTKSTP_PSM_STATE_T;
typedef enum _ENUM_STP_OPID_T {
STP_OPID_PSM_SLEEP = 0,
STP_OPID_PSM_WAKEUP,
STP_OPID_PSM_HOST_AWAKE,
STP_OPID_PSM_EXIT,
STP_OPID_PSM_NUM,
STP_OPID_PSM_INALID = STP_OPID_PSM_NUM,
} ENUM_STP_OPID_T, *P_ENUM_STP_OPID_T;
typedef enum {
MON=0,
UNMON,
}MTKSTP_PSM_MONSTATE_T;
typedef INT32 (*wmt_notify_t)(MTKSTP_PSM_ACTION_T action);
typedef INT32 (*stp_tx_cb_t)(unsigned char*buffer, UINT32 length, UINT8 type);
typedef OSAL_OP_DAT STP_OP;
typedef P_OSAL_OP_DAT P_STP_OP;
#if CFG_PSM_CORE_FIFO_SPIN_LOCK
typedef OSAL_UNSLEEPABLE_LOCK PSM_FIFO_LOCK, *PPSM_FIFO_LOCK;
#else
typedef OSAL_SLEEPABLE_LOCK PSM_FIFO_LOCK, *PPSM_FIFO_LOCK;
#endif
typedef struct mtk_stp_psm
{
OSAL_THREAD PSMd; /* main thread (wmtd) handle */
OSAL_EVENT STPd_event;
OSAL_OP_Q rFreeOpQ; /* free op queue */
OSAL_OP_Q rActiveOpQ; /* active op queue */
OSAL_OP arQue[STP_OP_BUF_SIZE]; /* real op instances */
//OSAL_OP current_active_op;
//P_OSAL_OP current_active_op;
UINT32 last_active_opId;
MTKSTP_PSM_STATE_T work_state; /*working state*/
INT32 flag;
/* in normal cases, sleep op is always enabled; but in error cases, we can't execute sleep cmd, Eg: FW assert, core dump*/
INT32 sleep_en;
// OSAL_UNSLEEPABLE_LOCK flagSpinlock;
INT32 idle_time_to_sleep;
OSAL_WAKE_LOCK wake_lock;
OSAL_TIMER psm_timer; /*monitor if active*/
OSAL_EVENT wait_wmt_q;
OSAL_FIFO hold_fifo;
PSM_FIFO_LOCK hold_fifo_lock;
OSAL_UNSLEEPABLE_LOCK wq_spinlock;
OSAL_SLEEPABLE_LOCK user_lock;
OSAL_SLEEPABLE_LOCK stp_psm_lock;
INT32 (*wmt_notify)(MTKSTP_PSM_ACTION_T action);
INT32 (*stp_tx_cb)(unsigned char*buffer,UINT32 length, UINT8 type);
MTK_WCN_BOOL (*is_wmt_quick_ps_support)(VOID);
UINT8 out_buf[STP_PSM_TX_SIZE];
}MTKSTP_PSM_T;
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
/*stp-psm external function*/
INT32 stp_psm_notify_stp(MTKSTP_PSM_T *stp_psm, const MTKSTP_PSM_ACTION_T action);
INT32 stp_psm_notify_wmt_wakeup(MTKSTP_PSM_T *stp_psm);
INT32 stp_psm_notify_wmt_sleep(MTKSTP_PSM_T *stp_psm);
INT32 stp_psm_start_monitor(MTKSTP_PSM_T *stp_psm);
INT32 stp_psm_is_to_block_traffic(MTKSTP_PSM_T * stp_psm);
INT32 stp_psm_is_disable(MTKSTP_PSM_T * stp_psm);
INT32 stp_psm_has_pending_data(MTKSTP_PSM_T * stp_psm);
INT32 stp_psm_release_data(MTKSTP_PSM_T *stp_psm);
INT32 stp_psm_hold_data (
MTKSTP_PSM_T *stp_psm,
const UINT8 *buffer,
const UINT32 len,
const UINT8 type
);
INT32 stp_psm_do_wakeup(MTKSTP_PSM_T *stp_psm);
INT32 stp_psm_disable_by_tx_rx_density(MTKSTP_PSM_T *stp_psm, INT32 dir);
INT32 stp_psm_reset(MTKSTP_PSM_T *stp_psm);
INT32 stp_psm_disable(MTKSTP_PSM_T *stp_psm);
INT32 stp_psm_enable(MTKSTP_PSM_T *stp_psm, INT32 idle_time_to_sleep);
struct mtk_stp_psm *stp_psm_init(void);
INT32 stp_psm_deinit(MTKSTP_PSM_T *stp_psm);
MTK_WCN_BOOL mtk_wcn_stp_psm_dbg_level(UINT32 dbglevel);
INT32 stp_psm_sleep_for_thermal(MTKSTP_PSM_T *stp_psm);
INT32 stp_psm_thread_lock_aquire(MTKSTP_PSM_T *stp_psm);
INT32 stp_psm_thread_lock_release(MTKSTP_PSM_T *stp_psm);
INT32 stp_psm_set_state(MTKSTP_PSM_T *stp_psm, MTKSTP_PSM_STATE_T state);
MTK_WCN_BOOL stp_psm_is_quick_ps_support (VOID);
INT32 stp_psm_set_sleep_enable(MTKSTP_PSM_T *stp_psm);
INT32 stp_psm_set_sleep_disable(MTKSTP_PSM_T *stp_psm);
INT32 stp_psm_check_sleep_enable(MTKSTP_PSM_T *stp_psm);
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
#endif

View File

@@ -1,555 +0,0 @@
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
#ifndef _STP_CORE_H
#define _STP_CORE_H
#include "osal_typedef.h"
#include "osal.h"
#include "stp_exp.h"
#include "psm_core.h"
#include "btm_core.h"
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
#define CONFIG_POWER_SAVING_SUPPORT
#if WMT_UART_RX_MODE_WORK
#define CFG_STP_CORE_CTX_SPIN_LOCK 0
#else
#define CFG_STP_CORE_CTX_SPIN_LOCK 1
#endif
#define PFX "[STP] "
#define STP_LOG_DBG 4
#define STP_LOG_PKHEAD 3
#define STP_LOG_INFO 2
#define STP_LOG_WARN 1
#define STP_LOG_ERR 0
extern unsigned int gStpDbgLvl;
#define STP_DBG_FUNC(fmt, arg...) if(gStpDbgLvl >= STP_LOG_DBG){ osal_dbg_print(PFX "%s: " fmt, __FUNCTION__ ,##arg);}
#define STP_INFO_FUNC(fmt, arg...) if(gStpDbgLvl >= STP_LOG_INFO){ osal_dbg_print(PFX "%s:[I] " fmt, __FUNCTION__ ,##arg);}
#define STP_WARN_FUNC(fmt, arg...) if(gStpDbgLvl >= STP_LOG_WARN){ osal_dbg_print(PFX "%s:[W] " fmt, __FUNCTION__ ,##arg);}
#define STP_ERR_FUNC(fmt, arg...) if(gStpDbgLvl >= STP_LOG_ERR){ osal_dbg_print(PFX "%s:[E] " fmt, __FUNCTION__ ,##arg);}
#define STP_TRC_FUNC(f) if(gStpDbgLvl >= STP_LOG_DBG){ osal_dbg_print(PFX "<%s> <%d>\n", __FUNCTION__, __LINE__);}
#define STP_DUMP_PACKET_HEAD(a, b, c) if(gStpDbgLvl >= STP_LOG_PKHEAD){stp_dump_data(a, b, c);}
#define STP_TRACE_FUNC(fmt, arg...) if(gStpDbgLvl >= STP_LOG_DBG){ osal_dbg_print(PFX "%s: " fmt, __FUNCTION__ ,##arg);}
#define MTKSTP_UART_FULL_MODE 0x01
#define MTKSTP_UART_MAND_MODE 0x02
#define MTKSTP_SDIO_MODE 0x04
#define MTKSTP_BUFFER_SIZE (16384)
/*To check function driver's status by the the interface*/
/*Operation definition*/
#define OP_FUNCTION_ACTIVE 0
/*Driver's status*/
#define STATUS_OP_INVALID 0
#define STATUS_FUNCTION_INVALID 1
#define STATUS_FUNCTION_ACTIVE 31
#define STATUS_FUNCTION_INACTIVE 32
#define MTKSTP_CRC_SIZE (2)
#define MTKSTP_HEADER_SIZE (4)
#define MTKSTP_SEQ_SIZE (8)
/*#define MTKSTP_WINSIZE (4)*/
#define MTKSTP_WINSIZE (7)
#define MTKSTP_TX_TIMEOUT (180) /*TODO: Baudrate to decide this*/
#define MTKSTP_RETRY_LIMIT (10)
#define INDEX_INC(idx) \
{ \
idx++; \
idx &= 0x7; \
}
#define INDEX_DEC(idx) \
{ \
idx--; \
idx &= 0x7; \
}
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
typedef INT32 (*IF_TX)(const UINT8 *data, const UINT32 size, UINT32 *written_size);
/* event/signal */
typedef INT32 (*EVENT_SET)(UINT8 function_type);
typedef INT32 (*EVENT_TX_RESUME)(UINT8 winspace);
typedef INT32 (*FUNCTION_STATUS)(UINT8 type, UINT8 op);
typedef INT32 (*WMT_NOTIFY_FUNC_T)(UINT32 action);
typedef INT32 (*BTM_NOTIFY_WMT_FUNC_T)(INT32);
typedef struct
{
/* common interface */
IF_TX cb_if_tx;
/* event/signal */
EVENT_SET cb_event_set;
EVENT_TX_RESUME cb_event_tx_resume;
FUNCTION_STATUS cb_check_funciton_status;
}mtkstp_callback;
typedef enum
{
MTKSTP_SYNC = 0,
MTKSTP_SEQ,
MTKSTP_ACK,
MTKSTP_NAK,
MTKSTP_TYPE,
MTKSTP_LENGTH,
MTKSTP_CHECKSUM,
MTKSTP_DATA,
MTKSTP_CRC1,
MTKSTP_CRC2,
MTKSTP_RESYNC1,
MTKSTP_RESYNC2,
MTKSTP_RESYNC3,
MTKSTP_RESYNC4,
MTKSTP_FW_MSG,
} mtkstp_parser_state;
typedef struct
{
mtkstp_parser_state state;
UINT8 seq;
UINT8 ack;
UINT8 nak;
UINT8 type;
UINT16 length;
UINT8 checksum;
UINT16 crc;
} mtkstp_parser_context_struct;
typedef struct
{
UINT8 txseq; // last tx pkt's seq + 1
UINT8 txack; // last tx pkt's ack
UINT8 rxack; // last rx pkt's ack
UINT8 winspace; // current sliding window size
UINT8 expected_rxseq; // last rx pkt's seq + 1
UINT8 retry_times;
} mtkstp_sequence_context_struct;
typedef struct
{
//MTK_WCN_MUTEX mtx;
OSAL_UNSLEEPABLE_LOCK mtx;
UINT8 buffer[MTKSTP_BUFFER_SIZE];
UINT32 read_p;
UINT32 write_p;
} mtkstp_ring_buffer_struct;
typedef struct
{
UINT8 inband_rst_set;
UINT32 rx_counter; // size of current processing pkt in rx_buf[]
UINT8 rx_buf[MTKSTP_BUFFER_SIZE]; // input buffer of STP, room for current processing pkt
UINT32 tx_read; // read ptr of tx_buf[]
UINT32 tx_write; // write ptr of tx_buf[]
UINT8 tx_buf[MTKSTP_BUFFER_SIZE]; // output buffer of STP
UINT32 tx_start_addr[MTKSTP_SEQ_SIZE]; // ptr of each pkt in tx_buf[]
UINT32 tx_length[MTKSTP_SEQ_SIZE]; // length of each pkt in tx_buf[]
mtkstp_ring_buffer_struct ring[MTKSTP_MAX_TASK_NUM]; // ring buffers for each function driver
mtkstp_parser_context_struct parser; // current rx pkt's content
mtkstp_sequence_context_struct sequence; // state machine's current status
//MTK_WCN_MUTEX stp_mutex;
#if CFG_STP_CORE_CTX_SPIN_LOCK
OSAL_UNSLEEPABLE_LOCK stp_mutex;
#else
OSAL_SLEEPABLE_LOCK stp_mutex;
#endif
//MTK_WCN_TIMER tx_timer; // timer for tx timeout handling
OSAL_TIMER tx_timer;
MTKSTP_PSM_T *psm;
MTKSTP_BTM_T *btm;
UINT8 f_enable; /* default disabled */
UINT8 f_ready; /* default non-ready */
UINT8 f_pending_type;
UINT8 f_coredump; /*block tx flag, for now, only when f/w assert happens, we will set this bit on*/
UINT8 en_coredump;
/* Flag to identify Blueztooth is Bluez/or MTK Stack*/
MTK_WCN_BOOL f_bluez;
MTK_WCN_BOOL f_dbg_en;
MTK_WCN_BOOL f_autorst_en;
/* Flag to identify STP by SDIO or UART */
UINT32 f_mode;
/* Flag to indicate the last WMT CLOSE*/
UINT32 f_wmt_last_close;
}mtkstp_context_struct;
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
INT32 stp_send_data_no_ps(UINT8 *buffer, UINT32 length, UINT8 type);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_init
* DESCRIPTION
* init STP kernel
* PARAMETERS
* cb_func [IN] function pointers of system APIs
* RETURNS
* INT32 0 = success, others = failure
*****************************************************************************/
extern INT32 mtk_wcn_stp_init(const mtkstp_callback * const cb_func);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_deinit
* DESCRIPTION
* deinit STP kernel
* PARAMETERS
* void
* RETURNS
* INT32 0 = success, others = failure
*****************************************************************************/
extern INT32 mtk_wcn_stp_deinit(void);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_enable
* DESCRIPTION
* enable/disable STP
* PARAMETERS
* value [IN] 0 = disable, others = enable
* RETURNS
* INT32 0 = success, others = error
*****************************************************************************/
extern INT32 mtk_wcn_stp_enable(INT32 value);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_ready
* DESCRIPTION
* ready/non-ready STP
* PARAMETERS
* value [IN] 0 = non-ready, others = ready
* RETURNS
* INT32 0 = success, others = error
*****************************************************************************/
extern INT32 mtk_wcn_stp_ready(INT32 value);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_coredump_start_ctrl
* DESCRIPTION
* set f/w assert flag in STP context
* PARAMETERS
* value [IN] 0=assert end, others=assert begins
* RETURNS
* INT32 0=success, others=error
*****************************************************************************/
extern INT32 mtk_wcn_stp_coredump_start_ctrl(UINT32 value);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_coredump_start_get
* DESCRIPTION
* get f/w assert flag in STP context
* PARAMETERS
* VOID
* RETURNS
* INT32 0= f/w assert flag is not set, others=f/w assert flag is set
*****************************************************************************/
extern INT32 mtk_wcn_stp_coredump_start_get(VOID);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_send_data_raw
* DESCRIPTION
* send raw data to common interface, bypass STP
* PARAMETERS
* buffer [IN] data buffer
* length [IN] data buffer length
* type [IN] subfunction type
* RETURNS
* INT32 length transmitted
*****************************************************************************/
extern INT32 mtk_wcn_stp_send_data_raw(const UINT8 *buffer, const UINT32 length, const UINT8 type);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_set_sdio_mode
* DESCRIPTION
* Set stp for SDIO mode
* PARAMETERS
* sdio_flag [IN] sdio mode flag (TRUE:SDIO mode, FALSE:UART mode)
* RETURNS
* void
*****************************************************************************/
extern void mtk_wcn_stp_set_mode(UINT32 sdio_flag);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_is_uart_fullset_mode
* DESCRIPTION
* Is stp use UART Fullset mode?
* PARAMETERS
* none.
* RETURNS
* MTK_WCN_BOOL TRUE:UART Fullset, FALSE:UART Fullset
*****************************************************************************/
extern MTK_WCN_BOOL mtk_wcn_stp_is_uart_fullset_mode(void);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_is_uart_mand_mode
* DESCRIPTION
* Is stp use UART Mandatory mode?
* PARAMETERS
* none.
* RETURNS
* MTK_WCN_BOOL TRUE:UART Mandatory, FALSE:UART Mandatory
*****************************************************************************/
extern MTK_WCN_BOOL mtk_wcn_stp_is_uart_mand_mode(void);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_is_sdio_mode
* DESCRIPTION
* Is stp use SDIO mode?
* PARAMETERS
* none.
* RETURNS
* MTK_WCN_BOOL TRUE:SDIO mode, FALSE:UART mode
*****************************************************************************/
extern MTK_WCN_BOOL mtk_wcn_stp_is_sdio_mode(void);
/*****************************************************************************
* FUNCTION
* stp_send_inband_reset
* DESCRIPTION
* To sync to oringnal stp state with f/w stp
* PARAMETERS
* none.
* RETURNS
* none
*****************************************************************************/
extern void mtk_wcn_stp_inband_reset(void);
/*****************************************************************************
* FUNCTION
* stp_send_inband_reset
* DESCRIPTION
* To send testing command to chip
* PARAMETERS
* none.
* RETURNS
* none
*****************************************************************************/
extern void mtk_wcn_stp_test_cmd(INT32 no);
/*****************************************************************************
* FUNCTION
* stp_send_inband_reset
* DESCRIPTION
* To control STP debugging mechanism
* PARAMETERS
* func_no: function control, func_op: dumpping filer, func_param: dumpping parameter
* RETURNS
* none
*****************************************************************************/
extern void mtk_wcn_stp_debug_ctrl(INT32 func_no, INT32 func_op, INT32 func_param);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_flush
* DESCRIPTION
* flush all stp context
* PARAMETERS
* none.
* RETURNS
* none
*****************************************************************************/
extern void mtk_wcn_stp_flush_context(void);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_rx_queue
* DESCRIPTION
* flush all stp rx queue
* PARAMETERS
* none.
* RETURNS
* none
*****************************************************************************/
extern void mtk_wcn_stp_flush_rx_queue(UINT32 type);
/*****************************************************************************
* FUNCTION
* set stp debugging mdoe
* DESCRIPTION
* set stp debugging mdoe
* PARAMETERS
* dbg_mode: switch to dbg mode ?
* RETURNS
* void
*****************************************************************************/
extern void mtk_wcn_stp_set_dbg_mode(MTK_WCN_BOOL dbg_mode);
/*****************************************************************************
* FUNCTION
* set stp auto reset mdoe
* DESCRIPTION
* set stp auto reset mdoe
* PARAMETERS
* auto_rst: switch to auto reset mode ?
* RETURNS
* void
*****************************************************************************/
extern void mtk_wcn_stp_set_auto_rst(MTK_WCN_BOOL auto_rst);
/*stp_psm support*/
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_psm_notify_stp
* DESCRIPTION
* WMT notification to STP that power saving job is done or not
* PARAMETERS
*
* RETURNS
* 0: Sccuess Negative value: Fail
*****************************************************************************/
extern int mtk_wcn_stp_psm_notify_stp(const UINT32 action);
extern int mtk_wcn_stp_set_psm_state(MTKSTP_PSM_STATE_T state);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_psm_enabla
* DESCRIPTION
* enable STP PSM
* PARAMETERS
* int idle_time_to_sleep: IDLE time to sleep
* RETURNS
* 0: Sccuess Negative value: Fail
*****************************************************************************/
extern int mtk_wcn_stp_psm_enable(int idle_time_to_sleep);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_psm_disable
* DESCRIPTION
* disable STP PSM
* PARAMETERS
* void
* RETURNS
* 0: Sccuess Negative value: Fail
*****************************************************************************/
extern int mtk_wcn_stp_psm_disable(void);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_psm_reset
* DESCRIPTION
* reset STP PSM (used on whole chip reset)
* PARAMETERS
* void
* RETURNS
* 0: Sccuess Negative value: Fail
*****************************************************************************/
extern int mtk_wcn_stp_psm_reset(void);
extern void stp_do_tx_timeout(void);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_btm_get_dmp
* DESCRIPTION
* get stp dump related information
* PARAMETERS
* buffer: dump placement, len: dump size
* RETURNS
* 0: Success Negative Value: Fail
*****************************************************************************/
extern int mtk_wcn_stp_btm_get_dmp(char *buf, int *len);
extern int mtk_wcn_stp_dbg_enable(void);
extern int mtk_wcn_stp_dbg_disable(void);
extern void mtk_wcn_stp_set_if_tx_type (ENUM_STP_TX_IF_TYPE stp_if_type);
extern int mtk_wcn_sys_if_rx(UINT8 *data, INT32 size);
extern MTK_WCN_BOOL mtk_wcn_stp_dbg_level(UINT32 dbglevel);
extern INT32 mtk_wcn_stp_dbg_dump_package(VOID);
extern int stp_drv_init(void);
extern void stp_drv_exit(void);
extern INT32 mtk_wcn_stp_dbg_log_ctrl(UINT32 on);
extern INT32 mtk_wcn_stp_coredump_flag_ctrl(UINT32 on);
extern INT32 mtk_wcn_stp_coredump_flag_get(VOID);
extern INT32 mtk_wcn_stp_notify_sleep_for_thermal(void);
extern INT32 mtk_wcn_stp_set_wmt_last_close(UINT32 value);
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
#endif /* _STP_CORE_H_ */

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@@ -1,89 +0,0 @@
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
#ifndef _STP_WMT_H
#define _STP_WMT_H
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
typedef enum {
BTM_RST_OP = 0,
BTM_DMP_OP = 1,
BTM_GET_AEE_SUPPORT_FLAG= 2,
BTM_MAX_OP,
}MTKSTP_BTM_WMT_OP_T;
typedef enum {
SLEEP = 0,
HOST_AWAKE,
WAKEUP,
EIRQ,
ROLL_BACK,
STP_PSM_MAX_ACTION
}MTKSTP_PSM_ACTION_T;
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
extern MTK_WCN_BOOL wmt_lib_btm_cb (
MTKSTP_BTM_WMT_OP_T op
);
extern INT32 wmt_lib_ps_stp_cb (
MTKSTP_PSM_ACTION_T action
);
extern MTK_WCN_BOOL wmt_lib_is_quick_ps_support (VOID);
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
#endif /* _STP_WMT_H_*/

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@@ -1,81 +0,0 @@
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
#ifndef _WMT_CONF_H_
#define _WMT_CONF_H_
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
#define CUST_CFG_WMT "WMT.cfg"
#define CUST_CFG_WMT_PREFIX "/system/etc/firmware/"
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
INT32 wmt_conf_read_file(VOID);
P_WMT_GEN_CONF wmt_conf_get_cfg(VOID);
INT32 wmt_conf_set_cfg_file(const char *name);
#endif /* _WMT_CONF_H_ */

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@@ -1,460 +0,0 @@
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
#ifndef _WMT_CORE_H_
#define _WMT_CORE_H_
#include "osal.h"
#include "wmt_ctrl.h"
#include "wmt_exp.h"
#include "wmt_plat.h"
//TODO: [GeorgeKuo][FixMe] remove temporarily
//#include "mtk_wcn_cmb_stub.h" /* for AIF state definition */
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
#if defined(MT6620E3) || defined(MT6620E6) //need modify this part
#define CFG_CORE_MT6620_SUPPORT 1 /* whether MT6620 is supported or not */
#else
#define CFG_CORE_MT6620_SUPPORT 1 /* whether MT6620 is supported or not */
#endif
#if defined(MT6628)
#define CFG_CORE_MT6628_SUPPORT 1 /* whether MT6628 is supported or not */
#else
#define CFG_CORE_MT6628_SUPPORT 1 /* whether MT6628 is supported or not */
#endif
// TODO:[ChangeFeature][George] move this definition outside so that wmt_dev can remove wmt_core.h inclusion.
#define defaultPatchName "mt66xx_patch_hdr.bin"
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
#define BCNT_PATCH_BUF_HEADROOM (8)
#define DWCNT_HIF_CONF (4)
#define DWCNT_STRAP_CONF (4)
#define DWCNT_RESERVED (8)
#define DWCNT_CTRL_DATA (16)
#if 0 // TODO: [obsolete][GeorgeKuo]: remove ubsolete definitions
#define WMT_SET (1)
#define WMT_QUERY (0)
#define WMT_PKT_FMT_RAW (1)
#define WMT_PKT_FMT_STP (0)
#endif
#define WMT_FUNC_CTRL_ON (MTK_WCN_BOOL_TRUE)
#define WMT_FUNC_CTRL_OFF (MTK_WCN_BOOL_FALSE)
#define WMT_HDR_LEN (4) /* header length */
#define WMT_STS_LEN (1) /* status length */
#define WMT_FLAG_LEN (1)
#define WMT_HIF_UART_INFO_LEN (4)
#define WMT_FUNC_CTRL_PARAM_LEN (1)
#define WMT_LPBK_CMD_LEN (5)
#define WMT_LPBK_BUF_LEN (1024+WMT_LPBK_CMD_LEN)
#define WMT_DEFAULT_BAUD_RATE (115200)
#define INIT_CMD(c, e, s) {.cmd= c, .cmdSz=sizeof(c), .evt=e, .evtSz=sizeof(e), .str=s}
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
typedef enum _ENUM_WMT_FM_T
{
WMT_FM_INVALID = 0,
WMT_FM_I2C = 1,
WMT_FM_COMM = 2,
WMT_FM_MAX
} ENUM_WMT_FM_T, *P_ENUM_WMT_FM_T;
typedef enum _ENUM_WMT_HIF_T
{
WMT_HIF_UART = 0,
WMT_HIF_SDIO = 1,
WMT_HIF_MAX
} ENUM_WMT_HIF_T, *P_ENUM_WMT_HIF_T;
#if 0 /* [George] moved to wmt_exp.h for hif_sdio's use */
typedef enum {
WMT_SDIO_SLOT_INVALID = 0,
WMT_SDIO_SLOT_SDIO1 = 1, /* Wi-Fi dedicated SDIO1*/
WMT_SDIO_SLOT_SDIO2 = 2,
WMT_SDIO_SLOT_MAX
} WMT_SDIO_SLOT_NUM;
typedef enum {
WMT_SDIO_FUNC_STP = 0,
WMT_SDIO_FUNC_WIFI = 1,
WMT_SDIO_FUNC_MAX
} WMT_SDIO_FUNC_TYPE;
#endif
typedef enum _ENUM_WMT_OPID_T {
WMT_OPID_HIF_CONF = 0,
WMT_OPID_PWR_ON = 1,
WMT_OPID_PWR_OFF = 2,
WMT_OPID_FUNC_ON = 3,
WMT_OPID_FUNC_OFF = 4,
WMT_OPID_REG_RW = 5, // TODO:[ChangeFeature][George] is this OP obsoleted?
WMT_OPID_EXIT = 6,
WMT_OPID_PWR_SV = 7,
WMT_OPID_DSNS = 8,
WMT_OPID_LPBK = 9,
WMT_OPID_CMD_TEST = 10,
WMT_OPID_HW_RST = 11,
WMT_OPID_SW_RST = 12,
WMT_OPID_BAUD_RST = 13,
WMT_OPID_STP_RST = 14,
WMT_OPID_THERM_CTRL = 15,
WMT_OPID_EFUSE_RW = 16,
WMT_OPID_GPIO_CTRL = 17,
WMT_OPID_SDIO_CTRL = 18,
WMT_OPID_FW_COREDMP = 19,
WMT_OPID_GPIO_STATE = 20,
WMT_OPID_MAX
} ENUM_WMT_OPID_T, *P_ENUM_WMT_OPID_T;
typedef OSAL_OP_DAT WMT_OP;
typedef P_OSAL_OP_DAT P_WMT_OP;
typedef enum _ENUM_WMT_UART_FC_T
{
WMT_UART_NO_FC = 0,
WMT_UART_MTK_SW_FC = 1,
WMT_UART_LUX_SW_FC = 2,
WMT_UART_HW_FC = 3,
WMT_UART_MAX
} ENUM_WMT_UART_FC_T, *P_ENUM_UART_FC_T;
typedef struct _WMT_HIF_CONF {
UINT32 hifType; // HIF Type
UINT32 uartFcCtrl; // UART FC config
UINT32 au4HifConf[DWCNT_HIF_CONF]; // HIF Config
UINT32 au4StrapConf[DWCNT_STRAP_CONF]; // Strap Config
} WMT_HIF_CONF, *P_WMT_HIF_CONF;
typedef INT32 (*WMT_OPID_FUNC)(P_WMT_OP);
typedef struct _WMT_GEN_CONF {
UCHAR cfgExist;
UCHAR coex_wmt_ant_mode;
UCHAR coex_wmt_wifi_time_ctl;
UCHAR coex_wmt_ext_pta_dev_on;
UCHAR coex_bt_rssi_upper_limit;
UCHAR coex_bt_rssi_mid_limit;
UCHAR coex_bt_rssi_lower_limit;
UCHAR coex_bt_pwr_high;
UCHAR coex_bt_pwr_mid;
UCHAR coex_bt_pwr_low;
UCHAR coex_wifi_rssi_upper_limit;
UCHAR coex_wifi_rssi_mid_limit;
UCHAR coex_wifi_rssi_lower_limit;
UCHAR coex_wifi_pwr_high;
UCHAR coex_wifi_pwr_mid;
UCHAR coex_wifi_pwr_low;
UCHAR coex_ext_pta_hi_tx_tag;
UCHAR coex_ext_pta_hi_rx_tag;
UCHAR coex_ext_pta_lo_tx_tag;
UCHAR coex_ext_pta_lo_rx_tag;
UINT16 coex_ext_pta_sample_t1;
UINT16 coex_ext_pta_sample_t2;
UCHAR coex_ext_pta_wifi_bt_con_trx;
UINT32 coex_misc_ext_pta_on;
UINT32 coex_misc_ext_feature_set;
/*GPS LNA setting*/
UCHAR wmt_gps_lna_pin;
UCHAR wmt_gps_lna_enable;
/*Power on sequence*/
UCHAR pwr_on_rtc_slot;
UCHAR pwr_on_ldo_slot;
UCHAR pwr_on_rst_slot;
UCHAR pwr_on_off_slot;
UCHAR pwr_on_on_slot;
UCHAR co_clock_flag;
/* Combo chip side SDIO driving setting */
UINT32 sdio_driving_cfg;
} WMT_GEN_CONF, *P_WMT_GEN_CONF;
typedef enum _ENUM_DRV_STS_ {
#if 0
DRV_STS_INVALID = 0,
DRV_STS_UNREG = 1, /* Initial State */
#endif
DRV_STS_POWER_OFF = 0, /* initial state */
DRV_STS_POWER_ON = 1, /* powered on, only WMT */
DRV_STS_FUNC_ON = 2, /* FUNC ON */
DRV_STS_MAX
} ENUM_DRV_STS, *P_ENUM_DRV_STS;
typedef enum _WMT_IC_PIN_ID_
{
WMT_IC_PIN_AUDIO = 0,
WMT_IC_PIN_EEDI = 1,
WMT_IC_PIN_EEDO = 2,
WMT_IC_PIN_GSYNC = 3,
WMT_IC_PIN_MAX
}WMT_IC_PIN_ID, *P_WMT_IC_PIN_ID;
typedef enum _WMT_IC_PIN_STATE_
{
WMT_IC_PIN_EN = 0,
WMT_IC_PIN_DIS = 1,
WMT_IC_AIF_0 = 2, // = CMB_STUB_AIF_0,
WMT_IC_AIF_1 = 3, // = CMB_STUB_AIF_1,
WMT_IC_AIF_2 = 4, // = CMB_STUB_AIF_2,
WMT_IC_AIF_3 = 5, // = CMB_STUB_AIF_3,
WMT_IC_PIN_MUX = 6,
WMT_IC_PIN_GPIO = 7,
WMT_IC_PIN_GPIO_HIGH = 8,
WMT_IC_PIN_GPIO_LOW = 8,
WMT_IC_PIN_STATE_MAX
} WMT_IC_PIN_STATE, *P_WMT_IC_PIN_STATE;
typedef enum _WMT_CO_CLOCK_
{
WMT_CO_CLOCK_DIS = 0,
WMT_CO_CLOCK_EN = 1,
WMT_CO_CLOCK_MAX
} WMT_CO_CLOCK, *P_WMT_CO_CLOCK;
typedef INT32 (*SW_INIT)(P_WMT_HIF_CONF pWmtHifConf);
typedef INT32 (*SW_DEINIT)(P_WMT_HIF_CONF pWmtHifConf);
typedef INT32 (*IC_PIN_CTRL)(WMT_IC_PIN_ID id, WMT_IC_PIN_STATE state, UINT32 flag);
typedef INT32 (*IC_VER_CHECK)(VOID);
typedef INT32 (*CO_CLOCK_CTRL)(WMT_CO_CLOCK on);
typedef MTK_WCN_BOOL(*IS_QUICK_SLEEP_SUPPORT)(VOID);
typedef MTK_WCN_BOOL(*IS_AEE_DUMP_SUPPORT)(VOID);
typedef struct _WMT_IC_OPS_ {
UINT32 icId;
SW_INIT sw_init;
SW_DEINIT sw_deinit;
IC_PIN_CTRL ic_pin_ctrl;
IC_VER_CHECK ic_ver_check;
CO_CLOCK_CTRL co_clock_ctrl;
IS_QUICK_SLEEP_SUPPORT is_quick_sleep;
IS_AEE_DUMP_SUPPORT is_aee_dump_support;
} WMT_IC_OPS, *P_WMT_IC_OPS;
typedef struct _WMT_CTX_
{
ENUM_DRV_STS eDrvStatus[WMTDRV_TYPE_MAX]; /* Controlled driver status */
UINT32 wmtInfoBit; /* valid info bit */
WMT_HIF_CONF wmtHifConf; /* HIF information */
/* Pointer to WMT_IC_OPS. Shall be assigned to a correct table in stp_init
* if and only if getting chip id successfully. hwver and fwver are kept in
* WMT-IC module only.
*/
P_WMT_IC_OPS p_ic_ops;
} WMT_CTX, *P_WMT_CTX;
// TODO:[ChangeFeature][George] remove WMT_PKT. replace it with hardcoded arrays.
// Using this struct relies on compiler's implementation and pack() settings
typedef struct _WMT_PKT_ {
UINT8 eType; // PKT_TYPE_*
UINT8 eOpCode; // OPCODE_*
UINT16 u2SduLen; // 2 bytes length, little endian
UINT8 aucParam[32];
} WMT_PKT, *P_WMT_PKT;
/* WMT Packet Format */
typedef enum _ENUM_PKT_TYPE {
PKT_TYPE_INVALID = 0,
PKT_TYPE_CMD = 1,
PKT_TYPE_EVENT = 2,
PKT_TYPE_MAX
} ENUM_PKT_TYPE, *P_ENUM_PKT_TYPE;
typedef enum _ENUM_OPCODE {
OPCODE_INVALID = 0,
OPCODE_PATCH = 1,
OPCODE_TEST = 2,
OPCODE_WAKEUP = 3,
OPCODE_HIF = 4,
OPCODE_STRAP_CONF = 5,
OPCODE_FUNC_CTRL = 6,
OPCODE_RESET = 7,
OPCODE_INT = 8,
OPCODE_MAX
} ENUM_OPCODE, *P_ENUM_OPCODE;
typedef enum {
WMT_STP_CONF_EN = 0,
WMT_STP_CONF_RDY = 1,
WMT_STP_CONF_MODE = 2,
WMT_STP_CONF_MAX
} WMT_STP_CONF_TYPE;
struct init_script {
UCHAR *cmd;
UINT32 cmdSz;
UCHAR *evt;
UINT32 evtSz;
UCHAR *str;
};
typedef struct _WMT_PATCH {
UINT8 ucDateTime[16];
UINT8 ucPLat[4];
UINT16 u2HwVer;
UINT16 u2SwVer;
UINT32 u4PatchVer;
} WMT_PATCH, *P_WMT_PATCH;
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
extern INT32 wmt_core_init(VOID);
extern INT32 wmt_core_deinit(VOID);
/*****************************************************************************
* FUNCTION
* mtk_wcn_wmtd
* DESCRIPTION
* deinit STP kernel
* PARAMETERS
* void
* RETURNS
* INT32 0 = success, others = failure
*****************************************************************************/
extern INT32
wmt_core_opid (
P_WMT_OP pWmtOp
);
extern INT32
wmt_core_ctrl (
ENUM_WMT_CTRL_T ctrId,
PUINT32 pPa1,
PUINT32 pPa2
);
extern INT32
wmt_core_func_ctrl_cmd (
ENUM_WMTDRV_TYPE_T type,
MTK_WCN_BOOL fgEn
);
extern INT32
wmt_core_reg_rw_raw (
UINT32 isWrite,
UINT32 offset,
PUINT32 pVal,
UINT32 mask
);
extern VOID
wmt_core_dump_data (
PUINT8 pData,
PUINT8 pTitle,
UINT32 len
);
extern MTK_WCN_BOOL
wmt_core_patch_check (
UINT32 u4PatchVer,
UINT32 u4HwVer
);
extern INT32
wmt_core_init_script (
struct init_script *script,
INT32 count
);
extern INT32
wmt_core_rx (
PUINT8 pBuf,
UINT32 bufLen,
UINT32 *readSize
);
extern INT32
wmt_core_tx (
const UINT8 *pData,
UINT32 size,
UINT32 *writtenSize,
MTK_WCN_BOOL bRawFlag
);
extern MTK_WCN_BOOL wmt_core_is_quick_ps_support (void);
extern MTK_WCN_BOOL wmt_core_get_aee_dump_flag(void);
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
static _osal_inline_ MTK_WCN_BOOL
wmt_core_ic_ops_check (
P_WMT_IC_OPS p_ops
)
{
if (!p_ops) {
return MTK_WCN_BOOL_FALSE;
}
if ( (NULL == p_ops->sw_init)
|| (NULL == p_ops->sw_deinit)
|| (NULL == p_ops->ic_ver_check)
|| (NULL == p_ops->ic_pin_ctrl) ) {
return MTK_WCN_BOOL_FALSE;
}
else {
return MTK_WCN_BOOL_TRUE;
}
}
#endif /* _WMT_CORE_H_ */

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@@ -1,135 +0,0 @@
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
#ifndef _WMT_CTRL_H_
#define _WMT_CTRL_H_
#include "osal.h"
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
#define DWCNT_CTRL_DATA (16)
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
typedef struct _WMT_CTRL_DATA_ {
UINT32 ctrlId;
UINT32 au4CtrlData[DWCNT_CTRL_DATA];
} WMT_CTRL_DATA, *P_WMT_CTRL_DATA;
typedef enum _ENUM_WMT_CTRL_T {
WMT_CTRL_HW_PWR_OFF = 0, /* whole chip power off */
WMT_CTRL_HW_PWR_ON = 1, /* whole chip power on */
WMT_CTRL_HW_RST = 2,/* whole chip power on */
WMT_CTRL_STP_CLOSE = 3,
WMT_CTRL_STP_OPEN = 4,
WMT_CTRL_STP_CONF = 5,
WMT_CTRL_FREE_PATCH = 6,
WMT_CTRL_GET_PATCH = 7,
WMT_CTRL_GET_PATCH_NAME = 8,
WMT_CTRL_HOST_BAUDRATE_SET = 9,
WMT_CTRL_SDIO_HW = 10, /* enable/disable SDIO1/2 of combo chip */
WMT_CTRL_SDIO_FUNC = 11, /* probe/remove STP/Wi-Fi driver in SDIO1/2 of combo chip*/
WMT_CTRL_HWIDVER_SET = 12, // TODO: rename this and add chip id information in addition to chip version
WMT_CTRL_HWVER_GET = 13, // TODO: [FixMe][GeorgeKuo] remove unused functions
WMT_CTRL_STP_RST = 14,
WMT_CTRL_GET_WMT_CONF = 15,
WMT_CTRL_TX = 16, /* [FixMe][GeorgeKuo]: to be removed by Sean's stp integration */
WMT_CTRL_RX = 17, /* [FixMe][GeorgeKuo]: to be removed by Sean's stp integration */
WMT_CTRL_RX_FLUSH = 18, /* [FixMe][SeanWang]: to be removed by Sean's stp integration */
WMT_CTRL_GPS_SYNC_SET = 19,
WMT_CTRL_GPS_LNA_SET = 20,
WMT_CTRL_PATCH_SEARCH = 21,
WMT_CTRL_CRYSTAL_TRIMING_GET = 22,
WMT_CTRL_CRYSTAL_TRIMING_PUT = 23,
WMT_CTRL_HW_STATE_DUMP = 24,
WMT_CTRL_GET_PATCH_NUM = 25,
WMT_CTRL_GET_PATCH_INFO = 26,
WMT_CTRL_MAX
} ENUM_WMT_CTRL_T, *P_ENUM_WMT_CTRL_T;
typedef INT32 (*WMT_CTRL_FUNC)(P_WMT_CTRL_DATA);
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
extern INT32
wmt_ctrl (
P_WMT_CTRL_DATA pWmtCtrlData
);
extern INT32
wmt_ctrl_tx_ex (
const UINT8 *pData,
const UINT32 size,
UINT32 *writtenSize,
const MTK_WCN_BOOL bRawFlag
);
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
#endif /* _WMT_CTRL_H_ */

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@@ -1,48 +0,0 @@
#ifndef _WMT_DBG_H_
#define _WMT_DBG_H_
#include "osal.h"
#define STP_SDIO 0x04
#define STP_UART_MAND 0x02
#define STP_UART_FULL 0x01
#define CFG_WMT_DBG_SUPPORT 1 // support wmt_dbg or not
#if CFG_WMT_DBG_SUPPORT
typedef struct _COEX_BUF{
UINT8 buffer[128];
INT32 availSize;
}COEX_BUF, *P_COEX_BUF;
typedef enum _ENUM_CMD_TYPE_T {
WMTDRV_CMD_ASSERT = 0,
WMTDRV_CMD_EXCEPTION = 1,
WMTDRV_CMD_COEXDBG_00 = 2,
WMTDRV_CMD_COEXDBG_01 = 3,
WMTDRV_CMD_COEXDBG_02 = 4,
WMTDRV_CMD_COEXDBG_03 = 5,
WMTDRV_CMD_COEXDBG_04 = 6,
WMTDRV_CMD_COEXDBG_05 = 7,
WMTDRV_CMD_COEXDBG_06 = 8,
WMTDRV_CMD_COEXDBG_07 = 9,
WMTDRV_CMD_COEXDBG_08 = 10,
WMTDRV_CMD_COEXDBG_09 = 11,
WMTDRV_CMD_COEXDBG_10 = 12,
WMTDRV_CMD_COEXDBG_11 = 13,
WMTDRV_CMD_COEXDBG_12 = 14,
WMTDRV_CMD_COEXDBG_13 = 15,
WMTDRV_CMD_COEXDBG_14 = 16,
WMTDRV_CMD_COEXDBG_15 = 17,
WMTDRV_CMD_MAX
} ENUM_WMTDRV_CMD_T, *P_ENUM_WMTDRV_CMD_T;
typedef INT32 (*WMT_DEV_DBG_FUNC)(INT32 par1, INT32 par2, INT32 par3);
INT32 wmt_dev_dbg_setup(VOID);
INT32 wmt_dev_dbg_remove(VOID);
#endif
#endif

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@@ -1,134 +0,0 @@
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
#ifndef _WMT_FUNC_H_
#define _WMT_FUNC_H_
#include "osal_typedef.h"
#include "osal.h"
#include "wmt_core.h"
#include "wmt_plat.h"
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
#if 1//defined(CONFIG_MTK_COMBO_HCI_DRIVER) || defined(CONFIG_MTK_COMBO_BT)
#define CFG_FUNC_BT_SUPPORT 1
#else
#define CFG_FUNC_BT_SUPPORT 0
#endif
#if 1//defined(CONFIG_MTK_COMBO_FM)
#define CFG_FUNC_FM_SUPPORT 1
#else
#define CFG_FUNC_FM_SUPPORT 0
#endif
#if 1//defined(CONFIG_MTK_COMBO_GPS)
#define CFG_FUNC_GPS_SUPPORT 1
#else
#define CFG_FUNC_GPS_SUPPORT 0
#endif
#if 1//defined(CONFIG_MTK_COMBO_WIFI)
#define CFG_FUNC_WIFI_SUPPORT 1
#else
#define CFG_FUNC_WIFI_SUPPORT 0
#endif
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
typedef INT32 (*SUBSYS_FUNC_ON)(P_WMT_IC_OPS pOps, P_WMT_GEN_CONF pConf);
typedef INT32 (*SUBSYS_FUNC_OFF)(P_WMT_IC_OPS pOps, P_WMT_GEN_CONF pConf);
typedef struct _WMT_FUNC_OPS_{
SUBSYS_FUNC_ON func_on;
SUBSYS_FUNC_OFF func_off;
}WMT_FUNC_OPS, *P_WMT_FUNC_OPS;
typedef struct _CMB_PIN_CTRL_REG_
{
UINT32 regAddr;
UINT32 regValue;
UINT32 regMask;
}CMB_PIN_CTRL_REG, *P_CMB_PIN_CTRL_REG;
typedef struct _CMB_PIN_CTRL_
{
UINT32 pinId;
UINT32 regNum;
P_CMB_PIN_CTRL_REG pFuncOnArray;
P_CMB_PIN_CTRL_REG pFuncOffArray;
}CMB_PIN_CTRL, *P_CMB_PIN_CTRL;
typedef enum _ENUM_CMP_PIN_ID_{
CMB_PIN_EEDI_ID = 0,
CMB_PIN_EEDO_ID = 1,
CMB_PIN_GSYNC_ID = 2,
}ENUM_CMP_PIN_ID, *P_ENUM_CMP_PIN_ID;
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
#endif /* _WMT_FUNC_H_ */

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@@ -1,113 +0,0 @@
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
#ifndef _WMT_IC_H_
#define _WMT_IC_H_
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
#include "wmt_core.h"
#include "wmt_exp.h"
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
#define WMT_IC_NAME_MT6620 "MT6620"
#define WMT_IC_NAME_MT6628 "MT6628"
#define WMT_IC_VER_E1 "E1"
#define WMT_IC_VER_E2 "E2"
#define WMT_IC_VER_E3 "E3"
#define WMT_IC_VER_E4 "E4"
#define WMT_IC_VER_E5 "E5"
#define WMT_IC_VER_E6 "E6"
#define WMT_IC_VER_E7 "E7"
#define WMT_IC_PATCH_DUMMY_EXT "_ex"
#define WMT_IC_PATCH_NO_EXT ""
#define WMT_IC_PATCH_E1_EXT "_e1"
#define WMT_IC_PATCH_E2_EXT "_e2"
#define WMT_IC_PATCH_E3_EXT "_e3"
#define WMT_IC_PATCH_E4_EXT "_e4"
#define WMT_IC_PATCH_E5_EXT "_e5"
#define WMT_IC_PATCH_E6_EXT "_e6"
#define WMT_IC_PATCH_TAIL "_hdr.bin"
#define WMT_IC_INVALID_CHIP_ID 0xFFFF
#define MAJORNUM(x) (x & 0x00F0)
#define MINORNUM(x) (x & 0x000F)
/*******************************************************************************
* R E G I S T E R M A P
********************************************************************************
*/
/* General definition used for ALL/UNKNOWN CHIPS */
/* Now MT6620 uses these definitions */
#define GEN_CONFG_BASE (0x80000000UL)
#define GEN_HVR (GEN_CONFG_BASE + 0x0UL) /* HW_VER */
#define GEN_FVR (GEN_CONFG_BASE + 0x4UL) /* FW_VER */
#define GEN_VER_MASK (0x0000FFFFUL) /* HW_VER and FW_VER valid bits mask */
#define GEN_HCR (GEN_CONFG_BASE + 0x8UL) /* HW_CODE, chip id */
#define GEN_HCR_MASK (0x0000FFFFUL) /* HW_CODE valid bits mask */
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
typedef struct _WMT_IC_INFO_S
{
UINT32 u4HwVer; /* u4HwId */
PUINT8 cChipName;
PUINT8 cChipVersion;
PUINT8 cPatchNameExt;
MTK_WCN_BOOL bPsmSupport;
MTK_WCN_BOOL bWorkWithoutPatch;
ENUM_WMTHWVER_TYPE_T eWmtHwVer;
} WMT_IC_INFO_S, *P_WMT_IC_INFO_S;
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
#endif /* _WMT_IC_H_ */

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@@ -1,327 +0,0 @@
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
#ifndef _WMT_LIB_H_
#define _WMT_LIB_H_
#include "osal.h"
#include "wmt_core.h"
#include "wmt_exp.h"
#include <mach/mtk_wcn_cmb_stub.h>
#include "stp_wmt.h"
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
#define WMT_OP_BUF_SIZE (16)
#if 0 /* moved to wmt_exp.h */
#define WMT_LOG_LOUD 4
#define WMT_LOG_DBG 3
#define WMT_LOG_INFO 2
#define WMT_LOG_WARN 1
#define WMT_LOG_ERR 0
#endif
typedef enum _ENUM_WMTRSTRET_TYPE_T{
WMTRSTRET_SUCCESS = 0x0,
WMTRSTRET_FAIL = 0x1,
WMTRSTRET_ONGOING = 0x2,
WMTRSTRET_MAX
} ENUM_WMTRSTRET_TYPE_T, *P_ENUM_WMTRSTRET_TYPE_T;
/*
3(retry times) * 180 (STP retry time out)
+ 10 (firmware process time) +
10 (transmit time) +
10 (uart process -> WMT response pool) +
230 (others)
*/
#define WMT_LIB_RX_TIMEOUT 2000/*800-->cover v1.2phone BT function on time (~830ms)*/
/*
open wifi during wifi power on procedure
(because wlan is insert to system after mtk_hif_sdio module,
so wifi card is not registered to hif module
when mtk_wcn_wmt_func_on is called by wifi through rfkill)
*/
#define MAX_WIFI_ON_TIME 5500
#define WMT_PWRON_RTY_DFT 2
#define MAX_RETRY_TIME_DUE_TO_RX_TIMEOUT WMT_PWRON_RTY_DFT * WMT_LIB_RX_TIMEOUT
#define MAX_EACH_FUNC_ON_WHEN_CHIP_POWER_ON_ALREADY WMT_LIB_RX_TIMEOUT /*each WMT command*/
#define MAX_FUNC_ON_TIME (MAX_WIFI_ON_TIME + MAX_RETRY_TIME_DUE_TO_RX_TIMEOUT + MAX_EACH_FUNC_ON_WHEN_CHIP_POWER_ON_ALREADY * 3)
#define MAX_EACH_FUNC_OFF WMT_LIB_RX_TIMEOUT + 1000 /*1000->WMT_LIB_RX_TIMEOUT + 1000, logical judgement*/
#define MAX_FUNC_OFF_TIME MAX_EACH_FUNC_OFF * 4
#define MAX_EACH_WMT_CMD WMT_LIB_RX_TIMEOUT + 1000 /*1000->WMT_LIB_RX_TIMEOUT + 1000, logical judgement*/
#define MAX_GPIO_CTRL_TIME (2000) /* [FixMe][GeorgeKuo] a temp value */
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
#if 0 /* moved to wmt_exp.h */
/* FIXME: apply KERN_* definition? */
extern UINT32 gWmtDbgLvl ;
#ifndef DFT_TAG
#define DFT_TAG "[WMT-DFT]"
#endif
#define WMT_LOUD_FUNC(fmt, arg...) if (gWmtDbgLvl >= WMT_LOG_LOUD) { osal_dbg_print(DFT_TAG "[L]%s:" fmt, __FUNCTION__ ,##arg);}
#define WMT_INFO_FUNC(fmt, arg...) if (gWmtDbgLvl >= WMT_LOG_INFO) { osal_info_print(DFT_TAG "[I]%s:" fmt, __FUNCTION__ ,##arg);}
#define WMT_WARN_FUNC(fmt, arg...) if (gWmtDbgLvl >= WMT_LOG_WARN) { osal_warn_print(DFT_TAG "[W]%s:" fmt, __FUNCTION__ ,##arg);}
#define WMT_ERR_FUNC(fmt, arg...) if (gWmtDbgLvl >= WMT_LOG_ERR) { osal_err_print(DFT_TAG "[E]%s(%d):" fmt, __FUNCTION__ , __LINE__, ##arg);}
#define WMT_DBG_FUNC(fmt, arg...) if (gWmtDbgLvl >= WMT_LOG_DBG) { osal_dbg_print(DFT_TAG "[D]%s:" fmt, __FUNCTION__ ,##arg);}
#define WMT_TRC_FUNC(f) if (gWmtDbgLvl >= WMT_LOG_DBG) { osal_dbg_print(DFT_TAG "<%s> <%d>\n", __FUNCTION__, __LINE__);}
#endif
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/* AIF FLAG definition */
/* bit(0): share pin or not */
#define WMT_LIB_AIF_FLAG_MASK (0x1UL)
#define WMT_LIB_AIF_FLAG_SHARE (0x1UL << 0)
#define WMT_LIB_AIF_FLAG_SEPARATE (0x0UL << 0)
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
/* bit field offset definition */
typedef enum {
WMT_STAT_PWR = 0, /* is powered on */
WMT_STAT_STP_REG = 1, /* is STP driver registered: */
WMT_STAT_STP_OPEN = 2, /* is STP opened: default FALSE*/
WMT_STAT_STP_EN = 3, /* is STP enabled: default FALSE*/
WMT_STAT_STP_RDY = 4, /* is STP ready for client: default FALSE*/
WMT_STAT_RX = 5, /* is rx data available */
WMT_STAT_CMD = 6, /* is cmd string to be read */
WMT_STAT_SDIO1_ON = 7, /* is SDIO1 on */
WMT_STAT_SDIO2_ON = 8, /* is SDIO2 on */
WMT_STAT_SDIO_WIFI_ON = 9, /* is Wi-Fi SDIO function on */
WMT_STAT_SDIO_STP_ON = 10, /* is STP SDIO function on */
WMT_STAT_RST_ON = 11,
WMT_STAT_MAX
} WMT_STAT;
typedef enum _ENUM_WMTRSTSRC_TYPE_T{
WMTRSTSRC_RESET_BT = 0x0,
WMTRSTSRC_RESET_FM = 0x1,
WMTRSTSRC_RESET_GPS = 0x2,
WMTRSTSRC_RESET_WIFI = 0x3,
WMTRSTSRC_RESET_STP = 0x4,
WMTRSTSRC_RESET_TEST = 0x5,
WMTRSTSRC_RESET_MAX
} ENUM_WMTRSTSRC_TYPE_T, *P_ENUM_WMTRSTSRC_TYPE_T;
typedef struct {
PF_WMT_CB fDrvRst[4];
} WMT_FDRV_CB, *P_WMT_FDRV_CB;
typedef struct {
UINT32 dowloadSeq;
UCHAR addRess[4];
UCHAR patchName[256];
}WMT_PATCH_INFO,*P_WMT_PATCH_INFO;
/* OS independent wrapper for WMT_OP */
typedef struct _DEV_WMT_ {
OSAL_SLEEPABLE_LOCK psm_lock;
/* WMTd thread information */
// struct task_struct *pWmtd; /* main thread (wmtd) handle */
OSAL_THREAD thread;
// wait_queue_head_t rWmtdWq; /*WMTd command wait queue */
OSAL_EVENT rWmtdWq; //rename
//ULONG state; /* bit field of WMT_STAT */
OSAL_BIT_OP_VAR state;
/* STP context information */
// wait_queue_head_t rWmtRxWq; /* STP Rx wait queue */
OSAL_EVENT rWmtRxWq; //rename
// WMT_STP_FUNC rStpFunc; /* STP functions */
WMT_FDRV_CB rFdrvCb;
/* WMT Configurations */
WMT_HIF_CONF rWmtHifConf;
WMT_GEN_CONF rWmtGenConf;
/* Patch information */
UCHAR cPatchName[NAME_MAX + 1];
UCHAR cFullPatchName[NAME_MAX + 1];
UINT32 patchNum;
const osal_firmware *pPatch;
UCHAR cWmtcfgName[NAME_MAX + 1];
const osal_firmware *pWmtCfg;
const osal_firmware *pNvram;
/* Current used UART port description*/
CHAR cUartName[NAME_MAX + 1];
OSAL_OP_Q rFreeOpQ; /* free op queue */
OSAL_OP_Q rActiveOpQ; /* active op queue */
OSAL_OP arQue[WMT_OP_BUF_SIZE]; /* real op instances */
P_OSAL_OP pCurOP; /* current op*/
/* cmd str buffer */
UCHAR cCmd[NAME_MAX + 1];
INT32 cmdResult;
// struct completion cmd_comp;
// wait_queue_head_t cmd_wq; /* read command queues */
OSAL_SIGNAL cmdResp;
OSAL_EVENT cmdReq;
/* WMT loopback Thread Information */
// WMT_CMB_VER combo_ver;
//P_WMT_CMB_CHIP_INFO_S pChipInfo;
UINT32 chip_id;
UINT32 hw_ver;
UINT32 fw_ver;
// TODO: [FixMe][GeorgeKuo] remove this translated version code in the
// future. Just return the above 3 info to querist
ENUM_WMTHWVER_TYPE_T eWmtHwVer;
P_WMT_PATCH_INFO pWmtPatchInfo;
}DEV_WMT, *P_DEV_WMT;
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
extern INT32 wmt_lib_init(VOID);
extern INT32 wmt_lib_deinit(VOID);
extern INT32 wmt_lib_tx (UINT8 *data, UINT32 size, UINT32 *writtenSize);
extern INT32 wmt_lib_tx_raw (UINT8 *data, UINT32 size, UINT32 *writtenSize);
extern INT32 wmt_lib_rx(UINT8 *buff, UINT32 buffLen, UINT32 *readSize);
extern VOID
wmt_lib_flush_rx(VOID);
#if CFG_WMT_PS_SUPPORT
extern INT32
wmt_lib_ps_set_idle_time(UINT32 psIdleTime);
extern INT32
wmt_lib_ps_init(VOID);
extern INT32
wmt_lib_ps_deinit(VOID);
extern INT32
wmt_lib_ps_enable(VOID);
extern INT32
wmt_lib_ps_ctrl(UINT32 state);
extern INT32
wmt_lib_ps_disable(VOID);
extern VOID
wmt_lib_ps_irq_cb(VOID);
#endif
extern VOID
wmt_lib_ps_set_sdio_psop (
PF_WMT_SDIO_PSOP own_cb
);
/* LXOP functions: */
extern P_OSAL_OP wmt_lib_get_free_op (VOID);
extern INT32 wmt_lib_put_op_to_free_queue(P_OSAL_OP pOp);
extern MTK_WCN_BOOL wmt_lib_put_act_op (P_OSAL_OP pOp);
//extern ENUM_WMTHWVER_TYPE_T wmt_lib_get_hwver (VOID);
extern UINT32 wmt_lib_get_icinfo (ENUM_WMT_CHIPINFO_TYPE_T type);
extern MTK_WCN_BOOL wmt_lib_is_therm_ctrl_support (VOID);
extern MTK_WCN_BOOL wmt_lib_is_dsns_ctrl_support (VOID);
extern INT32 wmt_lib_trigger_cmd_signal (INT32 result);
extern UCHAR *wmt_lib_get_cmd(VOID);
extern P_OSAL_EVENT wmt_lib_get_cmd_event(VOID);
extern INT32 wmt_lib_set_patch_name(UCHAR *cPatchName);
extern INT32 wmt_lib_set_uart_name(CHAR *cUartName);
extern INT32 wmt_lib_set_hif(ULONG hifconf);
extern P_WMT_HIF_CONF wmt_lib_get_hif(VOID);
extern MTK_WCN_BOOL wmt_lib_get_cmd_status(VOID);
/* GeorgeKuo: replace set_chip_gpio() with more specific ones */
#if 0/* moved to wmt_exp.h */
extern INT32 wmt_lib_set_aif (CMB_STUB_AIF_X aif, MTK_WCN_BOOL share); /* set AUDIO interface options */
#endif
extern INT32 wmt_lib_host_awake_get(VOID);
extern INT32 wmt_lib_host_awake_put(VOID);
extern UINT32 wmt_lib_dbg_level_set(UINT32 level);
extern INT32 wmt_lib_msgcb_reg (
ENUM_WMTDRV_TYPE_T eType,
PF_WMT_CB pCb
);
extern INT32 wmt_lib_msgcb_unreg (
ENUM_WMTDRV_TYPE_T eType
);
ENUM_WMTRSTRET_TYPE_T wmt_lib_cmb_rst( ENUM_WMTRSTSRC_TYPE_T src);
MTK_WCN_BOOL wmt_lib_sw_rst(INT32 baudRst);
MTK_WCN_BOOL wmt_lib_hw_rst(VOID);
INT32 wmt_lib_reg_rw (
UINT32 isWrite,
UINT32 offset,
PUINT32 pvalue,
UINT32 mask
);
INT32 wmt_lib_efuse_rw (
UINT32 isWrite,
UINT32 offset,
PUINT32 pvalue,
UINT32 mask
);
INT32 wmt_lib_sdio_ctrl(UINT32 on);
extern INT32 DISABLE_PSM_MONITOR(void);
extern VOID ENABLE_PSM_MONITOR(void);
extern INT32 wmt_lib_notify_stp_sleep(void);
extern void wmt_lib_psm_lock_release(void);
extern INT32 wmt_lib_psm_lock_aquire(void);
extern INT32 wmt_lib_set_stp_wmt_last_close(UINT32 value);
extern VOID wmt_lib_set_patch_num(ULONG num);
extern VOID wmt_lib_set_patch_info(P_WMT_PATCH_INFO pPatchinfo);
extern INT32 wmt_lib_set_current_op(P_DEV_WMT pWmtDev, P_OSAL_OP pOp);
extern P_OSAL_OP wmt_lib_get_current_op(P_DEV_WMT pWmtDev);
extern INT32 wmt_lib_merge_if_flag_ctrl(UINT32 enable);
extern INT32 wmt_lib_merge_if_flag_get(UINT32 enable);
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
#endif /* _WMT_LIB_H_ */

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@@ -1,259 +0,0 @@
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
#if 0 //to do---- need check why need this header file
#include <linux/types.h>
#include <linux/major.h>
#include <linux/errno.h>
#include <linux/signal.h>
#include <linux/fcntl.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/tty.h>
#include <linux/timer.h>
#include <linux/ctype.h>
#include <linux/mm.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/poll.h>
#include <linux/bitops.h>
#include <linux/audit.h>
#include <linux/file.h>
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/delay.h> /* udelay() */
#include <asm/uaccess.h>
#include <asm/system.h>
#endif
#include "stp_core.h"
#include "stp_exp.h"
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
static MTK_WCN_STP_IF_TX stp_uart_if_tx = NULL;
static MTK_WCN_STP_IF_TX stp_sdio_if_tx = NULL;
static ENUM_STP_TX_IF_TYPE g_stp_if_type = STP_MAX_IF_TX;
static MTK_WCN_STP_IF_RX stp_if_rx = NULL;
static MTK_WCN_STP_EVENT_CB event_callback_tbl[MTKSTP_MAX_TASK_NUM] = {0x0};
static MTK_WCN_STP_EVENT_CB tx_event_callback_tbl[MTKSTP_MAX_TASK_NUM] = {0x0};
/******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
*******************************************************************************
*/
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
INT32 mtk_wcn_sys_if_rx(UINT8 *data, INT32 size)
{
if(stp_if_rx == 0x0)
{
return (-1);
}
else
{
(*stp_if_rx)(data, size);
return 0;
}
}
static INT32 mtk_wcn_sys_if_tx (
const UINT8 *data,
const UINT32 size,
UINT32 *written_size
)
{
if (STP_UART_IF_TX == g_stp_if_type) {
return stp_uart_if_tx != NULL ? (*stp_uart_if_tx)(data, size, written_size) : -1;
}
else if (STP_SDIO_IF_TX == g_stp_if_type) {
return stp_sdio_if_tx != NULL ? (*stp_sdio_if_tx)(data, size, written_size) : -1;
}
else {
/*if (g_stp_if_type >= STP_MAX_IF_TX) */ /* George: remove ALWAYS TRUE condition */
return (-1);
}
}
static INT32 mtk_wcn_sys_event_set(UINT8 function_type)
{
if((function_type < MTKSTP_MAX_TASK_NUM) && (event_callback_tbl[function_type] != 0x0))
{
(*event_callback_tbl[function_type])();
}
else {
/* FIXME: error handling */
osal_dbg_print("[%s] STP set event fail. It seems the function is not active.\n", __func__);
}
return 0;
}
static INT32 mtk_wcn_sys_event_tx_resume(UINT8 winspace)
{
int type = 0;
for(type = 0 ; type < MTKSTP_MAX_TASK_NUM ; type ++ )
{
if(tx_event_callback_tbl[type])
{
tx_event_callback_tbl[type]();
}
}
return 0;
}
static INT32 mtk_wcn_sys_check_function_status(UINT8 type, UINT8 op){
/*op == FUNCTION_ACTIVE, to check if funciton[type] is active ?*/
if(!(type >= 0 && type < MTKSTP_MAX_TASK_NUM))
{
return STATUS_FUNCTION_INVALID;
}
if(op == OP_FUNCTION_ACTIVE)
{
if(event_callback_tbl[type] != 0x0)
{
return STATUS_FUNCTION_ACTIVE;
}
else
{
return STATUS_FUNCTION_INACTIVE;
}
}
/*you can define more operation here ..., to queury function's status/information*/
return STATUS_OP_INVALID;
}
INT32 mtk_wcn_stp_register_if_rx(MTK_WCN_STP_IF_RX func)
{
stp_if_rx = func;
return 0;
}
VOID mtk_wcn_stp_set_if_tx_type (
ENUM_STP_TX_IF_TYPE stp_if_type
)
{
g_stp_if_type = stp_if_type;
osal_dbg_print("[%s] set STP_IF_TX to %s.\n",
__FUNCTION__,
(STP_UART_IF_TX == stp_if_type)? "UART" : ((STP_SDIO_IF_TX == stp_if_type) ? "SDIO" : "NULL"));
}
INT32 mtk_wcn_stp_register_if_tx (
ENUM_STP_TX_IF_TYPE stp_if,
MTK_WCN_STP_IF_TX func
)
{
if (STP_UART_IF_TX == stp_if)
{
stp_uart_if_tx = func;
}
else if (STP_SDIO_IF_TX == stp_if)
{
stp_sdio_if_tx = func;
}
else
{
osal_dbg_print("[%s] STP_IF_TX(%d) out of boundary.\n", __FUNCTION__, stp_if);
return -1;
}
return 0;
}
INT32 mtk_wcn_stp_register_event_cb(INT32 type, MTK_WCN_STP_EVENT_CB func)
{
if (type < MTKSTP_MAX_TASK_NUM)
{
event_callback_tbl[type] = func;
/*clear rx queue*/
osal_dbg_print("Flush type = %d Rx Queue\n", type);
mtk_wcn_stp_flush_rx_queue(type);
}
return 0;
}
INT32 mtk_wcn_stp_register_tx_event_cb(INT32 type, MTK_WCN_STP_EVENT_CB func)
{
if(type < MTKSTP_MAX_TASK_NUM)
{
tx_event_callback_tbl[type] = func;
}
else
{
osal_bug_on(0);
}
return 0;
}
INT32 stp_drv_init(VOID)
{
mtkstp_callback cb =
{
.cb_if_tx = mtk_wcn_sys_if_tx,
.cb_event_set = mtk_wcn_sys_event_set,
.cb_event_tx_resume = mtk_wcn_sys_event_tx_resume,
.cb_check_funciton_status = mtk_wcn_sys_check_function_status
};
return mtk_wcn_stp_init(&cb);
}
VOID stp_drv_exit(VOID)
{
mtk_wcn_stp_deinit();
return;
}
EXPORT_SYMBOL(mtk_wcn_stp_register_if_tx);
EXPORT_SYMBOL(mtk_wcn_stp_register_if_rx);
EXPORT_SYMBOL(mtk_wcn_stp_register_event_cb);
EXPORT_SYMBOL(mtk_wcn_stp_register_tx_event_cb);
EXPORT_SYMBOL(mtk_wcn_stp_parser_data);
EXPORT_SYMBOL(mtk_wcn_stp_send_data);
EXPORT_SYMBOL(mtk_wcn_stp_send_data_raw);
EXPORT_SYMBOL(mtk_wcn_stp_receive_data);
EXPORT_SYMBOL(mtk_wcn_stp_is_rxqueue_empty);
EXPORT_SYMBOL(mtk_wcn_stp_set_bluez);
EXPORT_SYMBOL(mtk_wcn_stp_is_ready);
EXPORT_SYMBOL(mtk_wcn_stp_dbg_log_ctrl);

View File

@@ -1,525 +0,0 @@
#ifdef DFT_TAG
#undef DFT_TAG
#endif
#define DFT_TAG "[WMT-CONF]"
#include "osal_typedef.h"
//#include "osal.h"
#include "wmt_lib.h"
#include "wmt_dev.h"
#include "wmt_conf.h"
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
struct parse_data {
PCHAR name;
INT32 (*parser)(P_DEV_WMT pWmtDev, const struct parse_data *data,const PCHAR value);
PCHAR (*writer)(P_DEV_WMT pWmtDev, const struct parse_data *data);
/*PCHAR param1, *param2, *param3;*/
// TODO:[FixMe][George] CLARIFY WHAT SHOULD BE USED HERE!!!
PCHAR param1;
PCHAR param2;
PCHAR param3;
};
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
extern DEV_WMT gDevWmt;
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
/******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
*******************************************************************************
*/
static INT32 wmt_conf_parse_char(
P_DEV_WMT pWmtDev,
const struct parse_data *data,
const PCHAR pos
);
static PCHAR wmt_conf_write_char(
P_DEV_WMT pWmtDev,
const struct parse_data *data
);
static INT32 wmt_conf_parse_short(
P_DEV_WMT pWmtDev,
const struct parse_data *data,
const PCHAR pos
);
static PCHAR wmt_conf_write_short(
P_DEV_WMT pWmtDev,
const struct parse_data *data
);
static INT32 wmt_conf_parse_int(
P_DEV_WMT pWmtDev,
const struct parse_data *data,
const PCHAR pos
);
static PCHAR wmt_conf_write_int(
P_DEV_WMT pWmtDev,
const struct parse_data *data
);
static INT32 wmt_conf_parse_pair (
P_DEV_WMT pWmtDev,
const PCHAR pKey,
const PCHAR pVal
);
static INT32 wmt_conf_parse (
P_DEV_WMT pWmtDev,
const PCHAR pInBuf,
UINT32 size
);
#define OFFSET(v) ((void *) &((P_DEV_WMT) 0)->v)
#define _CHAR(f) #f, wmt_conf_parse_char, wmt_conf_write_char, OFFSET(rWmtGenConf.f)
#define CHAR(f) _CHAR(f), NULL, NULL
#define _SHORT(f) #f, wmt_conf_parse_short, wmt_conf_write_short, OFFSET(rWmtGenConf.f)
#define SHORT(f) _SHORT(f), NULL, NULL
#define _INT(f) #f, wmt_conf_parse_int, wmt_conf_write_int, OFFSET(rWmtGenConf.f)
#define INT(f) _INT(f), NULL, NULL
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
static const struct parse_data wmtcfg_fields[] = {
{ CHAR(coex_wmt_ant_mode) },
{ CHAR(coex_wmt_wifi_time_ctl) },
{ CHAR(coex_wmt_ext_pta_dev_on) },
{ CHAR(coex_bt_rssi_upper_limit) },
{ CHAR(coex_bt_rssi_mid_limit) },
{ CHAR(coex_bt_rssi_lower_limit) },
{ CHAR(coex_bt_pwr_high) },
{ CHAR(coex_bt_pwr_mid) },
{ CHAR(coex_bt_pwr_low) },
{ CHAR(coex_wifi_rssi_upper_limit) },
{ CHAR(coex_wifi_rssi_mid_limit) },
{ CHAR(coex_wifi_rssi_lower_limit) },
{ CHAR(coex_wifi_pwr_high) },
{ CHAR(coex_wifi_pwr_mid) },
{ CHAR(coex_wifi_pwr_low) },
{ CHAR(coex_ext_pta_hi_tx_tag) },
{ CHAR(coex_ext_pta_hi_rx_tag) },
{ CHAR(coex_ext_pta_lo_tx_tag) },
{ CHAR(coex_ext_pta_lo_rx_tag) },
{ SHORT(coex_ext_pta_sample_t1) },
{ SHORT(coex_ext_pta_sample_t2) },
{ CHAR(coex_ext_pta_wifi_bt_con_trx) },
{ INT(coex_misc_ext_pta_on) },
{ INT(coex_misc_ext_feature_set) },
{ CHAR(wmt_gps_lna_pin) },
{ CHAR(wmt_gps_lna_enable) },
{ CHAR(pwr_on_rtc_slot) },
{ CHAR(pwr_on_ldo_slot) },
{ CHAR(pwr_on_rst_slot) },
{ CHAR(pwr_on_off_slot) },
{ CHAR(pwr_on_on_slot) },
{ CHAR(co_clock_flag) },
{ INT(sdio_driving_cfg) },
};
#define NUM_WMTCFG_FIELDS (osal_sizeof(wmtcfg_fields) / osal_sizeof(wmtcfg_fields[0]))
static INT32 wmt_conf_parse_char(P_DEV_WMT pWmtDev, const struct parse_data *data,
const PCHAR pos)
{
PUCHAR dst;
dst = (PCHAR ) (((PUINT8) pWmtDev) + (LONG) data->param1);
if((osal_strlen(pos) > 2) &&
((*pos)=='0') && (*(pos+1)=='x') ){
*dst = osal_strtol(pos+2, NULL, 16);
WMT_DBG_FUNC("wmtcfg==> %s=0x%x\n", data->name, *dst);
} else {
*dst = osal_strtol(pos, NULL, 10);
WMT_DBG_FUNC("wmtcfg==> %s=%d\n", data->name, *dst);
}
return 0;
}
static PCHAR wmt_conf_write_char(P_DEV_WMT pWmtDev, const struct parse_data *data)
{
PCHAR src;
INT32 res;
PCHAR value;
src = (PCHAR ) (((PUINT8) pWmtDev) + (LONG) data->param1);
value = osal_malloc(20);
if (value == NULL)
return NULL;
res = osal_snprintf(value, 20, "0x%x", *src);
if (res < 0 || res >= 20) {
osal_free(value);
return NULL;
}
value[20 - 1] = '\0';
return value;
}
static INT32 wmt_conf_parse_short(P_DEV_WMT pWmtDev, const struct parse_data *data,
const PCHAR pos)
{
PUINT16 dst;
dst = (PINT16 ) (((PUINT8) pWmtDev) + (LONG) data->param1);
//WMT_INFO_FUNC(">strlen(pos)=%d\n", strlen(pos));
if((osal_strlen(pos) > 2) &&
((*pos)=='0') && (*(pos+1)=='x') ){
*dst = osal_strtol(pos+2, NULL, 16);
WMT_DBG_FUNC("wmtcfg==> %s=0x%x\n", data->name, *dst);
} else {
*dst = osal_strtol(pos, NULL, 10);
WMT_DBG_FUNC("wmtcfg==> %s=%d\n", data->name, *dst);
}
return 0;
}
static PCHAR wmt_conf_write_short(P_DEV_WMT pWmtDev, const struct parse_data *data)
{
PINT16 src;
INT32 res;
PCHAR value;
// TODO: [FixMe][George] FIX COMPILE WARNING HERE!
src = (PINT16 ) (((PUINT8) pWmtDev) + (LONG) data->param1);
value = osal_malloc(20);
if (value == NULL)
return NULL;
res = osal_snprintf(value, 20, "0x%x", *src);
if (res < 0 || res >= 20) {
osal_free(value);
return NULL;
}
value[20 - 1] = '\0';
return value;
}
static INT32 wmt_conf_parse_int(P_DEV_WMT pWmtDev, const struct parse_data *data,
const PCHAR pos)
{
PUINT32 dst;
dst = (PINT32 ) (((PUINT8) pWmtDev) + (LONG) data->param1);
//WMT_INFO_FUNC(">strlen(pos)=%d\n", strlen(pos));
if((osal_strlen(pos) > 2) &&
((*pos)=='0') && (*(pos+1)=='x') ){
*dst = osal_strtol(pos+2, NULL, 16);
WMT_DBG_FUNC("wmtcfg==> %s=0x%x\n", data->name, *dst);
} else {
*dst = osal_strtol(pos, NULL, 10);
WMT_DBG_FUNC("wmtcfg==> %s=%d\n", data->name, *dst);
}
return 0;
}
static PCHAR wmt_conf_write_int(P_DEV_WMT pWmtDev, const struct parse_data *data)
{
PINT32 src;
INT32 res;
PCHAR value;
src = (PUINT32 ) (((PUINT8) pWmtDev) + (LONG) data->param1);
value = osal_malloc(20);
if (value == NULL)
return NULL;
res = osal_snprintf(value, 20, "0x%x", *src);
if (res < 0 || res >= 20) {
osal_free(value);
return NULL;
}
value[20 - 1] = '\0';
return value;
}
static INT32 wmt_conf_parse_pair (
P_DEV_WMT pWmtDev,
const PCHAR pKey,
const PCHAR pVal
)
{
INT32 i = 0;
INT32 ret = 0;
//WMT_INFO_FUNC( DBG_NAME "cfg(%s) val(%s) \n", pKey, pVal);
for (i = 0; i < NUM_WMTCFG_FIELDS; i++) {
const struct parse_data *field = &wmtcfg_fields[i];
if (osal_strcmp(pKey, field->name) != 0)
continue;
if (field->parser(pWmtDev, field, pVal)) {
WMT_ERR_FUNC("failed to parse %s '%s'.\n", pKey, pVal);
ret = -1;
}
break;
}
if (i == NUM_WMTCFG_FIELDS) {
WMT_ERR_FUNC("unknown field '%s'.\n", pKey);
ret = -1;
}
return ret;
}
static INT32 wmt_conf_parse (
P_DEV_WMT pWmtDev,
const PCHAR pInBuf,
UINT32 size
)
{
CHAR *pch;
CHAR * pBuf;
CHAR * pLine;
CHAR * pKey;
CHAR * pVal;
CHAR * pPos;
INT32 ret = 0;
INT32 i = 0;
PCHAR pa = NULL;
pBuf = osal_malloc(size);
if (!pBuf) {
return -1;
}
osal_memcpy(pBuf, pInBuf, size);
pBuf[size] = '\0';
pch = pBuf;
/* pch is to be updated by strsep(). Keep pBuf unchanged!! */
#if 0
{
PCHAR buf_ptr = pBuf;
INT32 k=0;
WMT_INFO_FUNC("%s len=%d", "wmcfg.content:", size);
for(k=0; k < size ; k++){
//if(k%16 == 0) WMT_INFO_FUNC("\n");
WMT_INFO_FUNC("%c", buf_ptr[k]);
}
WMT_INFO_FUNC("--end\n");
}
#endif
while ((pLine = osal_strsep(&pch, "\r\n")) != NULL) {
/* pch is updated to the end of pLine by strsep() and updated to '\0' */
/*WMT_INFO_FUNC("strsep offset(%d), char(%d, '%c' ) \n", pLine-pBuf, *pLine, *pLine);*/
/* parse each line */
// WMT_INFO_FUNC("==> Line = (%s)\n", pLine);
if (!*pLine) {
continue;
}
pVal = osal_strchr(pLine, '=');
if (!pVal) {
WMT_WARN_FUNC("mal-format cfg string(%s)\n", pLine);
continue;
}
/* |<-pLine->|'='<-pVal->|'\n' ('\0')| */
*pVal = '\0'; /* replace '=' with '\0' to get key */
/* |<-pKey->|'\0'|<-pVal->|'\n' ('\0')| */
pKey = pLine;
if((pVal - pBuf) < size){
pVal++;
}
/*key handling*/
pPos = pKey;
/*skip space characeter*/
while(((*pPos)==' ') || ((*pPos)=='\t') || ((*pPos)=='\n')){
if((pPos - pBuf) >= size)
break;
pPos++;
}
/*key head*/
pKey=pPos;
while(((*pPos)!=' ') && ((*pPos)!='\t') && ((*pPos)!='\0') && ((*pPos)!='\n')){
if((pPos - pBuf) >= size)
break;
pPos++;
}
/*key tail*/
(*pPos)='\0';
/*value handling*/
pPos = pVal;
/*skip space characeter*/
while(((*pPos)==' ') || ((*pPos)=='\t') || ((*pPos)=='\n')){
if((pPos - pBuf) >= size)
break;
pPos++;
}
/*value head*/
pVal=pPos;
while(((*pPos)!=' ') && ((*pPos)!='\t') && ((*pPos)!='\0') && ((*pPos)!='\n')){
if((pPos - pBuf) >= size)
break;
pPos++;
}
/*value tail*/
(*pPos)='\0';
//WMT_DBG_FUNC("parse (key: #%s#, value: #%s#)\n", pKey, pVal);
ret = wmt_conf_parse_pair(pWmtDev, pKey, pVal);
WMT_WARN_FUNC("parse (%s, %s, %d)\n", pKey, pVal, ret);
if (ret) {
WMT_WARN_FUNC("parse fail (%s, %s, %d)\n", pKey, pVal, ret);
}
}
for (i = 0; i < NUM_WMTCFG_FIELDS; i++) {
const struct parse_data *field = &wmtcfg_fields[i];
pa = field->writer(pWmtDev, field);
if(pa)
{
WMT_INFO_FUNC("#%d(%s)=>%s\n", i, field->name, pa);
osal_free(pa);
} else {
WMT_ERR_FUNC("failed to parse '%s'.\n", field->name);
}
}
osal_free(pBuf);
return 0;
}
INT32 wmt_conf_set_cfg_file(const CHAR *name)
{
if (NULL == name)
{
WMT_ERR_FUNC("name is NULL\n");
return -1;
}
if (osal_strlen(name) >= osal_sizeof(gDevWmt.cWmtcfgName))
{
WMT_ERR_FUNC("name is too long, length=%d, expect to < %d \n", osal_strlen(name), osal_sizeof(gDevWmt.cWmtcfgName));
return -2;
}
osal_memset(&gDevWmt.cWmtcfgName[0], 0, osal_sizeof(gDevWmt.cWmtcfgName));
osal_strcpy(&(gDevWmt.cWmtcfgName[0]), name);
WMT_ERR_FUNC("WMT config file is set to (%s)\n", &(gDevWmt.cWmtcfgName[0]));
return 0;
}
INT32 wmt_conf_read_file(VOID)
{
INT32 ret = -1;
osal_memset(&gDevWmt.rWmtGenConf, 0, osal_sizeof(gDevWmt.rWmtGenConf));
osal_memset(&gDevWmt.pWmtCfg, 0, osal_sizeof(gDevWmt.pWmtCfg));
#if 0
osal_memset(&gDevWmt.cWmtcfgName[0], 0, osal_sizeof(gDevWmt.cWmtcfgName));
osal_strncat(&(gDevWmt.cWmtcfgName[0]), CUST_CFG_WMT_PREFIX, osal_sizeof(CUST_CFG_WMT_PREFIX));
osal_strncat(&(gDevWmt.cWmtcfgName[0]), CUST_CFG_WMT, osal_sizeof(CUST_CFG_WMT));
#endif
if (!osal_strlen(&(gDevWmt.cWmtcfgName[0])))
{
WMT_ERR_FUNC("empty Wmtcfg name\n");
osal_assert(0);
return ret;
}
WMT_INFO_FUNC("WMT config file:%s\n", &(gDevWmt.cWmtcfgName[0]));
if ( 0 == wmt_dev_patch_get(&gDevWmt.cWmtcfgName[0], (osal_firmware **)&gDevWmt.pWmtCfg, 0) )
{
/*get full name patch success*/
WMT_INFO_FUNC("get full file name(%s) buf(0x%p) size(%d)\n",
&gDevWmt.cWmtcfgName[0], gDevWmt.pWmtCfg->data, gDevWmt.pWmtCfg->size);
if( 0 == wmt_conf_parse(&gDevWmt, (const PCHAR)gDevWmt.pWmtCfg->data, gDevWmt.pWmtCfg->size))
{
/*config file exists*/
gDevWmt.rWmtGenConf.cfgExist = 1;
WMT_INFO_FUNC("&gDevWmt.rWmtGenConf=%p\n", &gDevWmt.rWmtGenConf);
ret = 0;
}
else
{
WMT_ERR_FUNC("wmt conf parsing fail\n");
osal_assert(0);
ret = -1;
}
wmt_dev_patch_put((osal_firmware **)&gDevWmt.pWmtCfg);
/*
if (gDevWmt.pWmtCfg)
{
if (gDevWmt.pWmtCfg->data)
{
osal_free(gDevWmt.pWmtCfg->data);
}
osal_free(gDevWmt.pWmtCfg);
gDevWmt.pWmtCfg = 0;
}
*/
return ret;
}
else
{
WMT_ERR_FUNC("read %s file fails\n", &(gDevWmt.cWmtcfgName[0]));
osal_assert(0);
gDevWmt.rWmtGenConf.cfgExist = 0;
return ret;
}
}
P_WMT_GEN_CONF wmt_conf_get_cfg(VOID)
{
if (0 == gDevWmt.rWmtGenConf.cfgExist)
{
return NULL;
}
return &gDevWmt.rWmtGenConf;
}

File diff suppressed because it is too large Load Diff

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@@ -1,946 +0,0 @@
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
#ifdef DFT_TAG
#undef DFT_TAG
#endif
#define DFT_TAG "[WMT-CTRL]"
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
#include "osal_typedef.h"
#include "osal.h"
#include "wmt_ctrl.h"
#include "wmt_core.h"
#include "wmt_lib.h"
#include "wmt_dev.h"
#include "wmt_plat.h"
#include "hif_sdio.h"
#include "stp_core.h"
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
// moved to wmt_ctrl.h
/*static INT32 wmt_ctrl_tx_ex (UINT8 *pData, UINT32 size, UINT32 *writtenSize, MTK_WCN_BOOL bRawFlag);*/
static INT32 wmt_ctrl_stp_conf_ex (WMT_STP_CONF_TYPE type, UINT32 value);
static INT32 wmt_ctrl_hw_pwr_off(P_WMT_CTRL_DATA);
static INT32 wmt_ctrl_hw_pwr_on(P_WMT_CTRL_DATA);
static INT32 wmt_ctrl_hw_rst(P_WMT_CTRL_DATA);
static INT32 wmt_ctrl_stp_close(P_WMT_CTRL_DATA);
static INT32 wmt_ctrl_stp_open(P_WMT_CTRL_DATA);
static INT32 wmt_ctrl_stp_conf(P_WMT_CTRL_DATA);
static INT32 wmt_ctrl_free_patch(P_WMT_CTRL_DATA);
static INT32 wmt_ctrl_get_patch(P_WMT_CTRL_DATA);
static INT32 wmt_ctrl_host_baudrate_set(P_WMT_CTRL_DATA);
static INT32 wmt_ctrl_sdio_hw(P_WMT_CTRL_DATA);
static INT32 wmt_ctrl_sdio_func(P_WMT_CTRL_DATA);
static INT32 wmt_ctrl_hwidver_set (P_WMT_CTRL_DATA);
static INT32 wmt_ctrl_stp_rst(P_WMT_CTRL_DATA);
static INT32 wmt_ctrl_get_wmt_conf(P_WMT_CTRL_DATA);
static INT32 wmt_ctrl_others(P_WMT_CTRL_DATA);
static INT32 wmt_ctrl_tx(P_WMT_CTRL_DATA);
static INT32 wmt_ctrl_rx(P_WMT_CTRL_DATA);
static INT32 wmt_ctrl_patch_search(P_WMT_CTRL_DATA);
static INT32 wmt_ctrl_crystal_triming_put(P_WMT_CTRL_DATA pWmtCtrlData);
static INT32 wmt_ctrl_crystal_triming_get(P_WMT_CTRL_DATA pWmtCtrlData);
INT32 wmt_ctrl_hw_state_show(P_WMT_CTRL_DATA pWmtCtrlData);
static INT32 wmt_ctrl_get_patch_num(P_WMT_CTRL_DATA);
static INT32 wmt_ctrl_get_patch_info(P_WMT_CTRL_DATA);
static INT32
wmt_ctrl_rx_flush (
P_WMT_CTRL_DATA
);
static INT32
wmt_ctrl_gps_sync_set (
P_WMT_CTRL_DATA pData
);
static INT32
wmt_ctrl_gps_lna_set (
P_WMT_CTRL_DATA pData
);
static INT32 wmt_ctrl_get_patch_name(P_WMT_CTRL_DATA pWmtCtrlData);
// TODO: [FixMe][GeorgeKuo]: remove unused function
/*static INT32 wmt_ctrl_hwver_get(P_WMT_CTRL_DATA);*/
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
// TODO:[FixMe][GeorgeKuo]: use module APIs instead of direct access to internal data
extern DEV_WMT gDevWmt;
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/* GeorgeKuo: Use designated initializers described in
* http://gcc.gnu.org/onlinedocs/gcc-4.0.4/gcc/Designated-Inits.html
*/
const static WMT_CTRL_FUNC wmt_ctrl_func[] =
{
[WMT_CTRL_HW_PWR_OFF] = wmt_ctrl_hw_pwr_off,
[WMT_CTRL_HW_PWR_ON] = wmt_ctrl_hw_pwr_on,
[WMT_CTRL_HW_RST] = wmt_ctrl_hw_rst,
[WMT_CTRL_STP_CLOSE] = wmt_ctrl_stp_close,
[WMT_CTRL_STP_OPEN] = wmt_ctrl_stp_open,
[WMT_CTRL_STP_CONF] = wmt_ctrl_stp_conf,
[WMT_CTRL_FREE_PATCH] = wmt_ctrl_free_patch,
[WMT_CTRL_GET_PATCH] = wmt_ctrl_get_patch,
[WMT_CTRL_GET_PATCH_NAME] = wmt_ctrl_get_patch_name,
[WMT_CTRL_HOST_BAUDRATE_SET] = wmt_ctrl_host_baudrate_set,
[WMT_CTRL_SDIO_HW] = wmt_ctrl_sdio_hw,
[WMT_CTRL_SDIO_FUNC] = wmt_ctrl_sdio_func,
[WMT_CTRL_HWIDVER_SET] = wmt_ctrl_hwidver_set,
[WMT_CTRL_HWVER_GET] = NULL, // TODO: [FixMe][GeorgeKuo]: remove unused function.
[WMT_CTRL_STP_RST] = wmt_ctrl_stp_rst,
[WMT_CTRL_GET_WMT_CONF] = wmt_ctrl_get_wmt_conf,
[WMT_CTRL_TX] = wmt_ctrl_tx,
[WMT_CTRL_RX] = wmt_ctrl_rx,
[WMT_CTRL_RX_FLUSH] = wmt_ctrl_rx_flush,
[WMT_CTRL_GPS_SYNC_SET] = wmt_ctrl_gps_sync_set,
[WMT_CTRL_GPS_LNA_SET] = wmt_ctrl_gps_lna_set,
[WMT_CTRL_PATCH_SEARCH] = wmt_ctrl_patch_search,
[WMT_CTRL_CRYSTAL_TRIMING_GET] = wmt_ctrl_crystal_triming_get,
[WMT_CTRL_CRYSTAL_TRIMING_PUT] = wmt_ctrl_crystal_triming_put,
[WMT_CTRL_HW_STATE_DUMP] = wmt_ctrl_hw_state_show,
[WMT_CTRL_GET_PATCH_NUM] = wmt_ctrl_get_patch_num,
[WMT_CTRL_GET_PATCH_INFO] = wmt_ctrl_get_patch_info,
[WMT_CTRL_MAX] = wmt_ctrl_others,
};
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
INT32 wmt_ctrl (P_WMT_CTRL_DATA pWmtCtrlData)
{
UINT32 ctrlId = pWmtCtrlData->ctrlId;
if (NULL == pWmtCtrlData) {
osal_assert(0);
return -1;
}
/*1sanity check, including wmtCtrlId*/
if ( (NULL == pWmtCtrlData)
|| (WMT_CTRL_MAX <= ctrlId) )
/* || (ctrlId < WMT_CTRL_HW_PWR_OFF) ) [FixMe][GeorgeKuo]: useless comparison */
{
osal_assert(NULL != pWmtCtrlData);
osal_assert(WMT_CTRL_MAX > ctrlId);
/* osal_assert(ctrlId >= WMT_CTRL_HW_PWR_OFF); [FixMe][GeorgeKuo]: useless comparison */
return -2;
}
// TODO: [FixMe][GeorgeKuo] do sanity check to const function table when init and skip checking here
if (wmt_ctrl_func[ctrlId]) {
/*call servicd handling API*/
return (*(wmt_ctrl_func[ctrlId]))(pWmtCtrlData); /* serviceHandlerPack[ctrlId].serviceHandler */
}
else {
osal_assert(NULL != wmt_ctrl_func[ctrlId]);
return -3;
}
}
INT32 wmt_ctrl_tx (P_WMT_CTRL_DATA pWmtCtrlData/*UINT8 *pData, UINT32 size, UINT32 *writtenSize*/)
{
UINT8 *pData = (UINT8 *)pWmtCtrlData->au4CtrlData[0];
UINT32 size = pWmtCtrlData->au4CtrlData[1];
UINT32 *writtenSize = (UINT32 *)pWmtCtrlData->au4CtrlData[2];
MTK_WCN_BOOL bRawFlag = pWmtCtrlData->au4CtrlData[3];
return wmt_ctrl_tx_ex(pData, size, writtenSize, bRawFlag);
}
INT32 wmt_ctrl_rx(P_WMT_CTRL_DATA pWmtCtrlData/*UINT8 *pBuff, UINT32 buffLen, UINT32 *readSize*/)
{
P_DEV_WMT pDev = &gDevWmt; /* single instance */
INT32 readLen;
LONG waitRet = -1;
UINT8 *pBuff = (UINT8 *)pWmtCtrlData->au4CtrlData[0];
UINT32 buffLen = pWmtCtrlData->au4CtrlData[1];
UINT32 *readSize = (UINT32 *)pWmtCtrlData->au4CtrlData[2];
if (readSize) {
*readSize = 0;
}
/* sanity check */
if (!buffLen ) {
WMT_WARN_FUNC("buffLen = 0\n");
osal_assert(buffLen);
return 0;
}
#if 0
if (!pDev) {
WMT_WARN_FUNC("gpDevWmt = NULL\n");
osal_assert(pDev);
return -1;
}
#endif
if (!osal_test_bit(WMT_STAT_STP_OPEN, &pDev->state)) {
WMT_WARN_FUNC("state(0x%lx) \n", pDev->state);
osal_assert(osal_test_bit(WMT_STAT_STP_OPEN, &pDev->state));
return -2;
}
/* sanity ok, proceeding rx operation */
/* read_len = mtk_wcn_stp_receive_data(data, size, WMT_TASK_INDX); */
readLen = mtk_wcn_stp_receive_data(pBuff, buffLen, WMT_TASK_INDX);
while (readLen == 0) { // got nothing, wait for STP's signal
WMT_LOUD_FUNC("before wmt_dev_rx_timeout\n");
//iRet = wait_event_interruptible(pdev->rWmtRxWq, osal_test_bit(WMT_STAT_RX, &pdev->state));
//waitRet = wait_event_interruptible_timeout(pDev->rWmtRxWq, osal_test_bit(WMT_STAT_RX, &pdev->state), msecs_to_jiffies(WMT_LIB_RX_TIMEOUT));
pDev->rWmtRxWq.timeoutValue = WMT_LIB_RX_TIMEOUT;
//waitRet = osal_wait_for_event_bit_timeout(&pDev->rWmtRxWq, &pDev->state, WMT_STAT_RX);
waitRet = wmt_dev_rx_timeout(&pDev->rWmtRxWq);
WMT_LOUD_FUNC("wmt_dev_rx_timeout returned\n");
if (0 == waitRet) {
WMT_ERR_FUNC("wmt_dev_rx_timeout: timeout \n");
return -1;
}
else if (waitRet < 0) {
WMT_WARN_FUNC("wmt_dev_rx_timeout: interrupted by signal (%ld)\n", waitRet);
return waitRet;
}
WMT_DBG_FUNC("wmt_dev_rx_timeout, iRet(%ld)\n", waitRet);
/* read_len = mtk_wcn_stp_receive_data(data, size, WMT_TASK_INDX); */
readLen = mtk_wcn_stp_receive_data(pBuff, buffLen, WMT_TASK_INDX);
if (0 == readLen) {
WMT_WARN_FUNC("wmt_ctrl_rx be signaled, but no rx data(%ld)\n", waitRet);
}
WMT_DBG_FUNC("readLen(%d) \n", readLen);
}
if (readSize) {
*readSize = readLen ;
}
return 0;
}
INT32
wmt_ctrl_tx_ex (
const UINT8 *pData,
const UINT32 size,
UINT32 *writtenSize,
const MTK_WCN_BOOL bRawFlag
)
{
P_DEV_WMT pDev = &gDevWmt; /* single instance */
INT32 iRet;
if (NULL != writtenSize) {
*writtenSize = 0;
}
/* sanity check */
if (0 == size) {
WMT_WARN_FUNC("size to tx is 0\n");
osal_assert(size);
return -1;
}
/* if STP is not enabled yet, can't use this function. Use tx_raw instead */
if ( !osal_test_bit(WMT_STAT_STP_OPEN, &pDev->state) ||
!osal_test_bit(WMT_STAT_STP_EN, &pDev->state) ) {
WMT_ERR_FUNC("wmt state(0x%lx) \n", pDev->state);
osal_assert(osal_test_bit(WMT_STAT_STP_EN, &pDev->state));
osal_assert(osal_test_bit(WMT_STAT_STP_OPEN, &pDev->state));
return -2;
}
/* sanity ok, proceeding tx operation */
/*retval = mtk_wcn_stp_send_data(data, size, WMTDRV_TYPE_WMT);*/
mtk_wcn_stp_flush_rx_queue(WMT_TASK_INDX);
if (bRawFlag) {
iRet = mtk_wcn_stp_send_data_raw(pData, size, WMT_TASK_INDX);
}
else {
iRet = mtk_wcn_stp_send_data(pData, size, WMT_TASK_INDX);
}
if (iRet != size){
WMT_WARN_FUNC("write(%d) written(%d)\n", size, iRet);
osal_assert(iRet == size);
}
if (writtenSize) {
*writtenSize = iRet;
}
return 0;
}
INT32
wmt_ctrl_rx_flush (
P_WMT_CTRL_DATA pWmtCtrlData
)
{
UINT32 type = pWmtCtrlData->au4CtrlData[0];
WMT_INFO_FUNC("flush rx %d queue\n", type);
mtk_wcn_stp_flush_rx_queue(type);
return 0;
}
INT32 wmt_ctrl_hw_pwr_off(P_WMT_CTRL_DATA pWmtCtrlData)
{
INT32 iret;
/*psm should be disabled before wmt_ic_deinit*/
P_DEV_WMT pDev = &gDevWmt;
if (osal_test_and_clear_bit(WMT_STAT_PWR, &pDev->state)) {
WMT_DBG_FUNC("on->off \n");
iret = wmt_plat_pwr_ctrl(FUNC_OFF);
}
else {
WMT_WARN_FUNC("already off \n");
iret = 0;
}
return iret;
}
INT32 wmt_ctrl_hw_pwr_on(P_WMT_CTRL_DATA pWmtCtrlData)
{
INT32 iret;
/*psm should be enabled right after wmt_ic_init*/
P_DEV_WMT pDev = &gDevWmt;
if (osal_test_and_set_bit(WMT_STAT_PWR, &pDev->state)) {
WMT_WARN_FUNC("already on\n");
iret = 0;
}
else {
WMT_DBG_FUNC("off->on \n");
iret = wmt_plat_pwr_ctrl(FUNC_ON);
}
return iret;
}
INT32 wmt_ctrl_ul_cmd (
P_DEV_WMT pWmtDev,
const UCHAR *pCmdStr
)
{
INT32 waitRet = -1;
P_OSAL_SIGNAL pCmdSignal;
P_OSAL_EVENT pCmdReq;
if (osal_test_and_set_bit(WMT_STAT_CMD, &pWmtDev->state)) {
WMT_WARN_FUNC("cmd buf is occupied by (%s) \n", pWmtDev->cCmd);
return -1;
}
/* indicate baud rate change to user space app */
#if 0
INIT_COMPLETION(pWmtDev->cmd_comp);
pWmtDev->cmd_result = -1;
strncpy(pWmtDev->cCmd, pCmdStr, NAME_MAX);
pWmtDev->cCmd[NAME_MAX] = '\0';
wake_up_interruptible(&pWmtDev->cmd_wq);
#endif
pCmdSignal = &pWmtDev->cmdResp;
osal_signal_init(pCmdSignal);
pCmdSignal->timeoutValue = 2000;
osal_strncpy(pWmtDev->cCmd, pCmdStr, NAME_MAX);
pWmtDev->cCmd[NAME_MAX] = '\0';
pCmdReq = &pWmtDev->cmdReq;
osal_trigger_event(&pWmtDev->cmdReq);
WMT_DBG_FUNC("str(%s) request ok\n", pCmdStr);
// waitRet = wait_for_completion_interruptible_timeout(&pWmtDev->cmd_comp, msecs_to_jiffies(2000));
waitRet = osal_wait_for_signal_timeout(pCmdSignal);
WMT_LOUD_FUNC("wait signal iRet:%d\n", waitRet);
if (0 == waitRet) {
WMT_ERR_FUNC("wait signal timeout \n");
return -2;
}
WMT_INFO_FUNC("str(%s) result(%d)\n", pCmdStr, pWmtDev->cmdResult);
return pWmtDev->cmdResult;
}
INT32 wmt_ctrl_hw_rst(P_WMT_CTRL_DATA pWmtCtrlData)
{
wmt_plat_pwr_ctrl(FUNC_RST);
return 0;
}
INT32 wmt_ctrl_hw_state_show(P_WMT_CTRL_DATA pWmtCtrlData)
{
wmt_plat_pwr_ctrl(FUNC_STAT);
return 0;
}
INT32 wmt_ctrl_stp_close(P_WMT_CTRL_DATA pWmtCtrlData)
{
P_DEV_WMT pDev = &gDevWmt; /* single instance */
INT32 iRet = 0;
UCHAR cmdStr[NAME_MAX + 1] = {0};
/* un-register to STP-core for rx */
iRet = mtk_wcn_stp_register_event_cb(WMT_TASK_INDX, NULL); /* mtk_wcn_stp_register_event_cb */
if (iRet) {
WMT_WARN_FUNC("stp_reg cb unregister fail(%d)\n", iRet);
return -1;
}
if (WMT_HIF_UART == pDev->rWmtHifConf.hifType) {
osal_snprintf(cmdStr, NAME_MAX, "close_stp");
iRet = wmt_ctrl_ul_cmd(pDev, cmdStr);
if (iRet) {
WMT_WARN_FUNC("wmt_ctrl_ul_cmd fail(%d)\n", iRet);
return -2;
}
}
osal_clear_bit(WMT_STAT_STP_OPEN, &pDev->state);
return 0;
}
INT32 wmt_ctrl_stp_open(P_WMT_CTRL_DATA pWmtCtrlData)
{
P_DEV_WMT pDev = &gDevWmt; /* single instance */
INT32 iRet;
UCHAR cmdStr[NAME_MAX + 1] = {0};
if (WMT_HIF_UART == pDev->rWmtHifConf.hifType) {
osal_snprintf(cmdStr, NAME_MAX, "open_stp");
iRet = wmt_ctrl_ul_cmd(pDev, cmdStr);
if (iRet) {
WMT_WARN_FUNC("wmt_ctrl_ul_cmd fail(%d)\n", iRet);
return -1;
}
}
/* register to STP-core for rx */
iRet = mtk_wcn_stp_register_event_cb(WMT_TASK_INDX, wmt_dev_rx_event_cb); /* mtk_wcn_stp_register_event_cb */
if (iRet) {
WMT_WARN_FUNC("stp_reg cb fail(%d)\n", iRet);
return -2;
}
osal_set_bit(WMT_STAT_STP_OPEN, &pDev->state);
return 0;
}
INT32 wmt_ctrl_patch_search(P_WMT_CTRL_DATA pWmtCtrlData)
{
P_DEV_WMT pDev = &gDevWmt; /* single instance */
INT32 iRet;
UCHAR cmdStr[NAME_MAX + 1] = {0};
osal_snprintf(cmdStr, NAME_MAX, "srh_patch");
iRet = wmt_ctrl_ul_cmd(pDev, cmdStr);
if (iRet) {
WMT_WARN_FUNC("wmt_ctrl_ul_cmd fail(%d)\n", iRet);
return -1;
}
return 0;
}
INT32 wmt_ctrl_get_patch_num(P_WMT_CTRL_DATA pWmtCtrlData)
{
P_DEV_WMT pDev = &gDevWmt; /* single instance */
pWmtCtrlData->au4CtrlData[0] = pDev->patchNum;
return 0;
}
INT32 wmt_ctrl_get_patch_info(P_WMT_CTRL_DATA pWmtCtrlData)
{
P_DEV_WMT pDev = &gDevWmt; /* single instance */
UINT32 downLoadSeq = 0;
P_WMT_PATCH_INFO pPatchinfo = NULL;
PUCHAR pNbuf = NULL;
PUCHAR pAbuf =NULL;
downLoadSeq = pWmtCtrlData->au4CtrlData[0];
WMT_DBG_FUNC("download seq is %d\n",downLoadSeq);
pPatchinfo = pDev->pWmtPatchInfo + downLoadSeq - 1;
pNbuf = (PUCHAR)pWmtCtrlData->au4CtrlData[1];
pAbuf = (PUCHAR)pWmtCtrlData->au4CtrlData[2];
if(pPatchinfo)
{
osal_memcpy(pNbuf,pPatchinfo->patchName,osal_sizeof(pPatchinfo->patchName));
osal_memcpy(pAbuf,pPatchinfo->addRess,osal_sizeof(pPatchinfo->addRess));
WMT_DBG_FUNC("get 4 address bytes is 0x%2x,0x%2x,0x%2x,0x%2x",pAbuf[0],pAbuf[1],pAbuf[2],pAbuf[3]);
}
else
{
WMT_ERR_FUNC("NULL patchinfo pointer\n");
}
return 0;
}
INT32 wmt_ctrl_stp_conf_ex (WMT_STP_CONF_TYPE type, UINT32 value)
{
INT32 iRet = -1;
switch (type) {
case WMT_STP_CONF_EN:
iRet = mtk_wcn_stp_enable(value);
break;
case WMT_STP_CONF_RDY:
iRet = mtk_wcn_stp_ready(value);
break;
case WMT_STP_CONF_MODE:
mtk_wcn_stp_set_mode(value);
iRet = 0;
break;
default:
WMT_WARN_FUNC("invalid type(%d) value(%d) \n", type, value);
break;
}
return iRet;
}
INT32 wmt_ctrl_stp_conf(P_WMT_CTRL_DATA pWmtCtrlData)
{
INT32 iRet = -1;
P_DEV_WMT pDev = &gDevWmt; /* single instance */
UINT32 type;
UINT32 value;
if (!osal_test_bit(WMT_STAT_STP_OPEN, &pDev->state)) {
WMT_WARN_FUNC("CTRL_STP_ENABLE but invalid Handle of WmtStp \n");
return -1;
}
type = pWmtCtrlData->au4CtrlData[0];
value = pWmtCtrlData->au4CtrlData[1];
iRet = wmt_ctrl_stp_conf_ex(type, value);
if (!iRet) {
if (WMT_STP_CONF_EN == type) {
if (value) {
osal_set_bit(WMT_STAT_STP_EN, &pDev->state);
WMT_DBG_FUNC("enable STP\n");
}
else {
osal_clear_bit(WMT_STAT_STP_EN, &pDev->state);
WMT_DBG_FUNC("disable STP\n");
}
}
}
return iRet;
}
INT32 wmt_ctrl_free_patch(P_WMT_CTRL_DATA pWmtCtrlData)
{
UINT32 patchSeq = pWmtCtrlData->au4CtrlData[0];
WMT_DBG_FUNC("BF free patch, gDevWmt.pPatch(0x%08x)\n", gDevWmt.pPatch);
if (NULL != gDevWmt.pPatch)
{
wmt_dev_patch_put((osal_firmware **)&(gDevWmt.pPatch));
}
WMT_DBG_FUNC("AF free patch, gDevWmt.pPatch(0x%08x)\n", gDevWmt.pPatch);
if (patchSeq == gDevWmt.patchNum)
{
WMT_DBG_FUNC("the %d patch has been download\n",patchSeq);
wmt_dev_patch_info_free();
}
return 0;
}
INT32 wmt_ctrl_get_patch_name(P_WMT_CTRL_DATA pWmtCtrlData)
{
PUCHAR pBuf = (PUCHAR)pWmtCtrlData->au4CtrlData[0];
osal_memcpy(pBuf, gDevWmt.cPatchName, osal_sizeof(gDevWmt.cPatchName));
return 0;
}
INT32 wmt_ctrl_crystal_triming_put(P_WMT_CTRL_DATA pWmtCtrlData)
{
WMT_DBG_FUNC("BF free patch, gDevWmt.pPatch(0x%08x)\n", gDevWmt.pPatch);
if (NULL != gDevWmt.pNvram)
{
wmt_dev_patch_put((osal_firmware **)&(gDevWmt.pNvram));
}
WMT_DBG_FUNC("AF free patch, gDevWmt.pNvram(0x%08x)\n", gDevWmt.pNvram);
return 0;
}
INT32 wmt_ctrl_crystal_triming_get(P_WMT_CTRL_DATA pWmtCtrlData)
{
INT32 iRet = 0x0;
UCHAR *pFileName = (UCHAR *)pWmtCtrlData->au4CtrlData[0];
PUINT8 *ppBuf = (PUINT8 *)pWmtCtrlData->au4CtrlData[1];
PUINT32 pSize = (PUINT32)pWmtCtrlData->au4CtrlData[2];
osal_firmware *pNvram = NULL;
if ((NULL == pFileName) || (NULL == pSize))
{
WMT_ERR_FUNC("parameter error, pFileName(0x%08x), pSize(0x%08x)\n", pFileName, pSize);
iRet = -1;
return iRet;
}
if (0 == wmt_dev_patch_get(pFileName, &pNvram, 0))
{
*ppBuf = (PUINT8)(pNvram)->data;
*pSize = (pNvram)->size;
gDevWmt.pNvram = pNvram;
return 0;
}
return -1;
}
INT32 wmt_ctrl_get_patch(P_WMT_CTRL_DATA pWmtCtrlData)
{
UCHAR *pFullPatchName = NULL;
UCHAR *pDefPatchName = NULL;
PUINT8 *ppBuf = (PUINT8 *)pWmtCtrlData->au4CtrlData[2];
PUINT32 pSize = (PUINT32)pWmtCtrlData->au4CtrlData[3];
osal_firmware *pPatch = NULL;
pFullPatchName = (UCHAR *)pWmtCtrlData->au4CtrlData[1];
WMT_DBG_FUNC("BF get patch, pPatch(0x%08x)\n", pPatch);
if ( (NULL != pFullPatchName)
&& (0 == wmt_dev_patch_get(pFullPatchName, &pPatch, BCNT_PATCH_BUF_HEADROOM)) ) {
/*get full name patch success*/
WMT_DBG_FUNC("get full patch name(%s) buf(0x%p) size(%d)\n",
pFullPatchName, (pPatch)->data, (pPatch)->size);
WMT_DBG_FUNC("AF get patch, pPatch(0x%08x)\n", pPatch);
*ppBuf = (PUINT8)(pPatch)->data;
*pSize = (pPatch)->size;
gDevWmt.pPatch = pPatch;
return 0;
}
pDefPatchName = (UCHAR *)pWmtCtrlData->au4CtrlData[0];
if ( (NULL != pDefPatchName)
&& (0 == wmt_dev_patch_get(pDefPatchName, &pPatch, BCNT_PATCH_BUF_HEADROOM)) ) {
WMT_DBG_FUNC("get def patch name(%s) buf(0x%p) size(%d)\n",
pDefPatchName, (pPatch)->data, (pPatch)->size);
WMT_DBG_FUNC("AF get patch, pPatch(0x%08x)\n", pPatch);
/*get full name patch success*/
*ppBuf = (PUINT8)(pPatch)->data;
*pSize = (pPatch)->size;
gDevWmt.pPatch = pPatch;
return 0;
}
return -1;
}
INT32 wmt_ctrl_host_baudrate_set(P_WMT_CTRL_DATA pWmtCtrlData)
{
INT32 iRet = -1;
CHAR cmdStr[NAME_MAX + 1] = {0};
UINT32 u4Baudrate = pWmtCtrlData->au4CtrlData[0];
UINT32 u4FlowCtrl = pWmtCtrlData->au4CtrlData[1];
WMT_DBG_FUNC("baud(%d), flowctrl(%d) \n", u4Baudrate, u4FlowCtrl);
if (osal_test_bit(WMT_STAT_STP_OPEN, &gDevWmt.state)) {
osal_snprintf(cmdStr, NAME_MAX, "baud_%d_%d", u4Baudrate, u4FlowCtrl);
iRet = wmt_ctrl_ul_cmd(&gDevWmt, cmdStr);
if (iRet) {
WMT_WARN_FUNC("CTRL_BAUDRATE baud(%d), flowctrl(%d) fail(%d) \n",
u4Baudrate,
pWmtCtrlData->au4CtrlData[1],
iRet);
}
else {
WMT_DBG_FUNC("CTRL_BAUDRATE baud(%d), flowctrl(%d) ok\n",
u4Baudrate,
u4FlowCtrl);
}
}
else {
WMT_INFO_FUNC("CTRL_BAUDRATE but invalid Handle of WmtStp \n");
}
return iRet;
}
INT32 wmt_ctrl_sdio_hw(P_WMT_CTRL_DATA pWmtCtrlData)
{
INT32 iRet = 0;
UINT32 statBit = WMT_STAT_SDIO1_ON;
P_DEV_WMT pDev = &gDevWmt; /* single instance */
WMT_SDIO_SLOT_NUM sdioSlotNum = pWmtCtrlData->au4CtrlData[0];
ENUM_FUNC_STATE funcState = pWmtCtrlData->au4CtrlData[1];
if ((WMT_SDIO_SLOT_INVALID == sdioSlotNum)
|| (WMT_SDIO_SLOT_MAX <= sdioSlotNum)) {
WMT_WARN_FUNC("CTRL_SDIO_SLOT(%d) but invalid slot num \n", sdioSlotNum);
return -1;
}
WMT_DBG_FUNC("WMT_CTRL_SDIO_HW (0x%x, %d)\n", sdioSlotNum, funcState);
if (WMT_SDIO_SLOT_SDIO2 == sdioSlotNum) {
statBit = WMT_STAT_SDIO2_ON;
}
if (funcState) {
if (osal_test_and_set_bit(statBit, &pDev->state)) {
WMT_WARN_FUNC("CTRL_SDIO_SLOT slotNum(%d) already ON \n", sdioSlotNum);
//still return 0
iRet = 0;
}
else {
iRet = wmt_plat_sdio_ctrl(sdioSlotNum, FUNC_ON);
}
}
else {
if (osal_test_and_clear_bit(statBit, &pDev->state)) {
iRet = wmt_plat_sdio_ctrl(sdioSlotNum, FUNC_OFF);
}
else {
WMT_WARN_FUNC("CTRL_SDIO_SLOT slotNum(%d) already OFF \n", sdioSlotNum);
//still return 0
iRet = 0;
}
}
return iRet;
}
INT32 wmt_ctrl_sdio_func(P_WMT_CTRL_DATA pWmtCtrlData)
{
INT32 iRet = -1;
UINT32 statBit = WMT_STAT_SDIO_WIFI_ON;
INT32 retry = 10;
P_DEV_WMT pDev = &gDevWmt; /* single instance */
WMT_SDIO_FUNC_TYPE sdioFuncType = pWmtCtrlData->au4CtrlData[0];
UINT32 u4On = pWmtCtrlData->au4CtrlData[1];
if (WMT_SDIO_FUNC_MAX <= sdioFuncType) {
WMT_ERR_FUNC("CTRL_SDIO_FUNC, invalid func type (%d) \n", sdioFuncType);
return -1;
}
if (WMT_SDIO_FUNC_STP == sdioFuncType) {
statBit = WMT_STAT_SDIO_STP_ON;
}
if (u4On) {
if (osal_test_bit(statBit, &pDev->state)) {
WMT_WARN_FUNC("CTRL_SDIO_FUNC(%d) but already ON \n", sdioFuncType);
iRet = 0;
}
else {
while (retry-- > 0 && iRet != 0) {
if (iRet) {
/* sleep 150ms before sdio slot ON ready */
osal_msleep(150);
}
iRet = mtk_wcn_hif_sdio_wmt_control(sdioFuncType, MTK_WCN_BOOL_TRUE);
if (HIF_SDIO_ERR_NOT_PROBED == iRet) {
/* not probed case, retry */
continue;
}
else if (HIF_SDIO_ERR_CLT_NOT_REG == iRet){
/* For WiFi, client not reg yet, no need to retry, WiFi function can work any time when wlan.ko is insert into system*/
iRet = 0;
}
else
{
/* other fail cases, stop */
break;
}
}
if (!retry || iRet) {
WMT_ERR_FUNC("mtk_wcn_hif_sdio_wmt_control(%d, TRUE) fail(%d) retry(%d)\n", sdioFuncType, iRet, retry);
}
else
{
osal_set_bit(statBit, &pDev->state);
}
}
}
else {
if (osal_test_bit(statBit, &pDev->state)) {
iRet = mtk_wcn_hif_sdio_wmt_control(sdioFuncType, MTK_WCN_BOOL_FALSE);
if (iRet) {
WMT_ERR_FUNC("mtk_wcn_hif_sdio_wmt_control(%d, FALSE) fail(%d)\n", sdioFuncType, iRet);
}
/*any way, set to OFF state*/
osal_clear_bit(statBit, &pDev->state);
}
else {
WMT_WARN_FUNC("CTRL_SDIO_FUNC(%d) but already OFF \n", sdioFuncType);
iRet = 0;
}
}
return iRet;
}
#if 0 // TODO: [FixMe][GeorgeKuo]: remove unused function. get hwver from core is not needed.
INT32 wmt_ctrl_hwver_get(P_WMT_CTRL_DATA pWmtCtrlData)
{
P_DEV_WMT pDev = &gDevWmt; /* single instance */
return 0;
}
#endif
INT32 wmt_ctrl_hwidver_set(P_WMT_CTRL_DATA pWmtCtrlData)
{
P_DEV_WMT pDev = &gDevWmt; /* single instance */
/* input sanity check is done in wmt_ctrl() */
pDev->chip_id = (pWmtCtrlData->au4CtrlData[0] & 0xFFFF0000) >> 16;
pDev->hw_ver = pWmtCtrlData->au4CtrlData[0] & 0x0000FFFF;
pDev->fw_ver = pWmtCtrlData->au4CtrlData[1] & 0x0000FFFF;
// TODO: [FixMe][GeorgeKuo] remove translated ENUM_WMTHWVER_TYPE_T in the future!!!
// Only use hw_ver read from hw.
pDev->eWmtHwVer =
(ENUM_WMTHWVER_TYPE_T)(pWmtCtrlData->au4CtrlData[1] & 0xFFFF0000) >> 16;
return 0;
}
static INT32
wmt_ctrl_gps_sync_set (
P_WMT_CTRL_DATA pData
)
{
INT32 iret;
WMT_INFO_FUNC("ctrl GPS_SYNC(%d)\n", (0 == pData->au4CtrlData[0]) ? PIN_STA_DEINIT : PIN_STA_MUX);
iret = wmt_plat_gpio_ctrl(PIN_GPS_SYNC,
(0 == pData->au4CtrlData[0]) ? PIN_STA_DEINIT : PIN_STA_MUX);
if (iret) {
WMT_WARN_FUNC("ctrl GPS_SYNC(%d) fail!(%d) ignore it...\n",
(0 == pData->au4CtrlData[0]) ? PIN_STA_DEINIT : PIN_STA_MUX,
iret);
}
return 0;
}
static INT32
wmt_ctrl_gps_lna_set (
P_WMT_CTRL_DATA pData
)
{
INT32 iret;
WMT_INFO_FUNC("ctrl GPS_LNA(%d)\n", (0 == pData->au4CtrlData[0]) ? PIN_STA_DEINIT : PIN_STA_OUT_H);
iret = wmt_plat_gpio_ctrl(PIN_GPS_LNA,
(0 == pData->au4CtrlData[0]) ? PIN_STA_DEINIT : PIN_STA_OUT_H);
if (iret) {
WMT_WARN_FUNC("ctrl GPS_SYNC(%d) fail!(%d) ignore it...\n",
(0 == pData->au4CtrlData[0]) ? PIN_STA_DEINIT : PIN_STA_OUT_H,
iret);
}
return 0;
}
INT32 wmt_ctrl_stp_rst(P_WMT_CTRL_DATA pWmtCtrlData)
{
return 0;
}
INT32 wmt_ctrl_get_wmt_conf(P_WMT_CTRL_DATA pWmtCtrlData)
{
P_DEV_WMT pDev = &gDevWmt; /* single instance */
pWmtCtrlData->au4CtrlData[0] = (UINT32)&pDev->rWmtGenConf;
return 0;
}
INT32 wmt_ctrl_others(P_WMT_CTRL_DATA pWmtCtrlData)
{
WMT_ERR_FUNC("wmt_ctrl_others, invalid CTRL ID (%d)\n", pWmtCtrlData->ctrlId);
return -1;
}

View File

@@ -1,706 +0,0 @@
/* Copyright Statement:
*
* This software/firmware and related documentation ("MediaTek Software") are
* protected under relevant copyright laws. The information contained herein
* is confidential and proprietary to MediaTek Inc. and/or its licensors.
* Without the prior written permission of MediaTek inc. and/or its licensors,
* any reproduction, modification, use or disclosure of MediaTek Software,
* and information contained herein, in whole or in part, shall be strictly prohibited.
*
* MediaTek Inc. (C) 2010. All rights reserved.
*
* BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
* THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
* CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
* SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
* STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
* CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
*
* The following software/firmware and/or related documentation ("MediaTek Software")
* have been modified by MediaTek Inc. All revisions are subject to any receiver's
* applicable license agreements with MediaTek Inc.
*/
/*! \file
\brief brief description
Detailed descriptions here.
*/
/*******************************************************************************
* Copyright (c) 2009 MediaTek Inc.
*
* All rights reserved. Copying, compilation, modification, distribution
* or any other use whatsoever of this material is strictly prohibited
* except in accordance with a Software License Agreement with
* MediaTek Inc.
********************************************************************************
*/
/*******************************************************************************
* LEGAL DISCLAIMER
*
* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND
* AGREES THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK
* SOFTWARE") RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE
* PROVIDED TO BUYER ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY
* DISCLAIMS ANY AND ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT
* LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
* PARTICULAR PURPOSE OR NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE
* ANY WARRANTY WHATSOEVER WITH RESPECT TO THE SOFTWARE OF ANY THIRD PARTY
* WHICH MAY BE USED BY, INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK
* SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY
* WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE
* FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S SPECIFICATION OR TO
* CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
*
* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL
* BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT
* ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY
* BUYER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
*
* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT
* OF LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING
* THEREOF AND RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN
* FRANCISCO, CA, UNDER THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE
* (ICC).
********************************************************************************
*/
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
#include "wmt_dbg.h"
#include "wmt_core.h"
#include "wmt_lib.h"
#include "wmt_conf.h"
#include "psm_core.h"
#include "stp_core.h"
#if CFG_WMT_DBG_SUPPORT
#ifdef DFT_TAG
#undef DFT_TAG
#endif
#define DFT_TAG "[WMT-DEV]"
#define WMT_DBG_PROCNAME "driver/wmt_dbg"
static struct proc_dir_entry *gWmtDbgEntry = NULL;
COEX_BUF gCoexBuf;
static INT32 wmt_dbg_psm_ctrl(INT32 par1, INT32 par2, INT32 par3);
static INT32 wmt_dbg_dsns_ctrl(INT32 par1, INT32 par2, INT32 par3);
static INT32 wmt_dbg_hwver_get(INT32 par1, INT32 par2, INT32 par3);
static INT32 wmt_dbg_inband_rst(INT32 par1, INT32 par2, INT32 par3);
static INT32 wmt_dbg_chip_rst(INT32 par1, INT32 par2, INT32 par3);
static INT32 wmt_dbg_func_ctrl(INT32 par1, INT32 par2, INT32 par3);
static INT32 wmt_dbg_raed_chipid(INT32 par1, INT32 par2, INT32 par3);
static INT32 wmt_dbg_wmt_dbg_level(INT32 par1, INT32 par2, INT32 par3);
static INT32 wmt_dbg_stp_dbg_level(INT32 par1, INT32 par2, INT32 par3);
static INT32 wmt_dbg_reg_read(INT32 par1, INT32 par2, INT32 par3);
static INT32 wmt_dbg_reg_write(INT32 par1, INT32 par2, INT32 par3);
static INT32 wmt_dbg_coex_test(INT32 par1, INT32 par2, INT32 par3);
static INT32 wmt_dbg_assert_test(INT32 par1, INT32 par2, INT32 par3);
static INT32 wmt_dbg_cmd_test_api(ENUM_WMTDRV_CMD_T cmd);
static INT32 wmt_dbg_rst_ctrl(INT32 par1, INT32 par2, INT32 par3);
static INT32 wmt_dbg_ut_test(INT32 par1, INT32 par2, INT32 par3);
static INT32 wmt_dbg_efuse_read(INT32 par1, INT32 par2, INT32 par3);
static INT32 wmt_dbg_efuse_write(INT32 par1, INT32 par2, INT32 par3);
static INT32 wmt_dbg_sdio_ctrl(INT32 par1, INT32 par2, INT32 par3);
static INT32 wmt_dbg_stp_dbg_ctrl(INT32 par1, INT32 par2, INT32 par3);
static INT32 wmt_dbg_stp_dbg_log_ctrl(INT32 par1, INT32 par2, INT32 par3);
static INT32 wmt_dbg_wmt_assert_ctrl(INT32 par1, INT32 par2, INT32 par3);
const static WMT_DEV_DBG_FUNC wmt_dev_dbg_func[] =
{
[0] = wmt_dbg_psm_ctrl,
[1] = wmt_dbg_psm_ctrl,
[2] = wmt_dbg_dsns_ctrl,
[3] = wmt_dbg_hwver_get,
[4] = wmt_dbg_assert_test,
[5] = wmt_dbg_inband_rst,
[6] = wmt_dbg_chip_rst,
[7] = wmt_dbg_func_ctrl,
[8] = wmt_dbg_raed_chipid,
[9] = wmt_dbg_wmt_dbg_level,
[0xa] = wmt_dbg_stp_dbg_level,
[0xb] = wmt_dbg_reg_read,
[0xc] = wmt_dbg_reg_write,
[0xd] = wmt_dbg_coex_test,
[0xe] = wmt_dbg_rst_ctrl,
[0xf] = wmt_dbg_ut_test,
[0x10] = wmt_dbg_efuse_read,
[0x11] = wmt_dbg_efuse_write,
[0x12] = wmt_dbg_sdio_ctrl,
[0x13] = wmt_dbg_stp_dbg_ctrl,
[0x14] = wmt_dbg_stp_dbg_log_ctrl,
[0x15] = wmt_dbg_wmt_assert_ctrl,
};
INT32 wmt_dbg_psm_ctrl(INT32 par1, INT32 par2, INT32 par3)
{
#if CFG_WMT_PS_SUPPORT
if (0 == par2)
{
wmt_lib_ps_ctrl(0);
WMT_INFO_FUNC("disable PSM\n");
}
else
{
par2 = (1 > par2 || 20000 < par2) ? STP_PSM_IDLE_TIME_SLEEP : par2;
wmt_lib_ps_set_idle_time(par2);
wmt_lib_ps_ctrl(1);
WMT_INFO_FUNC("enable PSM, idle to sleep time = %d ms\n", par2);
}
#else
WMT_INFO_FUNC("WMT PS not supported\n");
#endif
return 0;
}
INT32 wmt_dbg_dsns_ctrl(INT32 par1, INT32 par2, INT32 par3)
{
if (WMTDSNS_FM_DISABLE <= par2 && WMTDSNS_MAX > par2 )
{
WMT_INFO_FUNC("DSNS type (%d)\n", par2);
mtk_wcn_wmt_dsns_ctrl(par2);
}
else
{
WMT_WARN_FUNC("invalid DSNS type\n");
}
return 0;
}
INT32 wmt_dbg_hwver_get(INT32 par1, INT32 par2, INT32 par3)
{
WMT_INFO_FUNC("query chip version\n");
mtk_wcn_wmt_hwver_get();
return 0;
}
INT32 wmt_dbg_assert_test(INT32 par1, INT32 par2, INT32 par3)
{
if (0 == par3)
{
//par2 = 0: send assert command
//par2 != 0: send exception command
return wmt_dbg_cmd_test_api(0 == par2 ? 0 : 1);
}
else
{
INT32 sec = 8;
INT32 times = 0;
times = par3;
do{
WMT_INFO_FUNC("Send Assert Command per 8 secs!!\n");
wmt_dbg_cmd_test_api(0);
osal_msleep(sec * 1000);
}while(--times);
}
return 0;
}
INT32 wmt_dbg_cmd_test_api(ENUM_WMTDRV_CMD_T cmd)
{
P_OSAL_OP pOp = NULL;
MTK_WCN_BOOL bRet = MTK_WCN_BOOL_FALSE;
P_OSAL_SIGNAL pSignal;
pOp = wmt_lib_get_free_op();
if (!pOp ) {
WMT_WARN_FUNC("get_free_lxop fail\n");
return MTK_WCN_BOOL_FALSE;
}
pSignal = &pOp ->signal;
pOp ->op.opId = WMT_OPID_CMD_TEST;
pSignal->timeoutValue= MAX_EACH_WMT_CMD;
/*this test command should be run with usb cable connected, so no host awake is needed*/
//wmt_lib_host_awake_get();
switch (cmd)
{
case WMTDRV_CMD_ASSERT:
pOp->op.au4OpData[0] = 0;
break;
case WMTDRV_CMD_EXCEPTION:
pOp->op.au4OpData[0] = 1;
break;
default:
if (WMTDRV_CMD_COEXDBG_00 <= cmd && WMTDRV_CMD_COEXDBG_15 >= cmd)
{
pOp->op.au4OpData[0] = 2;
pOp->op.au4OpData[1] = cmd - 2;
}
else
{
pOp->op.au4OpData[0] = 0xff;
pOp->op.au4OpData[1] = 0xff;
}
pOp->op.au4OpData[2] = (ULONG)gCoexBuf.buffer;
pOp->op.au4OpData[3] = osal_sizeof(gCoexBuf.buffer);
break;
}
WMT_INFO_FUNC("CMD_TEST, opid(%d), par(%d, %d)\n", pOp->op.opId, pOp->op.au4OpData[0], pOp->op.au4OpData[1]);
/*wake up chip first*/
if (DISABLE_PSM_MONITOR()) {
WMT_ERR_FUNC("wake up failed\n");
wmt_lib_put_op_to_free_queue(pOp);
return -1;
}
bRet = wmt_lib_put_act_op(pOp);
ENABLE_PSM_MONITOR();
if ((cmd != WMTDRV_CMD_ASSERT) && (cmd != WMTDRV_CMD_EXCEPTION))
{
if (MTK_WCN_BOOL_FALSE == bRet)
{
gCoexBuf.availSize = 0;
}
else
{
gCoexBuf.availSize = pOp->op.au4OpData[3];
WMT_INFO_FUNC("gCoexBuf.availSize = %d\n", gCoexBuf.availSize);
}
}
//wmt_lib_host_awake_put();
WMT_INFO_FUNC("CMD_TEST, opid (%d), par(%d, %d), ret(%d), result(%s)\n", \
pOp->op.opId, \
pOp->op.au4OpData[0], \
pOp->op.au4OpData[1], \
bRet, \
MTK_WCN_BOOL_FALSE == bRet ? "failed" : "succeed"\
);
return 0;
}
INT32 wmt_dbg_inband_rst(INT32 par1, INT32 par2, INT32 par3)
{
if (0 == par2)
{
WMT_INFO_FUNC("inband reset test!!\n");
mtk_wcn_stp_inband_reset();
}
else
{
WMT_INFO_FUNC("STP context reset in host side!!\n");
mtk_wcn_stp_flush_context();
}
return 0;
}
INT32 wmt_dbg_chip_rst(INT32 par1, INT32 par2, INT32 par3)
{
if (0 == par2)
{
if (mtk_wcn_stp_is_ready())
{
WMT_INFO_FUNC("whole chip reset test\n");
wmt_lib_cmb_rst(WMTRSTSRC_RESET_TEST);
}
else
{
WMT_INFO_FUNC("STP not ready , not to launch whole chip reset test\n");
}
}
else if (1 == par2)
{
WMT_INFO_FUNC("chip hardware reset test\n");
wmt_lib_hw_rst();
}
else
{
WMT_INFO_FUNC("chip software reset test\n");
wmt_lib_sw_rst(1);
}
return 0;
}
INT32 wmt_dbg_func_ctrl(INT32 par1, INT32 par2, INT32 par3)
{
if (WMTDRV_TYPE_WMT > par2 || WMTDRV_TYPE_LPBK == par2)
{
if (0 == par3)
{
WMT_INFO_FUNC("function off test, type(%d)\n", par2);
mtk_wcn_wmt_func_off(par2);
}
else
{
WMT_INFO_FUNC("function on test, type(%d)\n", par2);
mtk_wcn_wmt_func_on(par2);
}
}
else
{
WMT_INFO_FUNC("function ctrl test, invalid type(%d)\n", par2);
}
return 0;
}
INT32 wmt_dbg_raed_chipid(INT32 par1, INT32 par2, INT32 par3)
{
WMT_INFO_FUNC("chip version = %d\n", wmt_lib_get_icinfo(WMTCHIN_MAPPINGHWVER));
return 0;
}
INT32 wmt_dbg_wmt_dbg_level(INT32 par1, INT32 par2, INT32 par3)
{
par2 = (WMT_LOG_ERR <= par2 && WMT_LOG_LOUD >= par2) ? par2 : WMT_LOG_INFO;
wmt_lib_dbg_level_set(par2);
WMT_INFO_FUNC("set wmt log level to %d\n", par2);
return 0;
}
INT32 wmt_dbg_stp_dbg_level(INT32 par1, INT32 par2, INT32 par3)
{
par2 = (0 <= par2 && 4 >= par2) ? par2 : 2;
mtk_wcn_stp_dbg_level(par2);
WMT_INFO_FUNC("set stp log level to %d\n", par2);
return 0;
}
INT32 wmt_dbg_reg_read(INT32 par1, INT32 par2, INT32 par3)
{
//par2-->register address
//par3-->register mask
UINT32 value = 0x0;
UINT32 iRet = -1;
#if 0
DISABLE_PSM_MONITOR();
iRet = wmt_core_reg_rw_raw(0, par2, &value, par3);
ENABLE_PSM_MONITOR();
#endif
iRet = wmt_lib_reg_rw(0, par2, &value, par3);
WMT_INFO_FUNC("read combo chip register (0x%08x) with mask (0x%08x) %s, value = 0x%08x\n", \
par2, \
par3, \
iRet != 0 ? "failed" : "succeed", \
iRet != 0 ? -1: value\
);
return 0;
}
INT32 wmt_dbg_reg_write(INT32 par1, INT32 par2, INT32 par3)
{
//par2-->register address
//par3-->value to set
UINT32 iRet = -1;
#if 0
DISABLE_PSM_MONITOR();
iRet = wmt_core_reg_rw_raw(1, par2, &par3, 0xffffffff);
ENABLE_PSM_MONITOR();
#endif
iRet = wmt_lib_reg_rw(1, par2, &par3, 0xffffffff);
WMT_INFO_FUNC("write combo chip register (0x%08x) with value (0x%08x) %s\n", \
par2, \
par3, \
iRet != 0 ? "failed" : "succeed"\
);
return 0;
}
INT32 wmt_dbg_efuse_read(INT32 par1, INT32 par2, INT32 par3)
{
//par2-->efuse address
//par3-->register mask
UINT32 value = 0x0;
UINT32 iRet = -1;
iRet = wmt_lib_efuse_rw(0, par2, &value, par3);
WMT_INFO_FUNC("read combo chip efuse (0x%08x) with mask (0x%08x) %s, value = 0x%08x\n", \
par2, \
par3, \
iRet != 0 ? "failed" : "succeed", \
iRet != 0 ? -1: value\
);
return 0;
}
INT32 wmt_dbg_efuse_write(INT32 par1, INT32 par2, INT32 par3)
{
//par2-->efuse address
//par3-->value to set
UINT32 iRet = -1;
iRet = wmt_lib_efuse_rw(1, par2, &par3, 0xffffffff);
WMT_INFO_FUNC("write combo chip efuse (0x%08x) with value (0x%08x) %s\n", \
par2, \
par3, \
iRet != 0 ? "failed" : "succeed"\
);
return 0;
}
INT32 wmt_dbg_sdio_ctrl(INT32 par1, INT32 par2, INT32 par3)
{
INT32 iRet = -1;
iRet = wmt_lib_sdio_ctrl (0 != par2 ? 1 : 0);
WMT_INFO_FUNC("ctrl SDIO function %s\n", 0 == iRet ? "succeed" : "failed");
return 0;
}
INT32 wmt_dbg_stp_dbg_ctrl(INT32 par1, INT32 par2, INT32 par3)
{
if (1 < par2)
{
mtk_wcn_stp_dbg_dump_package();
return 0;
}
WMT_INFO_FUNC("%s stp debug function\n", 0 == par2 ? "disable" : "enable");
if (0 == par2)
{
mtk_wcn_stp_dbg_disable();
}
else if (1 == par2)
{
mtk_wcn_stp_dbg_enable();
}
return 0;
}
INT32 wmt_dbg_stp_dbg_log_ctrl(INT32 par1, INT32 par2, INT32 par3)
{
mtk_wcn_stp_dbg_log_ctrl(0 != par2 ? 1 : 0);
return 0;
}
INT32 wmt_dbg_wmt_assert_ctrl(INT32 par1, INT32 par2, INT32 par3)
{
mtk_wcn_stp_coredump_flag_ctrl(0 != par2 ? 1 : 0);
return 0;
}
INT32 wmt_dbg_coex_test(INT32 par1, INT32 par2, INT32 par3)
{
WMT_INFO_FUNC("coexistance test cmd!!\n");
return wmt_dbg_cmd_test_api(par2 + WMTDRV_CMD_COEXDBG_00);
}
INT32 wmt_dbg_rst_ctrl(INT32 par1, INT32 par2, INT32 par3)
{
WMT_INFO_FUNC("%s audo rst\n", 0 == par2 ? "disable" : "enable");
mtk_wcn_stp_set_auto_rst(0 == par2 ? 0 : 1);
return 0;
}
static INT32 wmt_dev_dbg_read(CHAR *page, CHAR **start, off_t off, INT32 count, INT32 *eof, void *data){
INT32 len = 0;
if(off > 0){
len = 0;
} else {
/*len = sprintf(page, "%d\n", g_psm_enable);*/
if ( gCoexBuf.availSize <= 0)
{
WMT_INFO_FUNC("no data available, please run echo 15 xx > /proc/driver/wmt_psm first\n");
len = osal_sprintf(page, "no data available, please run echo 15 xx > /proc/driver/wmt_psm first\n");
}
else
{
INT32 i = 0;
/*we do not check page buffer, because there are only 100 bytes in g_coex_buf, no reason page buffer is not enough, a bomb is placed here on unexpected condition*/
for (i = 0; i < gCoexBuf.availSize; i++)
{
len += osal_sprintf(page + len, "0x%02x ", gCoexBuf.buffer[i]);
}
len += osal_sprintf(page + len, "\n");
}
}
gCoexBuf.availSize = 0;
return len;
}
INT32 wmt_dbg_ut_test(INT32 par1, INT32 par2, INT32 par3)
{
INT32 i = 0;
INT32 j = 0;
INT32 iRet = 0;
i = 20;
while((i--) > 0){
WMT_INFO_FUNC("#### UT WMT and STP Function On/Off .... %d\n", i);
j = 10;
while((j--) > 0){
WMT_INFO_FUNC("#### BT On .... (%d, %d) \n", i, j);
iRet = mtk_wcn_wmt_func_on(WMTDRV_TYPE_BT);
if(iRet == MTK_WCN_BOOL_FALSE){
break;
}
WMT_INFO_FUNC("#### GPS On .... (%d, %d) \n", i, j);
iRet = mtk_wcn_wmt_func_on(WMTDRV_TYPE_GPS);
if(iRet == MTK_WCN_BOOL_FALSE){
break;
}
WMT_INFO_FUNC("#### FM On .... (%d, %d) \n", i, j);
iRet = mtk_wcn_wmt_func_on(WMTDRV_TYPE_FM);
if(iRet == MTK_WCN_BOOL_FALSE){
break;
}
WMT_INFO_FUNC("#### WIFI On .... (%d, %d) \n", i, j);
iRet = mtk_wcn_wmt_func_on(WMTDRV_TYPE_WIFI);
if(iRet == MTK_WCN_BOOL_FALSE){
break;
}
WMT_INFO_FUNC("#### BT Off .... (%d, %d) \n", i, j);
iRet = mtk_wcn_wmt_func_off(WMTDRV_TYPE_BT);
if(iRet == MTK_WCN_BOOL_FALSE){
break;
}
WMT_INFO_FUNC("#### GPS Off ....(%d, %d) \n", i, j);
iRet = mtk_wcn_wmt_func_off(WMTDRV_TYPE_GPS);
if(iRet == MTK_WCN_BOOL_FALSE){
break;
}
WMT_INFO_FUNC("#### FM Off .... (%d, %d) \n", i, j);
iRet = mtk_wcn_wmt_func_off(WMTDRV_TYPE_FM);
if(iRet == MTK_WCN_BOOL_FALSE){
break;
}
WMT_INFO_FUNC("#### WIFI Off ....(%d, %d) \n", i, j);
iRet = mtk_wcn_wmt_func_off(WMTDRV_TYPE_WIFI);
if(iRet == MTK_WCN_BOOL_FALSE){
break;
}
}
if(iRet == MTK_WCN_BOOL_FALSE){
break;
}
}
if(iRet == MTK_WCN_BOOL_FALSE){
WMT_INFO_FUNC("#### UT FAIL!!\n");
} else {
WMT_INFO_FUNC("#### UT PASS!!\n");
}
return iRet;
}
static INT32 wmt_dev_dbg_write(struct file *file, const CHAR *buffer, ULONG count, void *data){
CHAR buf[256];
CHAR *pBuf;
ULONG len = count;
INT32 x = 0,y = 0, z=0;
CHAR *pToken = NULL;
CHAR *pDelimiter = " \t";
WMT_INFO_FUNC("write parameter len = %d\n\r", (INT32)len);
if(len >= osal_sizeof(buf)){
WMT_ERR_FUNC("input handling fail!\n");
len = osal_sizeof(buf) - 1;
return -1;
}
if(copy_from_user(buf, buffer, len)){
return -EFAULT;
}
buf[len] = '\0';
WMT_INFO_FUNC("write parameter data = %s\n\r", buf);
pBuf = buf;
pToken = osal_strsep(&pBuf, pDelimiter);
x = NULL != pToken ? osal_strtol(pToken, NULL, 16) : 0;
pToken = osal_strsep(&pBuf, "\t\n ");
if(pToken != NULL){
y = osal_strtol(pToken, NULL, 16);
WMT_INFO_FUNC("y = 0x%08x \n\r", y);
} else {
y = 3000;
/*efuse, register read write default value*/
if(0x11 == x || 0x12 == x || 0x13 == x) {
y = 0x80000000;
}
}
pToken = osal_strsep(&pBuf, "\t\n ");
if(pToken != NULL){
z = osal_strtol(pToken, NULL, 16);
} else {
z = 10;
/*efuse, register read write default value*/
if(0x11 == x || 0x12 == x || 0x13 == x) {
z = 0xffffffff;
}
}
WMT_INFO_FUNC("x(0x%08x), y(0x%08x), z(0x%08x)\n\r", x, y, z);
if (osal_array_size(wmt_dev_dbg_func) > x && NULL != wmt_dev_dbg_func[x])
{
(*wmt_dev_dbg_func[x])(x, y, z);
}
else
{
WMT_WARN_FUNC("no handler defined for command id(0x%08x)\n\r", x);
}
return len;
}
INT32 wmt_dev_dbg_setup(VOID)
{
gWmtDbgEntry = create_proc_entry(WMT_DBG_PROCNAME, 0664, NULL);
if(gWmtDbgEntry == NULL){
WMT_ERR_FUNC("Unable to create /proc entry\n\r");
return -1;
}
gWmtDbgEntry->read_proc = wmt_dev_dbg_read;
gWmtDbgEntry->write_proc = wmt_dev_dbg_write;
return 0;
}
INT32 wmt_dev_dbg_remove(VOID)
{
if (NULL != gWmtDbgEntry)
{
remove_proc_entry(WMT_DBG_PROCNAME, NULL);
}
#if CFG_WMT_PS_SUPPORT
wmt_lib_ps_deinit();
#endif
return 0;
}
#endif

View File

@@ -1,414 +0,0 @@
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
#ifdef DFT_TAG
#undef DFT_TAG
#endif
#define DFT_TAG "[WMT-EXP]"
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
#include "osal_typedef.h"
#include <wmt_exp.h>
#include <wmt_lib.h>
#include <hif_sdio.h>
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
static MTK_WCN_BOOL
mtk_wcn_wmt_func_ctrl (
ENUM_WMTDRV_TYPE_T type,
ENUM_WMT_OPID_T opId
);
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
static MTK_WCN_BOOL
mtk_wcn_wmt_func_ctrl (
ENUM_WMTDRV_TYPE_T type,
ENUM_WMT_OPID_T opId
)
{
P_OSAL_OP pOp;
MTK_WCN_BOOL bRet;
P_OSAL_SIGNAL pSignal;
pOp = wmt_lib_get_free_op();
if (!pOp) {
WMT_WARN_FUNC("get_free_lxop fail\n");
return MTK_WCN_BOOL_FALSE;
}
pSignal = &pOp->signal;
pOp->op.opId = opId;
pOp->op.au4OpData[0] = type;
pSignal->timeoutValue= (WMT_OPID_FUNC_ON == pOp->op.opId) ? MAX_FUNC_ON_TIME : MAX_FUNC_OFF_TIME;
WMT_INFO_FUNC("OPID(%d) type(%d) start\n",
pOp->op.opId,
pOp->op.au4OpData[0]);
/*do not check return value, we will do this either way*/
wmt_lib_host_awake_get();
/*wake up chip first*/
if (DISABLE_PSM_MONITOR()) {
WMT_ERR_FUNC("wake up failed\n");
wmt_lib_put_op_to_free_queue(pOp);
return MTK_WCN_BOOL_FALSE;
}
bRet = wmt_lib_put_act_op(pOp);
ENABLE_PSM_MONITOR();
wmt_lib_host_awake_put();
if (MTK_WCN_BOOL_FALSE == bRet) {
WMT_WARN_FUNC("OPID(%d) type(%d) fail\n",
pOp->op.opId,
pOp->op.au4OpData[0]);
}
else {
WMT_INFO_FUNC("OPID(%d) type(%d) ok\n",
pOp->op.opId,
pOp->op.au4OpData[0]);
}
return bRet;
}
MTK_WCN_BOOL
mtk_wcn_wmt_func_off (
ENUM_WMTDRV_TYPE_T type
)
{
MTK_WCN_BOOL ret;
if(type == WMTDRV_TYPE_BT)
{
osal_printtimeofday("############ BT OFF ====>");
}
ret = mtk_wcn_wmt_func_ctrl(type, WMT_OPID_FUNC_OFF);
if(type == WMTDRV_TYPE_BT)
{
osal_printtimeofday("############ BT OFF <====");
}
return ret;
}
MTK_WCN_BOOL
mtk_wcn_wmt_func_on (
ENUM_WMTDRV_TYPE_T type
)
{
MTK_WCN_BOOL ret;
if(type == WMTDRV_TYPE_BT)
{
osal_printtimeofday("############ BT ON ====>");
}
ret = mtk_wcn_wmt_func_ctrl(type, WMT_OPID_FUNC_ON);
if(type == WMTDRV_TYPE_BT)
{
osal_printtimeofday(" ############BT ON <====");
}
return ret;
}
/*
return value:
enable/disable thermal sensor function: true(1)/false(0)
read thermal sensor function:thermal value
*/
INT8
mtk_wcn_wmt_therm_ctrl (
ENUM_WMTTHERM_TYPE_T eType
)
{
P_OSAL_OP pOp;
P_WMT_OP pOpData;
MTK_WCN_BOOL bRet;
P_OSAL_SIGNAL pSignal;
/*parameter validation check*/
if( WMTTHERM_MAX < eType || WMTTHERM_ENABLE > eType){
WMT_ERR_FUNC("invalid thermal control command (%d)\n", eType);
return MTK_WCN_BOOL_FALSE;
}
/*check if chip support thermal control function or not*/
bRet = wmt_lib_is_therm_ctrl_support();
if (MTK_WCN_BOOL_FALSE == bRet) {
WMT_ERR_FUNC("thermal ctrl function not supported\n");
return MTK_WCN_BOOL_FALSE;
}
pOp = wmt_lib_get_free_op();
if (!pOp) {
WMT_WARN_FUNC("get_free_lxop fail \n");
return MTK_WCN_BOOL_FALSE;
}
pSignal = &pOp->signal;
pOpData = &pOp->op;
pOpData->opId = WMT_OPID_THERM_CTRL;
/*parameter fill*/
pOpData->au4OpData[0] = eType;
pSignal->timeoutValue = MAX_EACH_WMT_CMD;
WMT_INFO_FUNC("OPID(%d) type(%d) start\n",
pOp->op.opId,
pOp->op.au4OpData[0]);
if (DISABLE_PSM_MONITOR()) {
WMT_ERR_FUNC("wake up failed\n");
wmt_lib_put_op_to_free_queue(pOp);
return -1;
}
bRet = wmt_lib_put_act_op(pOp);
ENABLE_PSM_MONITOR();
if (MTK_WCN_BOOL_FALSE == bRet) {
WMT_WARN_FUNC("OPID(%d) type(%d) fail\n\n",
pOpData->opId,
pOpData->au4OpData[0]);
/*0xFF means read error occurs*/
pOpData->au4OpData[1] = (eType == WMTTHERM_READ) ? 0xFF : MTK_WCN_BOOL_FALSE;/*will return to function driver*/
}
else {
WMT_INFO_FUNC("OPID(%d) type(%d) return(%d) ok\n\n",
pOpData->opId,
pOpData->au4OpData[0],
pOpData->au4OpData[1]);
}
/*return value will be put to lxop->op.au4OpData[1]*/
WMT_DBG_FUNC("therm ctrl type(%d), iRet(0x%08x) \n", eType, pOpData->au4OpData[1]);
return (INT8)pOpData->au4OpData[1];
}
ENUM_WMTHWVER_TYPE_T
mtk_wcn_wmt_hwver_get (VOID)
{
// TODO: [ChangeFeature][GeorgeKuo] Reconsider usage of this type
// TODO: how do we extend for new chip and newer revision?
// TODO: This way is hard to extend
return wmt_lib_get_icinfo(WMTCHIN_MAPPINGHWVER);
}
MTK_WCN_BOOL
mtk_wcn_wmt_dsns_ctrl (
ENUM_WMTDSNS_TYPE_T eType
)
{
P_OSAL_OP pOp;
P_WMT_OP pOpData;
MTK_WCN_BOOL bRet;
P_OSAL_SIGNAL pSignal;
if (WMTDSNS_MAX <= eType) {
WMT_ERR_FUNC("invalid desense control command (%d)\n", eType);
return MTK_WCN_BOOL_FALSE;
}
/*check if chip support thermal control function or not*/
bRet = wmt_lib_is_dsns_ctrl_support();
if (MTK_WCN_BOOL_FALSE == bRet) {
WMT_ERR_FUNC("thermal ctrl function not supported\n");
return MTK_WCN_BOOL_FALSE;
}
pOp = wmt_lib_get_free_op();
if (!pOp) {
WMT_WARN_FUNC("get_free_lxop fail \n");
return MTK_WCN_BOOL_FALSE;
}
pSignal = &pOp->signal;
pOpData = &pOp->op;
pOpData->opId = WMT_OPID_DSNS;
pSignal->timeoutValue = MAX_EACH_WMT_CMD;
/*parameter fill*/
if ((WMTDSNS_FM_DISABLE <= eType) && (WMTDSNS_FM_GPS_ENABLE >= eType)) {
pOpData->au4OpData[0] = WMTDRV_TYPE_FM;
pOpData->au4OpData[1] = eType;
}
WMT_INFO_FUNC("OPID(%d) type(%d) start\n",
pOp->op.opId,
pOp->op.au4OpData[0]);
if (DISABLE_PSM_MONITOR()) {
WMT_ERR_FUNC("wake up failed\n");
wmt_lib_put_op_to_free_queue(pOp);
return MTK_WCN_BOOL_FALSE;
}
bRet = wmt_lib_put_act_op(pOp);
ENABLE_PSM_MONITOR();
if (MTK_WCN_BOOL_FALSE == bRet) {
WMT_WARN_FUNC("OPID(%d) type(%d) fail\n\n",
pOpData->opId,
pOpData->au4OpData[0]);
}
else {
WMT_INFO_FUNC("OPID(%d) type(%d) ok\n\n",
pOpData->opId,
pOpData->au4OpData[0]);
}
return bRet;
}
INT32
mtk_wcn_wmt_msgcb_reg (
ENUM_WMTDRV_TYPE_T eType,
PF_WMT_CB pCb
)
{
return (INT32)wmt_lib_msgcb_reg(eType, pCb);
}
INT32
mtk_wcn_wmt_msgcb_unreg (
ENUM_WMTDRV_TYPE_T eType
)
{
return (INT32)wmt_lib_msgcb_unreg(eType);
}
INT32
mtk_wcn_stp_wmt_sdio_op_reg (
PF_WMT_SDIO_PSOP own_cb
)
{
wmt_lib_ps_set_sdio_psop(own_cb);
return 0;
}
INT32
mtk_wcn_stp_wmt_sdio_host_awake(
VOID
)
{
wmt_lib_ps_irq_cb();
return 0;
}
MTK_WCN_BOOL mtk_wcn_wmt_assert (
void
)
{
P_OSAL_OP pOp = NULL;
MTK_WCN_BOOL bRet = MTK_WCN_BOOL_FALSE;
P_OSAL_SIGNAL pSignal;
pOp = wmt_lib_get_free_op();
if (!pOp ) {
WMT_WARN_FUNC("get_free_lxop fail\n");
return MTK_WCN_BOOL_FALSE;
}
pSignal = &pOp ->signal;
pOp ->op.opId = WMT_OPID_CMD_TEST;
pSignal->timeoutValue= MAX_EACH_WMT_CMD;
/*this test command should be run with usb cable connected, so no host awake is needed*/
//wmt_lib_host_awake_get();
pOp->op.au4OpData[0] = 0;
/*wake up chip first*/
if (DISABLE_PSM_MONITOR()) {
WMT_ERR_FUNC("wake up failed\n");
wmt_lib_put_op_to_free_queue(pOp);
return MTK_WCN_BOOL_FALSE;
}
bRet = wmt_lib_put_act_op(pOp);
ENABLE_PSM_MONITOR();
//wmt_lib_host_awake_put();
WMT_INFO_FUNC("CMD_TEST, opid (%d), par(%d, %d), ret(%d), result(%s)\n", \
pOp->op.opId, \
pOp->op.au4OpData[0], \
pOp->op.au4OpData[1], \
bRet, \
MTK_WCN_BOOL_FALSE == bRet ? "failed" : "succeed"\
);
return bRet;
}
extern INT32 mtk_wcn_wmt_chipid_query (VOID)
{
return mtk_wcn_hif_sdio_query_chipid(0);
}
EXPORT_SYMBOL(mtk_wcn_wmt_assert);
EXPORT_SYMBOL(mtk_wcn_stp_wmt_sdio_host_awake);
EXPORT_SYMBOL(mtk_wcn_stp_wmt_sdio_op_reg);
EXPORT_SYMBOL(mtk_wcn_wmt_msgcb_unreg);
EXPORT_SYMBOL(mtk_wcn_wmt_msgcb_reg);
EXPORT_SYMBOL(mtk_wcn_wmt_dsns_ctrl);
EXPORT_SYMBOL(mtk_wcn_wmt_hwver_get);
EXPORT_SYMBOL(mtk_wcn_wmt_therm_ctrl);
EXPORT_SYMBOL(mtk_wcn_wmt_func_on);
EXPORT_SYMBOL(mtk_wcn_wmt_func_off);
EXPORT_SYMBOL(mtk_wcn_wmt_chipid_query);

View File

@@ -1,510 +0,0 @@
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
#ifdef DFT_TAG
#undef DFT_TAG
#endif
#define DFT_TAG "[WMT-FUNC]"
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
#include "osal_typedef.h"
#include "wmt_func.h"
#include "wmt_lib.h"
#include "wmt_core.h"
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
#if CFG_FUNC_BT_SUPPORT
static INT32 wmt_func_bt_on(P_WMT_IC_OPS pOps, P_WMT_GEN_CONF pConf);
static INT32 wmt_func_bt_off(P_WMT_IC_OPS pOps, P_WMT_GEN_CONF pConf);
WMT_FUNC_OPS wmt_func_bt_ops = {
//BT subsystem function on/off
.func_on = wmt_func_bt_on,
.func_off = wmt_func_bt_off
};
#endif
#if CFG_FUNC_FM_SUPPORT
static INT32 wmt_func_fm_on(P_WMT_IC_OPS pOps, P_WMT_GEN_CONF pConf);
static INT32 wmt_func_fm_off(P_WMT_IC_OPS pOps, P_WMT_GEN_CONF pConf);
WMT_FUNC_OPS wmt_func_fm_ops = {
//FM subsystem function on/off
.func_on = wmt_func_fm_on,
.func_off = wmt_func_fm_off
};
#endif
#if CFG_FUNC_GPS_SUPPORT
static INT32 wmt_func_gps_on(P_WMT_IC_OPS pOps, P_WMT_GEN_CONF pConf);
static INT32 wmt_func_gps_off(P_WMT_IC_OPS pOps, P_WMT_GEN_CONF pConf);
WMT_FUNC_OPS wmt_func_gps_ops = {
//GPS subsystem function on/off
.func_on = wmt_func_gps_on,
.func_off = wmt_func_gps_off
};
#endif
#if CFG_FUNC_WIFI_SUPPORT
static INT32 wmt_func_wifi_on(P_WMT_IC_OPS pOps, P_WMT_GEN_CONF pConf);
static INT32 wmt_func_wifi_off(P_WMT_IC_OPS pOps, P_WMT_GEN_CONF pConf);
WMT_FUNC_OPS wmt_func_wifi_ops = {
//Wi-Fi subsystem function on/off
.func_on = wmt_func_wifi_on,
.func_off = wmt_func_wifi_off
};
#endif
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
#if CFG_FUNC_GPS_SUPPORT
CMB_PIN_CTRL_REG eediPinOhRegs[] = {
{
//pull down ctrl register
.regAddr = 0x80050020,
.regValue = ~(0x1UL << 5),
.regMask = 0x00000020UL,
},
{
//pull up ctrl register
.regAddr = 0x80050000,
.regValue = 0x1UL << 5,
.regMask = 0x00000020UL,
},
{
//iomode ctrl register
.regAddr = 0x80050110,
.regValue = 0x1UL << 0,
.regMask = 0x00000007UL,
},
{
//output high/low ctrl register
.regAddr = 0x80050040,
.regValue = 0x1UL << 5,
.regMask = 0x00000020UL,
}
};
CMB_PIN_CTRL_REG eediPinOlRegs[] = {
{
.regAddr = 0x80050020,
.regValue = 0x1UL << 5,
.regMask = 0x00000020UL,
},
{
.regAddr = 0x80050000,
.regValue = ~(0x1UL << 5),
.regMask = 0x00000020UL,
},
{
.regAddr = 0x80050110,
.regValue = 0x1UL << 0,
.regMask = 0x00000007UL,
},
{
.regAddr = 0x80050040,
.regValue = ~(0x1UL << 5),
.regMask = 0x00000020UL,
}
};
CMB_PIN_CTRL_REG eedoPinOhRegs[] =
{
{
.regAddr = 0x80050020,
.regValue = ~(0x1UL << 7),
.regMask = 0x00000080UL,
},
{
.regAddr = 0x80050000,
.regValue = 0x1UL << 7,
.regMask = 0x00000080UL,
},
{
.regAddr = 0x80050110,
.regValue = 0x1UL << 12,
.regMask = 0x00007000UL,
},
{
.regAddr = 0x80050040,
.regValue = 0x1UL << 7,
.regMask = 0x00000080UL,
}
};
CMB_PIN_CTRL_REG eedoPinOlRegs[] =
{
{
.regAddr = 0x80050020,
.regValue = 0x1UL << 7,
.regMask = 0x00000080UL,
},
{
.regAddr = 0x80050000,
.regValue = ~(0x1UL << 7),
.regMask = 0x00000080UL,
},
{
.regAddr = 0x80050110,
.regValue = 0x1UL << 12,
.regMask = 0x00007000UL,
},
{
.regAddr = 0x80050040,
.regValue = ~(0x1UL << 7),
.regMask = 0x00000080UL,
}
};
CMB_PIN_CTRL_REG gsyncPinOnRegs[] =
{
{
.regAddr = 0x80050110,
.regValue = 0x3UL << 20,
.regMask = 0x7UL << 20,
}
};
CMB_PIN_CTRL_REG gsyncPinOffRegs[] =
{
{
.regAddr = 0x80050110,
.regValue = 0x0UL << 20,
.regMask = 0x7UL << 20,
}
};
//templete usage for GPIO control
CMB_PIN_CTRL gCmbPinCtrl[3] =
{
{
.pinId = CMB_PIN_EEDI_ID,
.regNum = 4,
.pFuncOnArray = eediPinOhRegs,
.pFuncOffArray = eediPinOlRegs,
},
{
.pinId = CMB_PIN_EEDO_ID,
.regNum = 4,
.pFuncOnArray = eedoPinOhRegs,
.pFuncOffArray = eedoPinOlRegs,
},
{
.pinId = CMB_PIN_GSYNC_ID,
.regNum = 1,
.pFuncOnArray = gsyncPinOnRegs,
.pFuncOffArray = gsyncPinOffRegs,
}
};
#endif
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
#if CFG_FUNC_BT_SUPPORT
INT32 _osal_inline_ wmt_func_bt_ctrl(ENUM_FUNC_STATE funcState)
{
/*only need to send turn BT subsystem wmt command*/
return wmt_core_func_ctrl_cmd(WMTDRV_TYPE_BT, (FUNC_ON == funcState) ? MTK_WCN_BOOL_TRUE : MTK_WCN_BOOL_FALSE);
}
INT32 wmt_func_bt_on(P_WMT_IC_OPS pOps, P_WMT_GEN_CONF pConf)
{
//return wmt_func_bt_ctrl(FUNC_ON);
return wmt_core_func_ctrl_cmd(WMTDRV_TYPE_BT, MTK_WCN_BOOL_TRUE);
}
INT32 wmt_func_bt_off(P_WMT_IC_OPS pOps, P_WMT_GEN_CONF pConf)
{
//return wmt_func_bt_ctrl(FUNC_OFF);
return wmt_core_func_ctrl_cmd(WMTDRV_TYPE_BT, MTK_WCN_BOOL_FALSE);
}
#endif
#if CFG_FUNC_GPS_SUPPORT
INT32 _osal_inline_ wmt_func_gps_ctrl (ENUM_FUNC_STATE funcState)
{
/*send turn GPS subsystem wmt command*/
return wmt_core_func_ctrl_cmd(WMTDRV_TYPE_GPS, (FUNC_ON == funcState) ? MTK_WCN_BOOL_TRUE : MTK_WCN_BOOL_FALSE);
}
INT32 wmt_func_gps_pre_ctrl(P_WMT_IC_OPS pOps, P_WMT_GEN_CONF pConf, ENUM_FUNC_STATE funcStatus)
{
UINT32 i = 0;
UINT32 iRet =0;
UINT32 regAddr = 0;
UINT32 regValue = 0;
UINT32 regMask = 0;
UINT32 regNum = 0;
P_CMB_PIN_CTRL_REG pReg;
P_CMB_PIN_CTRL pCmbPinCtrl;
WMT_CTRL_DATA ctrlData;
WMT_IC_PIN_ID wmtIcPinId = WMT_IC_PIN_MAX;
//sanity check
if (FUNC_ON != funcStatus && FUNC_OFF != funcStatus)
{
WMT_ERR_FUNC("invalid funcStatus(%d)\n", funcStatus);
return -1;
}
//turn on GPS sync function on both side
ctrlData.ctrlId = WMT_CTRL_GPS_SYNC_SET;
ctrlData.au4CtrlData[0] = (FUNC_ON == funcStatus) ? 1 : 0;
iRet = wmt_ctrl(&ctrlData) ;
if (iRet) {
/*we suppose this would never print*/
WMT_ERR_FUNC("ctrl GPS_SYNC_SET(%d) fail, ret(%d)\n", funcStatus, iRet);
// TODO:[FixMe][George] error handling?
return -2;
}
else {
WMT_INFO_FUNC("ctrl GPS_SYNC_SET(%d) ok \n", funcStatus);
}
if((NULL == pOps->ic_pin_ctrl) ||
(0 > pOps->ic_pin_ctrl(
WMT_IC_PIN_GSYNC,
FUNC_ON == funcStatus ? WMT_IC_PIN_MUX : WMT_IC_PIN_GPIO,
1)))/*WMT_IC_PIN_GSYNC*/
{
pCmbPinCtrl = &gCmbPinCtrl[CMB_PIN_GSYNC_ID];
regNum = pCmbPinCtrl->regNum;
for (i = 0; i < regNum; i++)
{
pReg = FUNC_ON == funcStatus ? &pCmbPinCtrl->pFuncOnArray[i] : &pCmbPinCtrl->pFuncOffArray[i];
regAddr = pReg->regAddr;
regValue = pReg->regValue;
regMask = pReg->regMask;
iRet = wmt_core_reg_rw_raw(1, regAddr, &regValue, regMask);
if (iRet) {
WMT_ERR_FUNC("set reg for GPS_SYNC function fail(%d) \n", iRet);
//TODO:[FixMe][Chaozhong] error handling?
return -2;
}
}
}
else
{
WMT_INFO_FUNC("set reg for GPS_SYNC function okay by chip ic_pin_ctrl\n");
}
WMT_INFO_FUNC("ctrl combo chip gps sync function succeed\n");
//turn on GPS lna ctrl function
if (NULL != pConf)
{
if (0 == pConf->wmt_gps_lna_enable)
{
WMT_INFO_FUNC("host pin used for gps lna\n");
//host LNA ctrl pin needed
ctrlData.ctrlId = WMT_CTRL_GPS_LNA_SET;
ctrlData.au4CtrlData[0] = FUNC_ON == funcStatus ? 1 : 0 ;
iRet = wmt_ctrl(&ctrlData) ;
if (iRet) {
/*we suppose this would never print*/
WMT_ERR_FUNC("ctrl host GPS_LNA output high fail, ret(%d)\n", iRet);
// TODO:[FixMe][Chaozhong] error handling?
return -3;
}
else {
WMT_INFO_FUNC("ctrl host gps lna function succeed\n");
}
}
else
{
WMT_INFO_FUNC("combo chip pin(%s) used for gps lna\n", 0 == pConf->wmt_gps_lna_pin ? "EEDI" : "EEDO");
wmtIcPinId = 0 == pConf->wmt_gps_lna_pin ? WMT_IC_PIN_EEDI: WMT_IC_PIN_EEDO;
if((NULL == pOps->ic_pin_ctrl) ||
(0 > pOps->ic_pin_ctrl(
wmtIcPinId,
FUNC_ON == funcStatus ? WMT_IC_PIN_GPIO_HIGH : WMT_IC_PIN_GPIO_LOW,
1)))/*WMT_IC_PIN_GSYNC*/
{
if (0 == pConf->wmt_gps_lna_pin)
{
//EEDI needed
pCmbPinCtrl = &gCmbPinCtrl[CMB_PIN_EEDI_ID];
}
else if (1 == pConf->wmt_gps_lna_pin)
{
//EEDO needed
pCmbPinCtrl = &gCmbPinCtrl[CMB_PIN_EEDO_ID];
}
regNum = pCmbPinCtrl->regNum;
for (i = 0; i < regNum; i++)
{
pReg = FUNC_ON == funcStatus ? &pCmbPinCtrl->pFuncOnArray[i] : &pCmbPinCtrl->pFuncOffArray[i];
regAddr = pReg->regAddr;
regValue = pReg->regValue;
regMask = pReg->regMask;
iRet = wmt_core_reg_rw_raw(1, regAddr, &regValue, regMask);
if (iRet) {
WMT_ERR_FUNC("set reg for GPS_LNA function fail(%d) \n", iRet);
//TODO:[FixMe][Chaozhong] error handling?
return -3;
}
}
WMT_INFO_FUNC("ctrl combo chip gps lna succeed\n");
}
else
{
WMT_INFO_FUNC("set reg for GPS_LNA function okay by chip ic_pin_ctrl\n");
}
}
}
return 0;
}
INT32 wmt_func_gps_pre_on(P_WMT_IC_OPS pOps, P_WMT_GEN_CONF pConf)
{
return wmt_func_gps_pre_ctrl(pOps, pConf, FUNC_ON);
}
INT32 wmt_func_gps_pre_off(P_WMT_IC_OPS pOps, P_WMT_GEN_CONF pConf)
{
return wmt_func_gps_pre_ctrl(pOps, pConf, FUNC_OFF);
}
INT32 wmt_func_gps_on(P_WMT_IC_OPS pOps, P_WMT_GEN_CONF pConf)
{
INT32 iRet = 0;
iRet = wmt_func_gps_pre_on(pOps, pConf);
if (0 == iRet)
{
iRet = wmt_func_gps_ctrl(FUNC_ON);
}
return iRet;
}
INT32 wmt_func_gps_off(P_WMT_IC_OPS pOps, P_WMT_GEN_CONF pConf)
{
INT32 iRet = 0;
iRet = wmt_func_gps_pre_off(pOps, pConf);
if (0 == iRet)
{
iRet = wmt_func_gps_ctrl(FUNC_OFF);
}
return iRet;
}
#endif
#if CFG_FUNC_FM_SUPPORT
INT32 _osal_inline_ wmt_func_fm_ctrl(ENUM_FUNC_STATE funcState)
{
/*only need to send turn FM subsystem wmt command*/
return wmt_core_func_ctrl_cmd(WMTDRV_TYPE_FM, (FUNC_ON == funcState) ? MTK_WCN_BOOL_TRUE : MTK_WCN_BOOL_FALSE);
}
INT32 wmt_func_fm_on(P_WMT_IC_OPS pOps, P_WMT_GEN_CONF pConf)
{
//return wmt_func_fm_ctrl(FUNC_ON);
return wmt_core_func_ctrl_cmd(WMTDRV_TYPE_FM, MTK_WCN_BOOL_TRUE);
}
INT32 wmt_func_fm_off(P_WMT_IC_OPS pOps, P_WMT_GEN_CONF pConf)
{
//return wmt_func_fm_ctrl(FUNC_OFF);
return wmt_core_func_ctrl_cmd(WMTDRV_TYPE_FM, MTK_WCN_BOOL_FALSE);
}
#endif
#if CFG_FUNC_WIFI_SUPPORT
INT32
wmt_func_wifi_ctrl (
ENUM_FUNC_STATE funcState
)
{
INT32 iRet = 0;
UINT32 ctrlPa1 = WMT_SDIO_FUNC_WIFI;
UINT32 ctrlPa2 = (FUNC_ON == funcState) ? 1 : 0; /* turn on Wi-Fi driver */
iRet = wmt_core_ctrl(WMT_CTRL_SDIO_FUNC, &ctrlPa1, &ctrlPa2) ;
if (iRet) {
WMT_ERR_FUNC("WMT-FUNC: turn on WIFI function fail (%d)", iRet);
return -1;
}
return 0;
}
INT32 wmt_func_wifi_on(P_WMT_IC_OPS pOps, P_WMT_GEN_CONF pConf)
{
return wmt_func_wifi_ctrl(FUNC_ON);
}
INT32 wmt_func_wifi_off(P_WMT_IC_OPS pOps, P_WMT_GEN_CONF pConf)
{
return wmt_func_wifi_ctrl(FUNC_OFF);
}
#endif

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@@ -1,90 +0,0 @@
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
#ifndef _MTK_WCN_CMB_HW_H_
#define _MTK_WCN_CMB_HW_H_
#include "osal_typedef.h"
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
typedef struct _PWR_SEQ_TIME_
{
UINT32 rtcStableTime;
UINT32 ldoStableTime;
UINT32 rstStableTime;
UINT32 offStableTime;
UINT32 onStableTime;
}PWR_SEQ_TIME, *P_PWR_SEQ_TIME;
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
extern INT32 mtk_wcn_cmb_hw_pwr_off (VOID);
extern INT32 mtk_wcn_cmb_hw_pwr_on (VOID);
extern INT32 mtk_wcn_cmb_hw_rst (VOID);
extern INT32 mtk_wcn_cmb_hw_init (P_PWR_SEQ_TIME pPwrSeqTime);
extern INT32 mtk_wcn_cmb_hw_deinit (VOID);
extern INT32 mtk_wcn_cmb_hw_state_show(VOID);
#endif /* _MTK_WCN_CMB_HW_H_ */

View File

@@ -1,227 +0,0 @@
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
#ifndef _STP_EXP_H_
#define _STP_EXP_H_
#include "osal_typedef.h"
#include "osal.h"
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
#define BT_TASK_INDX (0)
#define FM_TASK_INDX (1)
#define GPS_TASK_INDX (2)
#define WIFI_TASK_INDX (3)
#define WMT_TASK_INDX (4)
#define STP_TASK_INDX (5)
#define INFO_TASK_INDX (6)
#define MTKSTP_MAX_TASK_NUM (7)
#define MTKSTP_BUFFER_SIZE (16384) //Size of RX Queue
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
typedef void (*MTK_WCN_STP_EVENT_CB)(void);
typedef INT32 (*MTK_WCN_STP_IF_TX)(const UINT8 *data, const UINT32 size, UINT32 *written_size);
/* export for HIF driver */
typedef void (*MTK_WCN_STP_IF_RX)(const UINT8 *data, INT32 size);
typedef enum {
STP_UART_IF_TX = 0,
STP_SDIO_IF_TX,
STP_MAX_IF_TX
}ENUM_STP_TX_IF_TYPE;
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_receive_data
* DESCRIPTION
* receive data from serial protocol engine
* PARAMETERS
* buffer [IN] data buffer
* length [IN] data buffer length
* RETURNS
* INT32 >= 0: size of data received; < 0: error
*****************************************************************************/
extern INT32 mtk_wcn_stp_receive_data(UINT8 *buffer, UINT32 length, UINT8 type);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_send_data
* DESCRIPTION
* subfunction send data through STP
* PARAMETERS
* buffer [IN] data buffer
* length [IN] data buffer length
* type [IN] subfunction type
* RETURNS
* INT32 >= 0: length transmitted; < 0: error
*****************************************************************************/
extern INT32 mtk_wcn_stp_send_data(const UINT8 *buffer, const UINT32 length, const UINT8 type);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_is_rxqueue_empty
* DESCRIPTION
* Is certain rx queue empty?
* PARAMETERS
* type [IN] subfunction type
* RETURNS
* INT32 0: queue is NOT empyt; !0: queue is empty
*****************************************************************************/
extern MTK_WCN_BOOL mtk_wcn_stp_is_rxqueue_empty(UINT8 type);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_is_enable
* DESCRIPTION
* Is STP ready?
* PARAMETERS
* none.
* RETURNS
* MTK_WCN_BOOL TRUE:ready, FALSE:not ready
*****************************************************************************/
extern MTK_WCN_BOOL mtk_wcn_stp_is_ready(void);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_parser_data
* DESCRIPTION
* push data to serial transport protocol parser engine
* PARAMETERS
* buffer [IN] data buffer
* length [IN] data buffer length
* RETURNS
* void
*****************************************************************************/
extern INT32 mtk_wcn_stp_parser_data(UINT8 *buffer, UINT32 length);
/*****************************************************************************
* FUNCTION
* set_bluetooth_rx_interface
* DESCRIPTION
* Set bluetooth rx interface
* PARAMETERS
* rx interface type
* RETURNS
* void
*****************************************************************************/
extern void mtk_wcn_stp_set_bluez(MTK_WCN_BOOL sdio_flag);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_register_tx_event_cb
* DESCRIPTION
* regiter Tx event callback function
* PARAMETERS
* func
* RETURNS
* INT32: 0:successful , -1: fail
*****************************************************************************/
extern INT32 mtk_wcn_stp_register_tx_event_cb(INT32 type, MTK_WCN_STP_EVENT_CB func);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_register_event_cb
* DESCRIPTION
* regiter Rx event callback function
* PARAMETERS
* func
* RETURNS
* INT32: 0:successful , -1: fail
*****************************************************************************/
extern INT32 mtk_wcn_stp_register_event_cb(INT32 type, MTK_WCN_STP_EVENT_CB func);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_register_if_tx
* DESCRIPTION
* regiter Tx event callback function
* PARAMETERS
* stp_if: SDIO or UART, fnnc: Call back function
* RETURNS
* INT32: 0:successful , -1: fail
*****************************************************************************/
extern INT32 mtk_wcn_stp_register_if_tx(ENUM_STP_TX_IF_TYPE stp_if, MTK_WCN_STP_IF_TX func);
/*****************************************************************************
* FUNCTION
* mtk_wcn_stp_register_if_rx
* DESCRIPTION
* regiter Rx event callback function
* PARAMETERS
* stp_if: SDIO or UART, fnnc: Call back function
* RETURNS
* INT32: 0:successful , -1: fail
*****************************************************************************/
extern INT32 mtk_wcn_stp_register_if_rx(MTK_WCN_STP_IF_RX func);
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
#endif /* _WMT_EXP_H_ */

View File

@@ -1,8 +0,0 @@
#ifndef _MTKWMT_H_
#define _MTKWMT_H_
#include "wmt_core.h"
#endif /*_MTKWMT_H_*/

View File

@@ -1,257 +0,0 @@
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
#ifndef _WMT_EXP_H_
#define _WMT_EXP_H_
#include <mach/mtk_wcn_cmb_stub.h>
#include "osal.h"
//not to reference to internal wmt
//#include "wmt_core.h"
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
#if 1 /* moved from wmt_lib.h */
#ifndef DFT_TAG
#define DFT_TAG "[WMT-DFT]"
#endif
#define WMT_LOUD_FUNC(fmt, arg...) if (gWmtDbgLvl >= WMT_LOG_LOUD) { osal_dbg_print(DFT_TAG "[L]%s:" fmt, __FUNCTION__ ,##arg);}
#define WMT_INFO_FUNC(fmt, arg...) if (gWmtDbgLvl >= WMT_LOG_INFO) { osal_info_print(DFT_TAG "[I]%s:" fmt, __FUNCTION__ ,##arg);}
#define WMT_WARN_FUNC(fmt, arg...) if (gWmtDbgLvl >= WMT_LOG_WARN) { osal_warn_print(DFT_TAG "[W]%s:" fmt, __FUNCTION__ ,##arg);}
#define WMT_ERR_FUNC(fmt, arg...) if (gWmtDbgLvl >= WMT_LOG_ERR) { osal_err_print(DFT_TAG "[E]%s(%d):" fmt, __FUNCTION__ , __LINE__, ##arg);}
#define WMT_DBG_FUNC(fmt, arg...) if (gWmtDbgLvl >= WMT_LOG_DBG) { osal_dbg_print(DFT_TAG "[D]%s:" fmt, __FUNCTION__ ,##arg);}
#define WMT_TRC_FUNC(f) if (gWmtDbgLvl >= WMT_LOG_DBG) { osal_dbg_print(DFT_TAG "<%s> <%d>\n", __FUNCTION__, __LINE__);}
#endif
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
#if 1 /* moved from wmt_lib.h */
extern UINT32 gWmtDbgLvl ;
#endif
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
#if 1 /* moved from wmt_lib.h */
#define WMT_LOG_LOUD 4
#define WMT_LOG_DBG 3
#define WMT_LOG_INFO 2
#define WMT_LOG_WARN 1
#define WMT_LOG_ERR 0
#endif
#define CFG_WMT_PS_SUPPORT 1 /* moved from wmt_lib.h */
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
typedef enum _ENUM_WMTDRV_TYPE_T {
WMTDRV_TYPE_BT = 0,
WMTDRV_TYPE_FM = 1,
WMTDRV_TYPE_GPS = 2,
WMTDRV_TYPE_WIFI = 3,
WMTDRV_TYPE_WMT = 4,
WMTDRV_TYPE_STP = 5,
WMTDRV_TYPE_SDIO1 = 6,
WMTDRV_TYPE_SDIO2 = 7,
WMTDRV_TYPE_LPBK = 8,
WMTDRV_TYPE_COREDUMP = 9,
WMTDRV_TYPE_MAX
} ENUM_WMTDRV_TYPE_T, *P_ENUM_WMTDRV_TYPE_T;
// TODO: [ChangeFeature][GeorgeKuo] Reconsider usage of this type
// TODO: how do we extend for new chip and newer revision?
// TODO: This way is hard to extend
typedef enum _ENUM_WMTHWVER_TYPE_T{
WMTHWVER_MT6620_E1 = 0x0,
WMTHWVER_MT6620_E2 = 0x1,
WMTHWVER_MT6620_E3 = 0x2,
WMTHWVER_MT6620_E4 = 0x3,
WMTHWVER_MT6620_E5 = 0x4,
WMTHWVER_MT6620_E6 = 0x5,
WMTHWVER_MT6620_E7 = 0x6,
WMTHWVER_MT6620_MAX,
WMTHWVER_INVALID = 0xff
} ENUM_WMTHWVER_TYPE_T, *P_ENUM_WMTHWVER_TYPE_T;
typedef enum _ENUM_WMTCHIN_TYPE_T{
WMTCHIN_CHIPID = 0x0,
WMTCHIN_HWVER = WMTCHIN_CHIPID + 1,
WMTCHIN_MAPPINGHWVER = WMTCHIN_HWVER + 1,
WMTCHIN_FWVER = WMTCHIN_MAPPINGHWVER + 1,
WMTCHIN_MAX,
}ENUM_WMT_CHIPINFO_TYPE_T, *P_ENUM_WMT_CHIPINFO_TYPE_T;
typedef enum _ENUM_WMTDSNS_TYPE_T{
WMTDSNS_FM_DISABLE = 0,
WMTDSNS_FM_ENABLE = 1,
WMTDSNS_FM_GPS_DISABLE = 2,
WMTDSNS_FM_GPS_ENABLE = 3,
WMTDSNS_MAX
} ENUM_WMTDSNS_TYPE_T, *P_ENUM_WMTDSNS_TYPE_T;
typedef enum _ENUM_WMTTHERM_TYPE_T{
WMTTHERM_ZERO = 0,
WMTTHERM_ENABLE = WMTTHERM_ZERO + 1,
WMTTHERM_READ = WMTTHERM_ENABLE + 1,
WMTTHERM_DISABLE = WMTTHERM_READ + 1,
WMTTHERM_MAX
}ENUM_WMTTHERM_TYPE_T, *P_ENUM_WMTTHERM_TYPE_T;
typedef enum _ENUM_WMTMSG_TYPE_T {
WMTMSG_TYPE_POWER_ON = 0,
WMTMSG_TYPE_POWER_OFF = 1,
WMTMSG_TYPE_RESET = 2,
WMTMSG_TYPE_STP_RDY= 3,
WMTMSG_TYPE_HW_FUNC_ON= 4,
WMTMSG_TYPE_MAX
} ENUM_WMTMSG_TYPE_T, *P_ENUM_WMTMSG_TYPE_T;
typedef enum _ENUM_WMTRSTMSG_TYPE_T{
WMTRSTMSG_RESET_START = 0x0,
WMTRSTMSG_RESET_END = 0x1,
WMTRSTMSG_RESET_MAX,
WMTRSTMSG_RESET_INVALID = 0xff
} ENUM_WMTRSTMSG_TYPE_T, *P_ENUM_WMTRSTMSG_TYPE_T;
typedef void (*PF_WMT_CB)(
ENUM_WMTDRV_TYPE_T, /* Source driver type */
ENUM_WMTDRV_TYPE_T, /* Destination driver type */
ENUM_WMTMSG_TYPE_T, /* Message type */
VOID *, /* READ-ONLY buffer. Buffer is allocated and freed by WMT_drv. Client
can't touch this buffer after this function return. */
UINT32 /* Buffer size in unit of byte */
);
typedef enum _SDIO_PS_OP{
OWN_SET = 0,
OWN_CLR = 1,
OWN_STATE = 2,
} SDIO_PS_OP;
typedef INT32 (*PF_WMT_SDIO_PSOP)(SDIO_PS_OP);
#if 1 /* moved from wmt_core.h */
typedef enum {
WMT_SDIO_SLOT_INVALID = 0,
WMT_SDIO_SLOT_SDIO1 = 1, /* Wi-Fi dedicated SDIO1*/
WMT_SDIO_SLOT_SDIO2 = 2,
WMT_SDIO_SLOT_MAX
} WMT_SDIO_SLOT_NUM;
typedef enum {
WMT_SDIO_FUNC_STP = 0,
WMT_SDIO_FUNC_WIFI = 1,
WMT_SDIO_FUNC_MAX
} WMT_SDIO_FUNC_TYPE;
#endif
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
/*subsystem function ctrl APIs*/
extern MTK_WCN_BOOL
mtk_wcn_wmt_func_off (
ENUM_WMTDRV_TYPE_T type
);
extern MTK_WCN_BOOL
mtk_wcn_wmt_func_on (
ENUM_WMTDRV_TYPE_T type
);
extern MTK_WCN_BOOL mtk_wcn_wmt_dsns_ctrl (
ENUM_WMTDSNS_TYPE_T eType
);
extern MTK_WCN_BOOL mtk_wcn_wmt_assert (
VOID
);
extern INT32 mtk_wcn_wmt_msgcb_reg (
ENUM_WMTDRV_TYPE_T eType,
PF_WMT_CB pCb
);
extern INT32 mtk_wcn_wmt_msgcb_unreg (
ENUM_WMTDRV_TYPE_T eType
);
extern INT32
mtk_wcn_stp_wmt_sdio_op_reg (
PF_WMT_SDIO_PSOP own_cb
);
extern INT32
mtk_wcn_stp_wmt_sdio_host_awake(
VOID
);
/*
return value:
enable/disable thermal sensor function: true(1)/false(0)
read thermal sensor function: thermal value
*/
extern INT8
mtk_wcn_wmt_therm_ctrl (
ENUM_WMTTHERM_TYPE_T eType
);
extern ENUM_WMTHWVER_TYPE_T
mtk_wcn_wmt_hwver_get (VOID);
extern INT32
mtk_wcn_wmt_chipid_query (VOID);
extern INT32 wmt_lib_set_aif (
CMB_STUB_AIF_X aif,
MTK_WCN_BOOL share
); /* set AUDIO interface options */
extern VOID
wmt_lib_ps_irq_cb(VOID);
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
#endif /* _WMT_EXP_H_ */

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@@ -1,212 +0,0 @@
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
#ifndef _WMT_PLAT_H_
#define _WMT_PLAT_H_
#include "osal_typedef.h"
#include "osal.h"
#include <mach/mtk_wcn_cmb_stub.h>
#include "mtk_wcn_cmb_hw.h"
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
#if (CONFIG_ARCH_MT6589)
#if defined(MTK_MERGE_INTERFACE_SUPPORT) && defined(MT6628)
#define MTK_WCN_CMB_MERGE_INTERFACE_SUPPORT 1
#else
#define MTK_WCN_CMB_MERGE_INTERFACE_SUPPORT 0
#endif
#else
#define MTK_WCN_CMB_MERGE_INTERFACE_SUPPORT 0
#endif
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
#if 0 /* [GeorgeKuo] remove COMBO_AUDIO FLAG */
#define COMBO_AUDIO_BT_MASK (0x1UL)
#define COMBO_AUDIO_BT_PCM_ON (0x1UL << 0)
#define COMBO_AUDIO_BT_PCM_OFF (0x0UL << 0)
#define COMBO_AUDIO_FM_MASK (0x2UL)
#define COMBO_AUDIO_FM_LINEIN (0x0UL << 1)
#define COMBO_AUDIO_FM_I2S (0x1UL << 1)
#define COMBO_AUDIO_PIN_MASK (0x4UL)
#define COMBO_AUDIO_PIN_SHARE (0x1UL << 2)
#define COMBO_AUDIO_PIN_SEPARATE (0x0UL << 2)
#endif
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
typedef enum _ENUM_FUNC_STATE_{
FUNC_ON = 0,
FUNC_OFF = 1,
FUNC_RST = 2,
FUNC_STAT = 3,
FUNC_CTRL_MAX,
} ENUM_FUNC_STATE, *P_ENUM_FUNC_STATE;
typedef enum _ENUM_PIN_ID_{
PIN_LDO = 0,
PIN_PMU = 1,
PIN_RTC = 2,
PIN_RST = 3,
PIN_BGF_EINT = 4,
PIN_WIFI_EINT = 5,
PIN_ALL_EINT = 6,
PIN_UART_GRP = 7,
PIN_PCM_GRP = 8,
PIN_I2S_GRP = 9,
PIN_SDIO_GRP = 10,
PIN_GPS_SYNC = 11,
PIN_GPS_LNA = 12,
PIN_ID_MAX
} ENUM_PIN_ID, *P_ENUM_PIN_ID;
typedef enum _ENUM_PIN_STATE_{
PIN_STA_INIT = 0,
PIN_STA_OUT_L = 1,
PIN_STA_OUT_H = 2,
PIN_STA_IN_L = 3,
PIN_STA_MUX = 4,
PIN_STA_EINT_EN = 5,
PIN_STA_EINT_DIS = 6,
PIN_STA_DEINIT = 7,
PIN_STA_SHOW = 8,
PIN_STA_MAX
} ENUM_PIN_STATE, *P_ENUM_PIN_STATE;
typedef enum _CMB_IF_TYPE_{
CMB_IF_UART = 0,
CMB_IF_WIFI_SDIO = 1,
CMB_IF_BGF_SDIO = 2,
CMB_IF_BGWF_SDIO = 3,
CMB_IF_TYPE_MAX
} CMB_IF_TYPE, *P_CMB_IF_TYPE;
typedef INT32 (*fp_set_pin)(ENUM_PIN_STATE);
typedef enum _ENUM_WL_OP_{
WL_OP_GET = 0,
WL_OP_PUT = 1,
WL_OP_MAX
} ENUM_WL_OP, *P_ENUM_WL_OP;
typedef VOID (*irq_cb)(VOID);
typedef INT32 (*device_audio_if_cb) (CMB_STUB_AIF_X aif, MTK_WCN_BOOL share);
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
INT32
wmt_plat_init (P_PWR_SEQ_TIME pPwrSeqTime);
INT32
wmt_plat_deinit (VOID);
INT32
wmt_plat_irq_ctrl (
ENUM_FUNC_STATE state
);
INT32
wmt_plat_pwr_ctrl (
ENUM_FUNC_STATE state
);
INT32
wmt_plat_ps_ctrl (
ENUM_FUNC_STATE state
);
INT32
wmt_plat_gpio_ctrl (
ENUM_PIN_ID id,
ENUM_PIN_STATE state
);
INT32
wmt_plat_eirq_ctrl (
ENUM_PIN_ID id,
ENUM_PIN_STATE state
);
INT32
wmt_plat_sdio_ctrl (
UINT32 sdioPortNum,
ENUM_FUNC_STATE on
);
INT32
wmt_plat_wake_lock_ctrl(
ENUM_WL_OP opId
);
VOID wmt_lib_plat_irq_cb_reg (irq_cb bgf_irq_cb);
INT32
wmt_plat_audio_ctrl (
CMB_STUB_AIF_X state,
CMB_STUB_AIF_CTRL ctrl
);
VOID wmt_lib_plat_aif_cb_reg (device_audio_if_cb aif_ctrl_cb);
INT32
wmt_plat_merge_if_flag_ctrl (UINT32 enagle);
INT32
wmt_plat_merge_if_flag_get (VOID);
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
#endif /* _WMT_PLAT_H_ */

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@@ -1,13 +0,0 @@
#ifndef _WMT_PLAT_STUB_H_
#define _WMT_PLAT_STUB_H_
INT32
wmt_plat_audio_ctrl (
CMB_STUB_AIF_X state,
CMB_STUB_AIF_CTRL ctrl
);
INT32 wmt_plat_stub_init (void);
#endif /*_WMT_PLAT_STUB_H_*/

File diff suppressed because it is too large Load Diff

View File

@@ -1,354 +0,0 @@
#include "hif_sdio.h"
#include "hif_sdio_chrdev.h"
static int hif_sdio_proc(void * pvData);
static int hif_sdio_open(struct inode *inode, struct file *file);
static int hif_sdio_release(struct inode *inode, struct file *file);
static long hif_sdio_unlocked_ioctl(struct file *filp, unsigned int cmd, unsigned long arg);
static ssize_t hif_sdio_read(struct file *filp, char __user *buf, size_t count, loff_t *f_pos);
unsigned int hifSdioMajor = 0;
#define COMBO_IOC_MAGIC 'h'
#define COMBO_IOCTL_GET_CHIP_ID _IOR(COMBO_IOC_MAGIC, 0, int)
#define COMBO_IOCTL_SET_CHIP_ID _IOW(COMBO_IOC_MAGIC, 1, int)
MTK_WCN_HIF_SDIO_CHIP_INFO gChipInfoArray[] = {
/* MT6620 */ /* Not an SDIO standard class device */
{ {SDIO_DEVICE(0x037A, 0x020A)}, 0x6620 }, /* SDIO1:FUNC1:WIFI */
{ {SDIO_DEVICE(0x037A, 0x020B)}, 0x6620 }, /* SDIO2:FUNC1:BT+FM+GPS */
{ {SDIO_DEVICE(0x037A, 0x020C)}, 0x6620 }, /* 2-function (SDIO2:FUNC1:BT+FM+GPS, FUNC2:WIFI) */
/* MT6628 */ /* SDIO1: Wi-Fi, SDIO2: BGF */
{ {SDIO_DEVICE(0x037A, 0x6628)}, 0x6628},
};
struct file_operations hifDevOps =
{
.owner = THIS_MODULE,
.open = hif_sdio_open,
.release = hif_sdio_release,
.unlocked_ioctl = hif_sdio_unlocked_ioctl,
.read = hif_sdio_read,
};
struct class *pHifClass = NULL;
struct device *pHifDev = NULL;
UCHAR *HifClassName = "hifsdiod";
UCHAR *kObjName = "hifsdiod";
struct task_struct *gConIdQueryThread;
wait_queue_head_t gHifsdiodEvent;
//OSAL_THREAD gConIdQueryThread;
//OSAL_EVENT gHifsdiodEvent;
UCHAR *gConIdQueryName = "consys-id-query";
INT32 gComboChipId = -1;
INT32 hifsdiod_start(void)
{
int iRet = -1;
init_waitqueue_head(&gHifsdiodEvent);
#if 0
osal_event_init(&gHifsdiodEvent);
gConIdQueryThread.pThreadData = (VOID *)NULL;
gConIdQueryThread.pThreadFunc = (VOID *)hif_sdio_proc;
osal_memcpy(gConIdQueryThread.threadName, gConIdQueryName , osal_strlen(gConIdQueryName));
iRet = osal_thread_create(&gConIdQueryThread);
if (iRet < 0)
{
HIF_SDIO_ERR_FUNC("osal_thread_create fail...\n");
goto ERR_EXIT1;
}
#else
gConIdQueryThread = kthread_create(hif_sdio_proc, NULL, gConIdQueryName);
if (NULL == gConIdQueryThread)
{
HIF_SDIO_ERR_FUNC("osal_thread_create fail...\n");
goto ERR_EXIT1;
}
#endif
#if 0
/* Start STPd thread*/
iRet = osal_thread_run(&gConIdQueryThread);
if(iRet < 0)
{
HIF_SDIO_ERR_FUNC("osal_thread_run FAILS\n");
goto ERR_EXIT1;
}
#else
if (gConIdQueryThread) {
wake_up_process(gConIdQueryThread);
}
else
{
goto ERR_EXIT1;
}
#endif
iRet = 0;
HIF_SDIO_INFO_FUNC("succeed\n");
return iRet;
ERR_EXIT1:
HIF_SDIO_ERR_FUNC("failed\n");
return iRet;
}
INT32 hifsdiod_stop(void)
{
if (gConIdQueryThread) {
HIF_SDIO_INFO_FUNC("inform hifsdiod exit..\n");
kthread_stop(gConIdQueryThread);
gConIdQueryThread = NULL;
}
return 0;
}
static int hif_sdio_proc(void * pvData)
{
while (!kthread_should_stop())
{
//HIF_SDIO_INFO_FUNC("enter sleep.\n");
osal_msleep(10000);
//HIF_SDIO_INFO_FUNC("wakeup\n");
}
HIF_SDIO_INFO_FUNC("hifsdiod exit.\n");
return 0;
}
static int hif_sdio_open(struct inode *inode, struct file *file)
{
HIF_SDIO_INFO_FUNC(" ++\n");
HIF_SDIO_INFO_FUNC(" --\n");
return 0;
}
static int hif_sdio_release(struct inode *inode, struct file *file)
{
HIF_SDIO_INFO_FUNC(" ++\n");
HIF_SDIO_INFO_FUNC(" --\n");
return 0;
}
static ssize_t hif_sdio_read(struct file *filp, char __user *buf, size_t count, loff_t *f_pos)
{
HIF_SDIO_INFO_FUNC(" ++\n");
HIF_SDIO_INFO_FUNC(" --\n");
return 0;
}
static long hif_sdio_unlocked_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
{
int retval = 0;
HIF_SDIO_DBG_FUNC("cmd (%d)\n", cmd);
switch(cmd)
{
case COMBO_IOCTL_GET_CHIP_ID:
gComboChipId = 0x6628;
retval = gComboChipId;
HIF_SDIO_INFO_FUNC("get combo chip id: 0x%x\n", gComboChipId);
break;
case COMBO_IOCTL_SET_CHIP_ID:
gComboChipId = arg;
HIF_SDIO_INFO_FUNC("set combo chip id to 0x%x\n", gComboChipId);
break;
default:
HIF_SDIO_WARN_FUNC("unknown cmd (%d)\n", cmd);
retval = 0;
break;
}
return retval;
}
INT32 hif_sdio_is_chipid_valid (INT32 chipId)
{
INT32 index = -1;
INT32 left = 0;
INT32 middle = 0;
INT32 right = sizeof (gChipInfoArray) / sizeof (gChipInfoArray[0]) - 1;
if ((chipId < gChipInfoArray[left].chipId) || (chipId > gChipInfoArray[right].chipId))
return index;
middle = (left + right) / 2;
while (left <= right)
{
if (chipId > gChipInfoArray[middle].chipId)
{
left = middle + 1;
}
else if (chipId < gChipInfoArray[middle].chipId)
{
right = middle - 1;
}
else
{
index = middle;
break;
}
middle = (left + right) / 2;
}
if (0 > index)
{
HIF_SDIO_ERR_FUNC("no supported chipid found\n");
}
else
{
HIF_SDIO_INFO_FUNC("index:%d, chipId:0x%x\n", index, gChipInfoArray[index].chipId);
}
return index;
}
INT32 hif_sdio_match_chipid_by_dev_id (const struct sdio_device_id *id)
{
INT32 maxIndex = sizeof (gChipInfoArray) / sizeof (gChipInfoArray[0]);
INT32 index = 0;
struct sdio_device_id *localId = NULL;
INT32 chipId = -1;
for (index = 0; index < maxIndex; index++)
{
localId = &(gChipInfoArray[index].deviceId);
if ((localId->vendor == id->vendor) && (localId->device == id->device))
{
chipId = gChipInfoArray[index].chipId;
HIF_SDIO_INFO_FUNC("valid chipId found, index(%d), vendor id(0x%x), device id(0x%x), chip id(0x%x)\n", index, localId->vendor, localId->device, chipId);
gComboChipId = chipId;
break;
}
}
if (0 > chipId)
{
HIF_SDIO_ERR_FUNC("No valid chipId found, vendor id(0x%x), device id(0x%x)\n", id->vendor, id->device);
}
return chipId;
}
INT32 mtk_wcn_hif_sdio_query_chipid(INT32 waitFlag)
{
UINT32 timeSlotMs = 200;
UINT32 maxTimeSlot = 15;
UINT32 counter = 0;
//gComboChipId = 0x6628;
if (0 == waitFlag)
return gComboChipId;
if (0 <= hif_sdio_is_chipid_valid(gComboChipId))
return gComboChipId;
wmt_plat_pwr_ctrl(FUNC_ON);
wmt_plat_sdio_ctrl(WMT_SDIO_SLOT_SDIO1, FUNC_ON);
while (counter < maxTimeSlot)
{
if (0 <= hif_sdio_is_chipid_valid(gComboChipId))
break;
osal_msleep(timeSlotMs);
counter++;
}
wmt_plat_sdio_ctrl(WMT_SDIO_SLOT_SDIO1, FUNC_OFF);
wmt_plat_pwr_ctrl(FUNC_OFF);
return gComboChipId;
}
EXPORT_SYMBOL(mtk_wcn_hif_sdio_query_chipid);
INT32 mtk_wcn_hif_sdio_tell_chipid(INT32 chipId)
{
gComboChipId = chipId;
HIF_SDIO_INFO_FUNC("set combo chip id to 0x%x\n", gComboChipId);
return gComboChipId;
}
EXPORT_SYMBOL(mtk_wcn_hif_sdio_tell_chipid);
INT32 hif_sdio_create_dev_node(void)
{
INT32 iResult = -1;
HIF_SDIO_DBG_FUNC( "++");
iResult = register_chrdev(hifSdioMajor, kObjName, &hifDevOps);
if(0 > iResult)
{
HIF_SDIO_ERR_FUNC("register_chrdev failed.\n");
iResult = -1;
}
else
{
hifSdioMajor = hifSdioMajor == 0 ? iResult : hifSdioMajor;
HIF_SDIO_INFO_FUNC("register_chrdev succeed, mtk_jajor = %d\n", hifSdioMajor);
pHifClass = class_create(THIS_MODULE, HifClassName);
if(IS_ERR(pHifClass))
{
HIF_SDIO_ERR_FUNC("class_create error\n");
iResult = -2;
}
else
{
pHifDev = device_create(pHifClass, NULL, MKDEV(hifSdioMajor, 0), NULL, HifClassName, "%d", 0);
if(IS_ERR(pHifDev))
{
HIF_SDIO_ERR_FUNC("device_create error:%ld\n", PTR_ERR(pHifDev));
iResult = -3;
}
else
{
HIF_SDIO_INFO_FUNC("device_create succeed\n");
iResult = 0;
}
}
}
return iResult;
}
INT32 hif_sdio_remove_dev_node(void)
{
if(pHifDev != NULL)
{
device_destroy(pHifClass, MKDEV(hifSdioMajor, 0));
pHifDev = NULL;
}
if(pHifClass != NULL)
{
class_destroy(pHifClass);
pHifClass = NULL;
}
if(hifSdioMajor != 0)
{
unregister_chrdev(hifSdioMajor, kObjName);
hifSdioMajor = 0;
}
return 0;
}

View File

@@ -1,311 +0,0 @@
/*
** $Id: $
*/
/*! \file "hif_sdio.h"
\brief
*/
/*
** $Log: $
*
* 07 25 2010 george.kuo
*
* Move hif_sdio driver to linux directory.
*
* 07 23 2010 george.kuo
*
* Add MT6620 driver source tree
* , including char device driver (wmt, bt, gps), stp driver, interface driver (tty ldisc and hif_sdio), and bt hci driver.
**
**
*/
#ifndef _HIF_SDIO_H
#define _HIF_SDIO_H
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
#define HIF_SDIO_DEBUG (0) /* 0:trun off debug msg and assert, 1:trun off debug msg and assert */
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
#include <linux/mmc/card.h>
#include <linux/mmc/host.h>
#include <linux/mmc/sdio_func.h>
#include <linux/mmc/sdio_ids.h>
#include <linux/mm.h>
#include <linux/firmware.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/vmalloc.h>
#include "osal_typedef.h"
#include "osal.h"
#include "wmt_exp.h"
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
#define CFG_CLIENT_COUNT (11)
#define HIF_DEFAULT_BLK_SIZE (256)
#define HIF_DEFAULT_VENDOR (0x037A)
#define HIF_SDIO_LOG_LOUD 4
#define HIF_SDIO_LOG_DBG 3
#define HIF_SDIO_LOG_INFO 2
#define HIF_SDIO_LOG_WARN 1
#define HIF_SDIO_LOG_ERR 0
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
/* Function info provided by client driver */
typedef struct _MTK_WCN_HIF_SDIO_FUNCINFO MTK_WCN_HIF_SDIO_FUNCINFO;
/* Client context provided by hif_sdio driver for the following function call */
typedef UINT32 MTK_WCN_HIF_SDIO_CLTCTX;
/* Callback functions provided by client driver */
typedef INT32 (*MTK_WCN_HIF_SDIO_PROBE)(MTK_WCN_HIF_SDIO_CLTCTX, const MTK_WCN_HIF_SDIO_FUNCINFO *);
typedef INT32 (*MTK_WCN_HIF_SDIO_REMOVE)(MTK_WCN_HIF_SDIO_CLTCTX);
typedef INT32 (*MTK_WCN_HIF_SDIO_IRQ)(MTK_WCN_HIF_SDIO_CLTCTX);
/* Function info provided by client driver */
struct _MTK_WCN_HIF_SDIO_FUNCINFO {
UINT16 manf_id; /* TPLMID_MANF: manufacturer ID */
UINT16 card_id; /* TPLMID_CARD: card ID */
UINT16 func_num; /* Function Number */
UINT16 blk_sz; /* Function block size */
};
/* Client info provided by client driver */
typedef struct _MTK_WCN_HIF_SDIO_CLTINFO {
const MTK_WCN_HIF_SDIO_FUNCINFO *func_tbl; /* supported function info table */
UINT32 func_tbl_size; /* supported function table info element number */
MTK_WCN_HIF_SDIO_PROBE hif_clt_probe; /* callback function for probing */
MTK_WCN_HIF_SDIO_REMOVE hif_clt_remove; /* callback function for removing */
MTK_WCN_HIF_SDIO_IRQ hif_clt_irq; /* callback function for interrupt handling */
} MTK_WCN_HIF_SDIO_CLTINFO;
/* function info provided by registed function */
typedef struct _MTK_WCN_HIF_SDIO_REGISTINFO {
const MTK_WCN_HIF_SDIO_CLTINFO *sdio_cltinfo; /* client's MTK_WCN_HIF_SDIO_CLTINFO pointer */
const MTK_WCN_HIF_SDIO_FUNCINFO *func_info; /* supported function info pointer */
} MTK_WCN_HIF_SDIO_REGISTINFO;
/* Card info provided by probed function */
typedef struct _MTK_WCN_HIF_SDIO_PROBEINFO {
struct sdio_func* func; /* probed sdio function pointer */
void* private_data_p; /* clt's private data pointer */
MTK_WCN_BOOL on_by_wmt; /* TRUE: on by wmt, FALSE: not on by wmt */
/* added for sdio irq sync and mmc single_irq workaround */
MTK_WCN_BOOL sdio_irq_enabled; /* TRUE: can handle sdio irq; FALSE: no sdio irq handling */
INT8 clt_idx; /* registered function table info element number (initial value is -1) */
} MTK_WCN_HIF_SDIO_PROBEINFO;
/* work queue info needed by worker */
typedef struct _MTK_WCN_HIF_SDIO_CLT_PROBE_WORKERINFO {
struct work_struct probe_work; /* work queue structure */
MTK_WCN_HIF_SDIO_REGISTINFO *registinfo_p; /* MTK_WCN_HIF_SDIO_REGISTINFO pointer of the client */
INT8 probe_idx; /* probed function table info element number (initial value is -1) */
} MTK_WCN_HIF_SDIO_CLT_PROBE_WORKERINFO;
/* global resource locks info of hif_sdio drv */
typedef struct _MTK_WCN_HIF_SDIO_LOCKINFO {
spinlock_t probed_list_lock; /* spin lock for probed list */
spinlock_t clt_list_lock; /* spin lock for client registed list */
} MTK_WCN_HIF_SDIO_LOCKINFO;
/* error code returned by hif_sdio driver (use NEGATIVE number) */
typedef enum {
HIF_SDIO_ERR_SUCCESS = 0,
HIF_SDIO_ERR_FAIL = HIF_SDIO_ERR_SUCCESS - 1, /* generic error */
HIF_SDIO_ERR_INVALID_PARAM = HIF_SDIO_ERR_FAIL - 1,
HIF_SDIO_ERR_DUPLICATED = HIF_SDIO_ERR_INVALID_PARAM - 1,
HIF_SDIO_ERR_UNSUP_MANF_ID = HIF_SDIO_ERR_DUPLICATED - 1,
HIF_SDIO_ERR_UNSUP_CARD_ID = HIF_SDIO_ERR_UNSUP_MANF_ID - 1,
HIF_SDIO_ERR_INVALID_FUNC_NUM = HIF_SDIO_ERR_UNSUP_CARD_ID - 1,
HIF_SDIO_ERR_INVALID_BLK_SZ = HIF_SDIO_ERR_INVALID_FUNC_NUM - 1,
HIF_SDIO_ERR_NOT_PROBED = HIF_SDIO_ERR_INVALID_BLK_SZ - 1,
HIF_SDIO_ERR_ALRDY_ON = HIF_SDIO_ERR_NOT_PROBED -1,
HIF_SDIO_ERR_ALRDY_OFF = HIF_SDIO_ERR_ALRDY_ON -1,
HIF_SDIO_ERR_CLT_NOT_REG = HIF_SDIO_ERR_ALRDY_OFF - 1,
} MTK_WCN_HIF_SDIO_ERR ;
typedef struct _MTK_WCN_HIF_SDIO_CHIP_INFO_
{
struct sdio_device_id deviceId;
UINT32 chipId;
}MTK_WCN_HIF_SDIO_CHIP_INFO, *P_MTK_WCN_HIF_SDIO_CHIP_INFO;
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
/*!
* \brief A macro used to describe an SDIO function
*
* Fill an MTK_WCN_HIF_SDIO_FUNCINFO structure with function-specific information
*
* \param manf the 16 bit manufacturer id
* \param card the 16 bit card id
* \param func the 16 bit function number
* \param b_sz the 16 bit function block size
*/
#define MTK_WCN_HIF_SDIO_FUNC(manf, card, func, b_sz) \
.manf_id = (manf), .card_id = (card), .func_num = (func), .blk_sz = (b_sz)
#ifndef DFT_TAG
#define DFT_TAG "[HIF-SDIO]"
#endif
extern UINT32 gHifSdioDbgLvl;
#define HIF_SDIO_LOUD_FUNC(fmt, arg...) if (gHifSdioDbgLvl >= HIF_SDIO_LOG_LOUD) { osal_dbg_print(DFT_TAG"[L]%s:" fmt, __FUNCTION__ ,##arg);}
#define HIF_SDIO_DBG_FUNC(fmt, arg...) if (gHifSdioDbgLvl >= HIF_SDIO_LOG_DBG) { osal_dbg_print(DFT_TAG"[D]%s:" fmt, __FUNCTION__ ,##arg);}
#define HIF_SDIO_INFO_FUNC(fmt, arg...) if (gHifSdioDbgLvl >= HIF_SDIO_LOG_INFO) { osal_dbg_print(DFT_TAG"[I]%s:" fmt, __FUNCTION__ ,##arg);}
#define HIF_SDIO_WARN_FUNC(fmt, arg...) if (gHifSdioDbgLvl >= HIF_SDIO_LOG_WARN) { osal_dbg_print(DFT_TAG"[W]%s(%d):" fmt, __FUNCTION__ , __LINE__, ##arg);}
#define HIF_SDIO_ERR_FUNC(fmt, arg...) if (gHifSdioDbgLvl >= HIF_SDIO_LOG_ERR) { osal_dbg_print(DFT_TAG"[E]%s(%d):" fmt, __FUNCTION__ , __LINE__, ##arg);}
/*!
* \brief ASSERT function definition.
*
*/
#if HIF_SDIO_DEBUG
#define HIF_SDIO_ASSERT(expr) if ( !(expr) ) { \
osal_dbg_print("assertion failed! %s[%d]: %s\n",\
__FUNCTION__, __LINE__, #expr); \
osal_bug_on( !(expr) );\
}
#else
#define HIF_SDIO_ASSERT(expr) do {} while(0)
#endif
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
/*!
* \brief MTK hif sdio client registration function
*
* Client uses this function to do hif sdio registration
*
* \param pinfo a pointer of client's information
*
* \retval 0 register successfully
* \retval < 0 error code
*/
extern INT32 mtk_wcn_hif_sdio_client_reg (
const MTK_WCN_HIF_SDIO_CLTINFO *pinfo
);
extern INT32 mtk_wcn_hif_sdio_client_unreg (
const MTK_WCN_HIF_SDIO_CLTINFO *pinfo
);
extern INT32 mtk_wcn_hif_sdio_readb (
MTK_WCN_HIF_SDIO_CLTCTX ctx,
UINT32 offset,
PUINT8 pvb
);
extern INT32 mtk_wcn_hif_sdio_writeb (
MTK_WCN_HIF_SDIO_CLTCTX ctx,
UINT32 offset,
UINT8 vb
);
extern INT32 mtk_wcn_hif_sdio_readl (
MTK_WCN_HIF_SDIO_CLTCTX ctx,
UINT32 offset,
PUINT32 pvl
);
extern INT32 mtk_wcn_hif_sdio_writel (
MTK_WCN_HIF_SDIO_CLTCTX ctx,
UINT32 offset,
UINT32 vl
);
extern INT32 mtk_wcn_hif_sdio_read_buf (
MTK_WCN_HIF_SDIO_CLTCTX ctx,
UINT32 offset,
PUINT32 pbuf,
UINT32 len
);
extern INT32 mtk_wcn_hif_sdio_write_buf (
MTK_WCN_HIF_SDIO_CLTCTX ctx,
UINT32 offset,
PUINT32 pbuf,
UINT32 len
);
extern void mtk_wcn_hif_sdio_set_drvdata(
MTK_WCN_HIF_SDIO_CLTCTX ctx,
void* private_data_p
);
extern void* mtk_wcn_hif_sdio_get_drvdata(
MTK_WCN_HIF_SDIO_CLTCTX ctx
);
extern INT32 mtk_wcn_hif_sdio_wmt_control(
WMT_SDIO_FUNC_TYPE func_type,
MTK_WCN_BOOL is_on
);
extern INT32 mtk_wcn_hif_sdio_bus_set_power (
MTK_WCN_HIF_SDIO_CLTCTX ctx,
UINT32 pwrState
);
extern void mtk_wcn_hif_sdio_get_dev(
MTK_WCN_HIF_SDIO_CLTCTX ctx,
struct device **dev
);
extern INT32 mtk_wcn_hif_sdio_update_cb_reg(
int (*ts_update)(void)
);
INT32 mtk_wcn_hif_sdio_tell_chipid(INT32 chipId);
INT32 mtk_wcn_hif_sdio_query_chipid(INT32 waitFlag);
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
#endif /* _HIF_SDIO_H */

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@@ -1,34 +0,0 @@
#ifndef _HIF_SDIO_CHRDEV_H_
#define _HIF_SDIO_CHRDEV_H_
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/sched.h>
#include <asm/current.h>
#include <linux/kthread.h>
#include <linux/mmc/card.h>
#include <linux/mmc/host.h>
#include <linux/mmc/sdio_func.h>
#include <linux/mmc/sdio_ids.h>
#include "wmt_exp.h"
#include "wmt_plat.h"
#ifdef CFG_WMT_PS_SUPPORT
#undef CFG_WMT_PS_SUPPORT
#endif
extern INT32 hif_sdio_create_dev_node(void);
extern INT32 hif_sdio_remove_dev_node(void);
extern INT32 hifsdiod_start(void);
extern INT32 hifsdiod_stop(void);
INT32 hif_sdio_match_chipid_by_dev_id (const struct sdio_device_id *id);
INT32 hif_sdio_is_chipid_valid (INT32 chipId);
#endif /*_HIF_SDIO_CHRDEV_H_*/

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@@ -1,201 +0,0 @@
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
/*******************************************************************************
* Copyright (c) 2009 MediaTek Inc.
*
* All rights reserved. Copying, compilation, modification, distribution
* or any other use whatsoever of this material is strictly prohibited
* except in accordance with a Software License Agreement with
* MediaTek Inc.
********************************************************************************
*/
/*******************************************************************************
* LEGAL DISCLAIMER
*
* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND
* AGREES THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK
* SOFTWARE") RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE
* PROVIDED TO BUYER ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY
* DISCLAIMS ANY AND ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT
* LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
* PARTICULAR PURPOSE OR NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE
* ANY WARRANTY WHATSOEVER WITH RESPECT TO THE SOFTWARE OF ANY THIRD PARTY
* WHICH MAY BE USED BY, INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK
* SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY
* WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE
* FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S SPECIFICATION OR TO
* CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
*
* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL
* BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT
* ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY
* BUYER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
*
* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT
* OF LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING
* THEREOF AND RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN
* FRANCISCO, CA, UNDER THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE
* (ICC).
********************************************************************************
*/
#ifndef _MTK_WCN_CMB_STUB_H_
#define _MTK_WCN_CMB_STUB_H_
#include <linux/types.h>
typedef enum {
COMBO_AUDIO_STATE_0 = 0, /* 0000: BT_PCM_OFF & FM analog (line in/out) */
COMBO_AUDIO_STATE_1 = 1, /* 0001: BT_PCM_ON & FM analog (in/out) */
COMBO_AUDIO_STATE_2 = 2, /* 0010: BT_PCM_OFF & FM digital (I2S) */
COMBO_AUDIO_STATE_3 = 3, /* 0011: BT_PCM_ON & FM digital (I2S) (invalid in 73evb & 1.2 phone configuration) */
COMBO_AUDIO_STATE_MAX = 4,
} COMBO_AUDIO_STATE;
typedef enum {
COMBO_FUNC_TYPE_BT = 0,
COMBO_FUNC_TYPE_FM = 1,
COMBO_FUNC_TYPE_GPS = 2,
COMBO_FUNC_TYPE_WIFI = 3,
COMBO_FUNC_TYPE_WMT = 4,
COMBO_FUNC_TYPE_STP = 5,
COMBO_FUNC_TYPE_NUM = 6
} COMBO_FUNC_TYPE;
typedef enum {
COMBO_IF_UART = 0,
COMBO_IF_MSDC = 1,
COMBO_IF_MAX,
} COMBO_IF;
/******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
*******************************************************************************
*/
/* [GeorgeKuo] Stub functions for other kernel built-in modules to call.
* Keep them unchanged temporarily. Move mt_combo functions to mtk_wcn_combo.
*/
//extern int mt_combo_audio_ctrl_ex(COMBO_AUDIO_STATE state, u32 clt_ctrl);
static inline int mt_combo_audio_ctrl(COMBO_AUDIO_STATE state) {
//return mt_combo_audio_ctrl_ex(state, 1);
return 0;
}
//extern int mt_combo_plt_enter_deep_idle(COMBO_IF src);
//extern int mt_combo_plt_exit_deep_idle(COMBO_IF src);
/* Use new mtk_wcn_stub APIs instead of old mt_combo ones for kernel to control
* function on/off.
*/
//extern void mtk_wcn_cmb_stub_func_ctrl (unsigned int type, unsigned int on);
//extern int board_sdio_ctrl (unsigned int sdio_port_num, unsigned int on);
//#include <mach/mt_combo.h> jake
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
typedef enum {
CMB_STUB_AIF_0 = 0, /* 0000: BT_PCM_OFF & FM analog (line in/out) */
CMB_STUB_AIF_1 = 1, /* 0001: BT_PCM_ON & FM analog (in/out) */
CMB_STUB_AIF_2 = 2, /* 0010: BT_PCM_OFF & FM digital (I2S) */
CMB_STUB_AIF_3 = 3, /* 0011: BT_PCM_ON & FM digital (I2S) (invalid in 73evb & 1.2 phone configuration) */
CMB_STUB_AIF_MAX = 4,
} CMB_STUB_AIF_X;
/*COMBO_CHIP_AUDIO_PIN_CTRL*/
typedef enum {
CMB_STUB_AIF_CTRL_DIS = 0,
CMB_STUB_AIF_CTRL_EN = 1,
CMB_STUB_AIF_CTRL_MAX = 2,
} CMB_STUB_AIF_CTRL;
typedef void (*wmt_bgf_eirq_cb)(void);
typedef int (*wmt_aif_ctrl_cb)(CMB_STUB_AIF_X, CMB_STUB_AIF_CTRL);
typedef void (*wmt_func_ctrl_cb)(unsigned int, unsigned int);
typedef struct _CMB_STUB_CB_ {
unsigned int size; //structure size
/*wmt_bgf_eirq_cb bgf_eirq_cb;*//* remove bgf_eirq_cb from stub. handle it in platform */
wmt_aif_ctrl_cb aif_ctrl_cb;
wmt_func_ctrl_cb func_ctrl_cb;
} CMB_STUB_CB, *P_CMB_STUB_CB;
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
extern int mtk_wcn_cmb_stub_reg (P_CMB_STUB_CB p_stub_cb);
extern int mtk_wcn_cmb_stub_unreg (void);
extern int mtk_wcn_cmb_stub_aif_ctrl (CMB_STUB_AIF_X state, CMB_STUB_AIF_CTRL ctrl);
// TODO: [FixMe][GeorgeKuo]: put prototypes into mt_combo.h for board.c temporarily for non-finished porting
// TODO: old: rfkill->board.c->mt_combo->wmt_lib_plat
// TODO: new: rfkill->mtk_wcn_cmb_stub_alps->wmt_plat_alps
#if 0
extern int mtk_wcn_cmb_stub_func_ctrl(unsigned int type, unsigned int on);
#endif
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
#endif /* _MTK_WCN_CMB_STUB_H_ */

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@@ -1,391 +0,0 @@
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
#ifndef _OSAL_H_
#define _OSAL_H_
#include <linux/version.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/fs.h>
#include <linux/cdev.h>
#include <linux/sched.h>
#include <linux/poll.h>
#include <asm/current.h>
#include <asm/uaccess.h>
#include <linux/proc_fs.h>
#include <linux/workqueue.h>
#include <linux/wait.h>
#include <linux/time.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/vmalloc.h>
#include <linux/firmware.h>
#include <linux/kthread.h>
#include <linux/jiffies.h>
#include <linux/slab.h>
#if WMT_PLAT_ALPS
#include <linux/aee.h>
#endif
#include <linux/kfifo.h>
#include <linux/wakelock.h>
#include <linux/log2.h>
#include <osal_typedef.h>
#include <asm/atomic.h>
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
#define OS_BIT_OPS_SUPPORT 1
#define _osal_inline_ inline
#define MAX_THREAD_NAME_LEN 16
#define MAX_WAKE_LOCK_NAME_LEN 16
#define OSAL_OP_BUF_SIZE 64
#define OSAL_OP_DATA_SIZE 32
#define DBG_LOG_STR_SIZE 512
#define osal_sizeof(x) sizeof(x)
#define osal_array_size(x) sizeof(x)/sizeof(x[0])
#ifndef NAME_MAX
#define NAME_MAX 256
#endif
#define WMT_OP_BIT(x) (0x1UL << x)
#define WMT_OP_HIF_BIT WMT_OP_BIT(0)
#define RB_SIZE(prb) ((prb)->size)
#define RB_MASK(prb) (RB_SIZE(prb) - 1)
#define RB_COUNT(prb) ((prb)->write - (prb)->read)
#define RB_FULL(prb) (RB_COUNT(prb) >= RB_SIZE(prb))
#define RB_EMPTY(prb) ((prb)->write == (prb)->read)
#define RB_INIT(prb, qsize) \
{ \
(prb)->read = (prb)->write = 0; \
(prb)->size = (qsize); \
}
#define RB_PUT(prb, value) \
{ \
if (!RB_FULL( prb )) { \
(prb)->queue[ (prb)->write & RB_MASK(prb) ] = value; \
++((prb)->write); \
} \
else { \
osal_assert(!RB_FULL(prb)); \
} \
}
#define RB_GET(prb, value) \
{ \
if (!RB_EMPTY(prb)) { \
value = (prb)->queue[ (prb)->read & RB_MASK(prb) ]; \
++((prb)->read); \
if (RB_EMPTY(prb)) { \
(prb)->read = (prb)->write = 0; \
} \
} \
else { \
value = NULL; \
osal_assert(!RB_EMPTY(prb)); \
} \
}
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
typedef VOID (*P_TIMEOUT_HANDLER)(ULONG);
typedef INT32 (*P_COND)(VOID *);
typedef struct _OSAL_TIMER_
{
struct timer_list timer;
P_TIMEOUT_HANDLER timeoutHandler;
ULONG timeroutHandlerData;
}OSAL_TIMER, *P_OSAL_TIMER;
typedef struct _OSAL_UNSLEEPABLE_LOCK_
{
spinlock_t lock;
ULONG flag;
}OSAL_UNSLEEPABLE_LOCK, *P_OSAL_UNSLEEPABLE_LOCK;
typedef struct _OSAL_SLEEPABLE_LOCK_
{
struct mutex lock;
}OSAL_SLEEPABLE_LOCK, *P_OSAL_SLEEPABLE_LOCK;
typedef struct _OSAL_SIGNAL_
{
struct completion comp;
UINT32 timeoutValue;
}OSAL_SIGNAL, *P_OSAL_SIGNAL;
typedef struct _OSAL_EVENT_
{
wait_queue_head_t waitQueue;
// VOID *pWaitQueueData;
UINT32 timeoutValue;
INT32 waitFlag;
}OSAL_EVENT, *P_OSAL_EVENT;
typedef struct _OSAL_THREAD_
{
struct task_struct *pThread;
VOID *pThreadFunc;
VOID *pThreadData;
char threadName[MAX_THREAD_NAME_LEN];
}OSAL_THREAD, *P_OSAL_THREAD;
typedef struct _OSAL_FIFO_
{
/*fifo definition*/
VOID *pFifoBody;
spinlock_t fifoSpinlock;
/*fifo operations*/
INT32 (*FifoInit)(struct _OSAL_FIFO_ *pFifo, UINT8 *buf, UINT32);
INT32 (*FifoDeInit)(struct _OSAL_FIFO_ *pFifo);
INT32 (*FifoReset)(struct _OSAL_FIFO_ *pFifo);
INT32 (*FifoSz)(struct _OSAL_FIFO_ *pFifo);
INT32 (*FifoAvailSz)(struct _OSAL_FIFO_ *pFifo);
INT32 (*FifoLen)(struct _OSAL_FIFO_ *pFifo);
INT32 (*FifoIsEmpty)(struct _OSAL_FIFO_ *pFifo);
INT32 (*FifoIsFull)(struct _OSAL_FIFO_ *pFifo);
INT32 (*FifoDataIn)(struct _OSAL_FIFO_ *pFifo, const VOID *buf, UINT32 len);
INT32 (*FifoDataOut)(struct _OSAL_FIFO_ *pFifo, void *buf, UINT32 len);
} OSAL_FIFO, *P_OSAL_FIFO;
typedef struct firmware osal_firmware;
typedef struct _OSAL_OP_DAT {
UINT32 opId; // Event ID
UINT32 u4InfoBit; // Reserved
UINT32 au4OpData[OSAL_OP_DATA_SIZE]; // OP Data
} OSAL_OP_DAT, *P_OSAL_OP_DAT;
typedef struct _OSAL_LXOP_ {
OSAL_OP_DAT op;
OSAL_SIGNAL signal;
INT32 result;
} OSAL_OP, *P_OSAL_OP;
typedef struct _OSAL_LXOP_Q {
OSAL_SLEEPABLE_LOCK sLock;
UINT32 write;
UINT32 read;
UINT32 size;
P_OSAL_OP queue[OSAL_OP_BUF_SIZE];
} OSAL_OP_Q, *P_OSAL_OP_Q;
typedef struct _OSAL_WAKE_LOCK_
{
struct wake_lock wake_lock;
UINT8 name[MAX_WAKE_LOCK_NAME_LEN];
} OSAL_WAKE_LOCK, *P_OSAL_WAKE_LOCK;
#if 1
typedef struct _OSAL_BIT_OP_VAR_
{
ULONG data;
OSAL_UNSLEEPABLE_LOCK opLock;
}OSAL_BIT_OP_VAR, *P_OSAL_BIT_OP_VAR;
#else
#define OSAL_BIT_OP_VAR ULONG
#define P_OSAL_BIT_OP_VAR ULONG*
#endif
typedef UINT32 (*P_OSAL_EVENT_CHECKER)(P_OSAL_THREAD pThread);
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
extern UINT32 osal_strlen(const char *str);
extern INT32 osal_strcmp(const char *dst, const char *src);
extern INT32 osal_strncmp(const char *dst, const char *src, UINT32 len);
extern char * osal_strcpy(char *dst, const char *src);
extern char * osal_strncpy(char *dst, const char *src, UINT32 len);
extern char * osal_strcat(char *dst, const char *src);
extern char * osal_strncat(char *dst, const char *src, UINT32 len);
extern char * osal_strchr(const char *str, UINT8 c);
extern char * osal_strsep(char **str, const char *c);
extern void osal_bug_on(unsigned long val);
extern LONG osal_strtol(const char *str, char **c, UINT32 adecimal);
extern INT32 osal_snprintf(char *buf, UINT32 len, const char*fmt, ...);
extern INT32 osal_print(const char *str, ...);
extern INT32 osal_dbg_print(const char *str, ...);
extern INT32 osal_dbg_assert(INT32 expr, const char *file, INT32 line);
extern INT32 osal_sprintf(char *str, const char *format, ...);
extern VOID* osal_malloc(UINT32 size);
extern VOID osal_free(const VOID *dst);
extern VOID* osal_memset(VOID *buf, INT32 i, UINT32 len);
extern VOID* osal_memcpy(VOID *dst, const VOID *src, UINT32 len);
extern INT32 osal_memcmp(const VOID *buf1, const VOID *buf2, UINT32 len);
extern INT32 osal_msleep(UINT32 ms);
extern INT32 osal_timer_create(P_OSAL_TIMER);
extern INT32 osal_timer_start(P_OSAL_TIMER, UINT32);
extern INT32 osal_timer_stop(P_OSAL_TIMER);
extern INT32 osal_timer_stop_sync(P_OSAL_TIMER pTimer);
extern INT32 osal_timer_modify(P_OSAL_TIMER, UINT32);
extern INT32 osal_timer_delete(P_OSAL_TIMER);
extern INT32 osal_fifo_init(P_OSAL_FIFO pFifo, UINT8 *buffer, UINT32 size);
extern VOID osal_fifo_deinit(P_OSAL_FIFO pFifo);
extern INT32 osal_fifo_reset(P_OSAL_FIFO pFifo);
extern UINT32 osal_fifo_in(P_OSAL_FIFO pFifo, PUINT8 buffer, UINT32 size);
extern UINT32 osal_fifo_out(P_OSAL_FIFO pFifo, PUINT8 buffer, UINT32 size);
extern UINT32 osal_fifo_len(P_OSAL_FIFO pFifo);
extern UINT32 osal_fifo_sz(P_OSAL_FIFO pFifo);
extern UINT32 osal_fifo_avail(P_OSAL_FIFO pFifo);
extern UINT32 osal_fifo_is_empty(P_OSAL_FIFO pFifo);
extern UINT32 osal_fifo_is_full(P_OSAL_FIFO pFifo);
extern INT32 osal_wake_lock_init(P_OSAL_WAKE_LOCK plock);
extern INT32 osal_wake_lock(P_OSAL_WAKE_LOCK plock);
extern INT32 osal_wake_unlock(P_OSAL_WAKE_LOCK plock);
extern INT32 osal_wake_lock_count(P_OSAL_WAKE_LOCK plock);
#if defined(CONFIG_PROVE_LOCKING)
#define osal_unsleepable_lock_init(l) { spin_lock_init(&((l)->lock));}
#else
extern INT32 osal_unsleepable_lock_init (P_OSAL_UNSLEEPABLE_LOCK );
#endif
extern INT32 osal_lock_unsleepable_lock (P_OSAL_UNSLEEPABLE_LOCK );
extern INT32 osal_unlock_unsleepable_lock (P_OSAL_UNSLEEPABLE_LOCK );
extern INT32 osal_unsleepable_lock_deinit (P_OSAL_UNSLEEPABLE_LOCK );
#if defined(CONFIG_PROVE_LOCKING)
#define osal_sleepable_lock_init(l) { mutex_init(&((l)->lock));}
#else
extern INT32 osal_sleepable_lock_init (P_OSAL_SLEEPABLE_LOCK );
#endif
extern INT32 osal_lock_sleepable_lock (P_OSAL_SLEEPABLE_LOCK );
extern INT32 osal_unlock_sleepable_lock (P_OSAL_SLEEPABLE_LOCK );
extern INT32 osal_sleepable_lock_deinit (P_OSAL_SLEEPABLE_LOCK );
extern INT32 osal_signal_init (P_OSAL_SIGNAL);
extern INT32 osal_wait_for_signal (P_OSAL_SIGNAL);
extern INT32
osal_wait_for_signal_timeout (
P_OSAL_SIGNAL
);
extern INT32
osal_raise_signal (
P_OSAL_SIGNAL
);
extern INT32
osal_signal_deinit (
P_OSAL_SIGNAL
);
extern INT32 osal_event_init(P_OSAL_EVENT);
extern INT32 osal_wait_for_event(P_OSAL_EVENT, P_COND , void *);
extern INT32 osal_wait_for_event_timeout(P_OSAL_EVENT , P_COND , void *);
extern INT32 osal_trigger_event(P_OSAL_EVENT);
extern INT32 osal_event_deinit (P_OSAL_EVENT);
extern INT32 osal_thread_create(P_OSAL_THREAD);
extern INT32 osal_thread_run(P_OSAL_THREAD);
extern INT32 osal_thread_should_stop(P_OSAL_THREAD);
extern INT32 osal_thread_stop(P_OSAL_THREAD);
/*extern INT32 osal_thread_wait_for_event(P_OSAL_THREAD, P_OSAL_EVENT);*/
extern INT32 osal_thread_wait_for_event(P_OSAL_THREAD, P_OSAL_EVENT, P_OSAL_EVENT_CHECKER);
/*check pOsalLxOp and OSAL_THREAD_SHOULD_STOP*/
extern INT32 osal_thread_destroy(P_OSAL_THREAD);
extern INT32 osal_clear_bit(UINT32 bitOffset, P_OSAL_BIT_OP_VAR pData);
extern INT32 osal_set_bit(UINT32 bitOffset, P_OSAL_BIT_OP_VAR pData);
extern INT32 osal_test_bit(UINT32 bitOffset, P_OSAL_BIT_OP_VAR pData);
extern INT32 osal_test_and_clear_bit(UINT32 bitOffset, P_OSAL_BIT_OP_VAR pData);
extern INT32 osal_test_and_set_bit(UINT32 bitOffset, P_OSAL_BIT_OP_VAR pData);
extern INT32 osal_dbg_assert_aee(const char *module, const char *detail_description);
extern INT32 osal_gettimeofday(PINT32 sec, PINT32 usec);
extern INT32 osal_printtimeofday(const PUINT8 prefix);
extern VOID
osal_buffer_dump (
const UINT8 *buf,
const UINT8 *title,
UINT32 len,
UINT32 limit
);
extern UINT32 osal_op_get_id(P_OSAL_OP pOp);
extern MTK_WCN_BOOL osal_op_is_wait_for_signal(P_OSAL_OP pOp);
extern VOID osal_op_raise_signal(P_OSAL_OP pOp, INT32 result);
extern UINT16 osal_crc16(const UINT8 *buffer, const UINT32 length);
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
#define osal_err_print(fmt, arg...) osal_print(KERN_ERR fmt, ##arg)
#define osal_warn_print(fmt, arg...) osal_print(KERN_ERR fmt, ##arg)
#define osal_info_print(fmt, arg...) osal_print(KERN_ERR fmt, ##arg)
#define osal_load_print(fmt, arg...) osal_print(KERN_DEBUG fmt, ##arg)
#define osal_assert(condition) if (!(condition)) {osal_err_print("%s, %d, (%s)\n", __FILE__, __LINE__, #condition);}
#endif /* _OSAL_H_ */

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@@ -1,46 +0,0 @@
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
#ifndef _OSAL_TYPEDEF_H_
#define _OSAL_TYPEDEF_H_
typedef void VOID;
typedef void *PVOID;
typedef char CHAR;
typedef char *PCHAR;
typedef signed char INT8;
typedef signed char *PINT8;
typedef unsigned char UINT8;
typedef unsigned char *PUINT8;
typedef unsigned char UCHAR;
typedef unsigned char *PUCHAR;
typedef signed short INT16;
typedef signed short *PINT16;
typedef unsigned short UINT16;
typedef unsigned short *PUINT16;
typedef signed long LONG;
typedef signed long *PLONG;
typedef signed int INT32;
typedef signed int *PINT32;
typedef unsigned int UINT32;
typedef unsigned int *PUINT32;
typedef unsigned long ULONG;
typedef unsigned long *PULONG;
typedef int MTK_WCN_BOOL;
#ifndef MTK_WCN_BOOL_TRUE
#define MTK_WCN_BOOL_FALSE ((MTK_WCN_BOOL) 0)
#define MTK_WCN_BOOL_TRUE ((MTK_WCN_BOOL) 1)
#endif
#endif /*_OSAL_TYPEDEF_H_*/

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@@ -1,229 +0,0 @@
#ifndef _STP_DEBUG_H_
#define _STP_DEBUG_H_
#include <linux/time.h>
#include "osal.h"
#define CONFIG_LOG_STP_INTERNAL
#if 1//#ifndef CONFIG_LOG_STP_INTERNAL
#define STP_PKT_SZ 16
#define STP_DMP_SZ 2048
#define STP_PKT_NO 2048
#define STP_DBG_LOG_ENTRY_NUM 2048
#define STP_DBG_LOG_ENTRY_SZ 2048
#else
#define STP_PKT_SZ 16
#define STP_DMP_SZ 16
#define STP_PKT_NO 16
#define STP_DBG_LOG_ENTRY_NUM 28
#define STP_DBG_LOG_ENTRY_SZ 64
#endif
typedef enum {
STP_DBG_EN = 0,
STP_DBG_PKT = 1,
STP_DBG_DR = 2,
STP_DBG_FW_ASSERT = 3,
STP_DBG_FW_LOG = 4,
STP_DBG_FW_DMP = 5,
STP_DBG_MAX
}STP_DBG_OP_T;
typedef enum {
STP_DBG_PKT_FIL_ALL = 0,
STP_DBG_PKT_FIL_BT = 1,
STP_DBG_PKT_FIL_GPS = 2,
STP_DBG_PKT_FIL_FM = 3,
STP_DBG_PKT_FIL_WMT = 4,
STP_DBG_PKT_FIL_MAX
} STP_DBG_PKT_FIL_T;
static char * const gStpDbgType[]={
"< BT>",
"< FM>",
"<GPS>",
"<WiFi>",
"<WMT>",
"<STP>",
"<DBG>",
"<UNKOWN>"
};
typedef enum {
STP_DBG_DR_MAX = 0,
} STP_DBG_DR_FIL_T;
typedef enum {
STP_DBG_FW_MAX = 0,
} STP_DBG_FW_FIL_T;
typedef enum {
PKT_DIR_RX = 0,
PKT_DIR_TX
} STP_DBG_PKT_DIR_T;
/*simple log system ++*/
typedef struct {
int id; /*type: 0. pkt trace 1. fw info 2. assert info 3. trace32 dump . -1. linked to the the previous*/
int len;
char buffer[STP_DBG_LOG_ENTRY_SZ];
} MTKSTP_LOG_ENTRY_T;
typedef struct log_sys {
MTKSTP_LOG_ENTRY_T queue[STP_DBG_LOG_ENTRY_NUM];
unsigned int size;
unsigned int in;
unsigned int out;
spinlock_t lock;
} MTKSTP_LOG_SYS_T;
/*--*/
typedef struct stp_dbg_pkt_hdr{
//packet information
unsigned int sec;
unsigned int usec;
unsigned int dbg_type;
unsigned int dmy;
unsigned int no;
unsigned int dir;
//packet content
unsigned int type;
unsigned int len;
unsigned int ack;
unsigned int seq;
unsigned int chs;
unsigned int crc;
}STP_DBG_HDR_T;
typedef struct stp_dbg_pkt{
struct stp_dbg_pkt_hdr hdr;
unsigned char raw[STP_DMP_SZ];
}STP_PACKET_T;
typedef struct mtkstp_dbg_t{
/*log_sys*/
int pkt_trace_no;
void *btm;
int is_enable;
MTKSTP_LOG_SYS_T *logsys;
}MTKSTP_DBG_T;
extern void aed_combo_exception(const int *, int, const int *, int, const char *);
#define STP_CORE_DUMP_TIMEOUT 5*60*1000 // default 5minutes
#define STP_OJB_NAME_SZ 20
#define STP_CORE_DUMP_INFO_SZ 500
typedef enum wcn_compress_algorithm_t {
GZIP = 0,
BZIP2 = 1,
RAR = 2,
LMA = 3,
MAX
}WCN_COMPRESS_ALG_T;
typedef INT32 (*COMPRESS_HANDLER)(void *worker, UINT8 *in_buf, INT32 in_sz, UINT8 *out_buf, INT32 *out_sz, INT32 finish);
typedef struct wcn_compressor_t {
// current object name
UINT8 name[STP_OJB_NAME_SZ + 1];
// buffer for raw data, named L1
PUINT8 L1_buf;
INT32 L1_buf_sz;
INT32 L1_pos;
// target buffer, named L2
PUINT8 L2_buf;
INT32 L2_buf_sz;
INT32 L2_pos;
// compress state
UINT8 f_done;
UINT16 reserved;
UINT32 uncomp_size;
UINT32 crc32;
// compress algorithm
UINT8 f_compress_en;
WCN_COMPRESS_ALG_T compress_type;
void *worker;
COMPRESS_HANDLER handler;
}WCN_COMPRESSOR_T, *P_WCN_COMPRESSOR_T;
P_WCN_COMPRESSOR_T wcn_compressor_init(PUINT8 name, INT32 L1_buf_sz, INT32 L2_buf_sz);
INT32 wcn_compressor_deinit(P_WCN_COMPRESSOR_T compressor);
INT32 wcn_compressor_in(P_WCN_COMPRESSOR_T compressor, PUINT8 buf, INT32 len, INT32 finish);
INT32 wcn_compressor_out(P_WCN_COMPRESSOR_T compressor, PUINT8 *pbuf, PINT32 len);
INT32 wcn_compressor_reset(P_WCN_COMPRESSOR_T compressor, UINT8 enable, WCN_COMPRESS_ALG_T type);
typedef enum core_dump_state_t {
CORE_DUMP_INIT = 0,
CORE_DUMP_DOING,
CORE_DUMP_TIMEOUT,
CORE_DUMP_DONE,
CORE_DUMP_MAX
}CORE_DUMP_STA;
typedef struct core_dump_t {
// compress dump data and buffered
P_WCN_COMPRESSOR_T compressor;
// timer for monitor timeout
OSAL_TIMER dmp_timer;
UINT32 timeout;
OSAL_SLEEPABLE_LOCK dmp_lock;
// state machine for core dump flow
CORE_DUMP_STA sm;
// dump info
CHAR info[STP_CORE_DUMP_INFO_SZ + 1];
} WCN_CORE_DUMP_T, *P_WCN_CORE_DUMP_T;
P_WCN_CORE_DUMP_T wcn_core_dump_init(UINT32 timeout);
INT32 wcn_core_dump_deinit(P_WCN_CORE_DUMP_T dmp);
INT32 wcn_core_dump_in(P_WCN_CORE_DUMP_T dmp, PUINT8 buf, INT32 len);
INT32 wcn_core_dump_out(P_WCN_CORE_DUMP_T dmp, PUINT8 *pbuf, PINT32 len);
INT32 wcn_core_dump_reset(P_WCN_CORE_DUMP_T dmp, UINT32 timeout);
extern INT32 wcn_core_dump_flush(INT32 rst);
extern int stp_dbg_enable(MTKSTP_DBG_T *stp_dbg);
extern int stp_dbg_disable(MTKSTP_DBG_T *stp_dbg);
extern MTKSTP_DBG_T *stp_dbg_init(void *);
extern int stp_dbg_deinit(MTKSTP_DBG_T *stp_dbg);
extern int stp_dbg_dmp_out_ex (char *buf, int *len);
extern int stp_dbg_dmp_out(MTKSTP_DBG_T *stp_dbg, char *buf, int *len);
extern int stp_dbg_dmp_printk(MTKSTP_DBG_T *stp_dbg);
extern char
stp_dbg_nl_send(
char * aucMsg,
unsigned char cmd
);
extern INT32 stp_dbg_aee_send(unsigned char *aucMsg, INT32 len, INT32 cmd);
extern int
stp_dbg_log_pkt (
MTKSTP_DBG_T *stp_dbg,
int dbg_type,
int type,
int ack_no,
int seq_no,
int crc,
int dir,
int len,
const unsigned char *body);
extern int stp_dbg_log_ctrl (unsigned int on);
#endif /* end of _STP_DEBUG_H_ */

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@@ -1,252 +0,0 @@
/*
** $Id: $
*/
/*! \file "stp_sdio.h"
\brief
*/
/*
** $Log: $
*/
#ifndef _STP_SDIO_H
#define _STP_SDIO_H
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
#define KMALLOC_UPDATE 1
#if 0 // NO support for multiple STP-SDIO instances (multiple MT6620) on a single host
#define STP_SDIO_HOST_COUNT (1)
#define STP_SDIO_ONLY_ONE_HOST (0)
#endif
#define STP_SDIO_POLL_OWNBACK_INTR (1)
#define STP_SDIO_NEW_TXRING (0)
/* George: Keep old (0) codes for debugging only!
* Use new code (1) for SQC and MP!
*/
#define STP_SDIO_OWN_THREAD (1)
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
#include "osal.h"
#include "hif_sdio.h"
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/* Common HIF register address */
#define CCIR (0x0000)
#define CHLPCR (0x0004)
#define CSDIOCSR (0x0008)
#define CHCR (0x000c)
#define CHISR (0x0010)
#define CHIER (0x0014)
#define CTDR (0x0018)
#define CRDR (0x001c)
#define CTFSR (0x0020)
#define CRPLR (0x0024)
/* Common HIF register bit field address */
/* CHLPCR */
#define C_FW_OWN_REQ_CLR (0x00000200)
#define C_FW_OWN_REQ_SET (0x00000100)
#define C_FW_INT_EN_CLR (0x00000002)
#define C_FW_INT_EN_SET (0x00000001)
#define C_FW_COM_DRV_OWN (0x00000100)
/* CHIER */
#define CHISR_EN_15_7 (0x0000ff80)
#define CHISR_EN_3_0 (0x0000000f)
/* CHISR */
#define RX_PKT_LEN (0xffff0000)
#define FIRMWARE_INT (0x0000fe00)
#define TX_FIFO_OVERFLOW (0x00000100)
#define FW_INT_IND_INDICATOR (0x00000080)
#define TX_COMPLETE_COUNT (0x00000070)
#define TX_UNDER_THOLD (0x00000008)
#define TX_EMPTY (0x00000004)
#define RX_DONE (0x00000002)
#define FW_OWN_BACK_INT (0x00000001)
/* hardware settings */
#define STP_SDIO_TX_FIFO_SIZE (2080UL)
#define STP_SDIO_RX_FIFO_SIZE (2304UL) /* 256*9 */
#define STP_SDIO_TX_PKT_MAX_CNT (7) /* Max outstanding tx pkt count, as defined in TX_COMPLETE_COUNT */
#define STP_SDIO_HDR_SIZE (4) /* hw,fw,sw follow the same format: 2 bytes length + 2 bytes reserved */
/* sdio bus settings */
#define STP_SDIO_BLK_SIZE (512UL)
/* software driver settings */
#define STP_SDIO_TX_BUF_CNT (16UL)/*(7)*/
#define STP_SDIO_TX_BUF_CNT_MASK (STP_SDIO_TX_BUF_CNT - 1)
#define STP_SDIO_TX_PKT_LIST_SIZE (STP_SDIO_TX_BUF_CNT) /* must be 2^x now... */
#define STP_SDIO_TX_PKT_LIST_SIZE_MASK (STP_SDIO_TX_PKT_LIST_SIZE - 1)
/* tx buffer size for a single entry */
/* George: SHALL BE a multiple of the used BLK_SIZE!! */
#if 1
/* round up: 512*5 = 2560 > 2080 */
#define STP_SDIO_TX_ENTRY_SIZE ((STP_SDIO_TX_FIFO_SIZE + (STP_SDIO_BLK_SIZE - 1)) & ~(STP_SDIO_BLK_SIZE - 1))
#else
/* round down: 512*4 = 2048 < 2080 */
#define STP_SDIO_TX_MAX_BLK_CNT (STP_SDIO_TX_FIFO_SIZE / STP_SDIO_BLK_SIZE)
#define STP_SDIO_TX_ENTRY_SIZE (STP_SDIO_TX_MAX_BLK_CNT * STP_SDIO_BLK_SIZE)
#endif
/*software rx buffer size */
/*#define STP_SDIO_RX_BUF_SIZE (STP_SDIO_RX_FIFO_SIZE)*/
/* George: SHALL BE a multiple of the used BLK_SIZE!! */
#if 1
/* round up: 512*5 = 2560 > 2304 */
#define STP_SDIO_RX_BUF_SIZE ((STP_SDIO_RX_FIFO_SIZE + (STP_SDIO_BLK_SIZE - 1)) & ~(STP_SDIO_BLK_SIZE - 1))
#else
/* round down: 512*4 = 2048 < 2304 */
#define STP_SDIO_RX_MAX_BLK_CNT (STP_SDIO_RX_FIFO_SIZE / STP_SDIO_BLK_SIZE)
#define STP_SDIO_RX_BUF_SIZE (STP_SDIO_RX_MAX_BLK_CNT * STP_SDIO_BLK_SIZE)
#endif
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
/* HIF's local packet buffer variables for Tx/Rx */
typedef struct _MTK_WCN_STP_SDIO_PKT_BUF {
/* Tx entry ring buffer. Entry size is aligned to SDIO block size. */
#if KMALLOC_UPDATE
UINT8 *tx_buf;
#else
UINT8 tx_buf[STP_SDIO_TX_BUF_CNT][STP_SDIO_TX_ENTRY_SIZE];
#endif
/* Tx size ring buffer. Record valid data size in tx_buf. */
UINT32 tx_buf_sz[STP_SDIO_TX_BUF_CNT];
/* Tx debug timestamp: 1st time when the entry is filled with data */
UINT32 tx_buf_ts[STP_SDIO_TX_BUF_CNT];
#if KMALLOC_UPDATE
UINT8 *rx_buf;
#else
UINT8 rx_buf[STP_SDIO_RX_BUF_SIZE]; /* Rx buffer (not ring) */
#endif
#if STP_SDIO_NEW_TXRING
UINT32 wr_cnt; /* Tx entry ring buffer write count */
UINT32 rd_cnt; /* Tx entry ring buffer read count */
spinlock_t rd_cnt_lock; /* Tx entry ring buffer read count spin lock */
#else
UINT8 wr_idx; /* Tx ring buffer write index */ /*George: obsolete*/
UINT8 rd_idx; /* Tx ring buffer read index *//*George: obsolete*/
spinlock_t rd_idx_lock; /* spin lock for Tx ring buffer read index */
#endif
MTK_WCN_BOOL full_flag; /* Tx entry ring buffer full flag (TRUE: full, FALSE: not full) */
/* save interrupt status flag for Tx entry ring buf spin lock */
unsigned long rd_irq_flag;
/* wait queue head for Tx entry ring buf full case */
wait_queue_head_t fullwait_q;
} MTK_WCN_STP_SDIO_PKT_BUF;
/* Tx packet list information */
typedef struct _MTK_WCN_STP_SDIO_Tx_Pkt_LIST {
UINT32 pkt_rd_cnt;
UINT32 pkt_wr_cnt;
UINT16 pkt_size_list[STP_SDIO_TX_PKT_LIST_SIZE]; /*max length is FIFO Size */
UINT32 out_ts[STP_SDIO_TX_PKT_LIST_SIZE];
UINT32 in_ts[STP_SDIO_TX_PKT_LIST_SIZE];
} MTK_WCN_STP_SDIO_Tx_Pkt_LIST;
/* STP HIF firmware information */
typedef struct _MTK_WCN_STP_SDIO_FIRMWARE_INFO {
UINT32 tx_fifo_size; /* Current left tx FIFO size */
UINT32 tx_packet_num; /* Current outstanding tx packet (0~7) */
atomic_t tx_comp_num; /* Current total tx ok but fifo size not released packet count */
} MTK_WCN_STP_SDIO_FIRMWARE_INFO;
/* STP SDIO private information */
typedef struct _MTK_WCN_STP_SDIO_PRIVATE_INFO {
UINT8 stp_sdio_host_idx;
} MTK_WCN_STP_SDIO_PRIVATE_INFO;
/* STP SDIO host information */
typedef struct _MTK_WCN_STP_SDIO_HIF_INFO {
MTK_WCN_HIF_SDIO_CLTCTX sdio_cltctx;
MTK_WCN_STP_SDIO_PKT_BUF pkt_buf;
MTK_WCN_STP_SDIO_Tx_Pkt_LIST tx_pkt_list;
UINT32 rx_pkt_len; /* George: use 32-bit for efficiency. Correct name to pkt for packet */
MTK_WCN_STP_SDIO_FIRMWARE_INFO firmware_info;
MTK_WCN_STP_SDIO_PRIVATE_INFO private_info;
#if STP_SDIO_OWN_THREAD
//struct tasklet_struct tx_rx_job;
OSAL_THREAD tx_rx_thread;
INT32 irq_pending;
INT32 sleep_flag;
INT32 wakeup_flag;
INT32 awake_flag;
OSAL_EVENT tx_rx_event;
OSAL_SIGNAL isr_check_complete;
#endif
struct work_struct tx_work;
struct work_struct rx_work;
} MTK_WCN_STP_SDIO_HIF_INFO;
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
/* STP_SDIO_TX_PKT_LIST_SIZE must be 2^x */
#define STP_SDIO_GET_PKT_AR_IDX(idx) ((idx) & STP_SDIO_TX_PKT_LIST_SIZE_MASK)
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
/*!
* \brief MTK hif sdio client registration function
*
* Client uses this function to do hif sdio registration
*
* \param pinfo a pointer of client's information
*
* \retval 0 register successfully
* \retval < 0 error code
*/
extern INT32
mtk_wcn_hif_sdio_client_reg (
const MTK_WCN_HIF_SDIO_CLTINFO *pinfo
);
extern INT32
mtk_wcn_stp_sdio_do_own_clr (void);
//extern INT32
//mtk_wcn_stp_sdio_do_own_set (void);
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
#endif /* _STP_SDIO_H */

View File

@@ -1,16 +0,0 @@
#ifndef _WMT_DEV_H_
#define _WMT_DEV_H_
#include "osal.h"
extern VOID wmt_dev_rx_event_cb (VOID);
extern INT32 wmt_dev_rx_timeout (P_OSAL_EVENT pEvent);
extern INT32 wmt_dev_patch_get (UCHAR *pPatchName, osal_firmware **ppPatch,INT32 padSzBuf);
extern INT32 wmt_dev_patch_put(osal_firmware **ppPatch);
extern VOID wmt_dev_patch_info_free(VOID);
#endif /*_WMT_DEV_H_*/

View File

@@ -1,20 +0,0 @@
#ifndef _WMT_TM_H
#define _WMT_TM_H
#if WMT_PLAT_ALPS
#define CONFIG_THERMAL_OPEN
#if defined(CONFIG_THERMAL) && defined(CONFIG_THERMAL_OPEN)
struct wmt_thermal_ctrl_ops {
int (*query_temp)(void);
int (*set_temp)(int);
};
int wmt_tm_init(struct wmt_thermal_ctrl_ops *ops);
int wmt_tm_deinit(void);
int wmt_tm_init_rt(void);
int wmt_tm_deinit_rt(void);
#endif
#endif
#endif

File diff suppressed because it is too large Load Diff

View File

@@ -1,514 +0,0 @@
#include <linux/init.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/fs.h>
#include <linux/cdev.h>
#include <linux/sched.h>
#include <asm/current.h>
#include <asm/uaccess.h>
#include <linux/fcntl.h>
#include <linux/poll.h>
#include <linux/time.h>
#include <linux/delay.h>
#include "stp_exp.h"
#include "wmt_exp.h"
MODULE_LICENSE("Dual BSD/GPL");
#define BT_DRIVER_NAME "mtk_stp_BT_chrdev"
#define BT_DEV_MAJOR 192 // never used number
#define PFX "[MTK-BT] "
#define BT_LOG_DBG 3
#define BT_LOG_INFO 2
#define BT_LOG_WARN 1
#define BT_LOG_ERR 0
#define COMBO_IOC_BT_HWVER 6
#define COMBO_IOC_MAGIC 0xb0
#define COMBO_IOCTL_FW_ASSERT _IOWR(COMBO_IOC_MAGIC, 0, void*)
unsigned int gDbgLevel = BT_LOG_INFO;
#define BT_DBG_FUNC(fmt, arg...) if(gDbgLevel >= BT_LOG_DBG){ printk(PFX "%s: " fmt, __FUNCTION__ ,##arg);}
#define BT_INFO_FUNC(fmt, arg...) if(gDbgLevel >= BT_LOG_INFO){ printk(PFX "%s: " fmt, __FUNCTION__ ,##arg);}
#define BT_WARN_FUNC(fmt, arg...) if(gDbgLevel >= BT_LOG_WARN){ printk(PFX "%s: " fmt, __FUNCTION__ ,##arg);}
#define BT_ERR_FUNC(fmt, arg...) if(gDbgLevel >= BT_LOG_ERR){ printk(PFX "%s: " fmt, __FUNCTION__ ,##arg);}
#define BT_TRC_FUNC(f) if(gDbgLevel >= BT_LOG_DBG){printk(PFX "<%s> <%d>\n", __FUNCTION__, __LINE__);}
#define VERSION "1.0"
#define BT_NVRAM_CUSTOM_NAME "/data/BT_Addr"
static int BT_devs = 1; /* device count */
static int BT_major = BT_DEV_MAJOR; /* dynamic allocation */
module_param(BT_major, uint, 0);
static struct cdev BT_cdev;
static unsigned char i_buf[MTKSTP_BUFFER_SIZE]; // input buffer of read()
static unsigned char o_buf[MTKSTP_BUFFER_SIZE]; // output buffer of write()
static struct semaphore wr_mtx, rd_mtx;
static wait_queue_head_t inq; /* read queues */
static DECLARE_WAIT_QUEUE_HEAD(BT_wq);
static int flag = 0;
volatile int retflag = 0;
unsigned char g_bt_bd_addr[10]={0x01,0x1a,0xfc,0x06,0x00,0x55,0x66,0x77,0x88,0x00};
unsigned char g_nvram_btdata[8];
static int nvram_read(char *filename, char *buf, ssize_t len, int offset)
{
struct file *fd;
//ssize_t ret;
int retLen = -1;
mm_segment_t old_fs = get_fs();
set_fs(KERNEL_DS);
fd = filp_open(filename, O_WRONLY|O_CREAT, 0644);
if(IS_ERR(fd)) {
BT_ERR_FUNC("failed to open!!\n");
return -1;
}
do{
if ((fd->f_op == NULL) || (fd->f_op->read == NULL))
{
BT_ERR_FUNC("file can not be read!!\n");
break;
}
if (fd->f_pos != offset) {
if (fd->f_op->llseek) {
if(fd->f_op->llseek(fd, offset, 0) != offset) {
BT_ERR_FUNC("[nvram_read] : failed to seek!!\n");
break;
}
} else {
fd->f_pos = offset;
}
}
retLen = fd->f_op->read(fd,
buf,
len,
&fd->f_pos);
}while(false);
filp_close(fd, NULL);
set_fs(old_fs);
return retLen;
}
int platform_load_nvram_data( char * filename, char * buf, int len)
{
//int ret;
BT_INFO_FUNC("platform_load_nvram_data ++ BDADDR\n");
return nvram_read( filename, buf, len, 0);
}
static void bt_cdev_rst_cb(
ENUM_WMTDRV_TYPE_T src,
ENUM_WMTDRV_TYPE_T dst,
ENUM_WMTMSG_TYPE_T type,
void *buf,
unsigned int sz){
/*
To handle reset procedure please
*/
ENUM_WMTRSTMSG_TYPE_T rst_msg;
BT_INFO_FUNC("sizeof(ENUM_WMTRSTMSG_TYPE_T) = %d\n", sizeof(ENUM_WMTRSTMSG_TYPE_T));
if(sz <= sizeof(ENUM_WMTRSTMSG_TYPE_T)){
memcpy((char *)&rst_msg, (char *)buf, sz);
BT_INFO_FUNC("src = %d, dst = %d, type = %d, buf = 0x%x sz = %d, max = %d\n", src, dst, type, rst_msg, sz, WMTRSTMSG_RESET_MAX);
if((src == WMTDRV_TYPE_WMT) &&
(dst == WMTDRV_TYPE_BT) &&
(type == WMTMSG_TYPE_RESET)){
if(rst_msg == WMTRSTMSG_RESET_START){
BT_INFO_FUNC("BT restart start!\n");
retflag = 1;
wake_up_interruptible(&inq);
/*reset_start message handling*/
} else if(rst_msg == WMTRSTMSG_RESET_END){
BT_INFO_FUNC("BT restart end!\n");
retflag = 2;
wake_up_interruptible(&inq);
/*reset_end message handling*/
}
}
} else {
/*message format invalid*/
BT_INFO_FUNC("message format invalid!\n");
}
}
void BT_event_cb(void)
{
BT_DBG_FUNC("BT_event_cb() \n");
flag = 1;
wake_up(&BT_wq);
/* finally, awake any reader */
wake_up_interruptible(&inq); /* blocked in read() and select() */
return;
}
unsigned int BT_poll(struct file *filp, poll_table *wait)
{
unsigned int mask = 0;
// down(&wr_mtx);
/*
* The buffer is circular; it is considered full
* if "wp" is right behind "rp". "left" is 0 if the
* buffer is empty, and it is "1" if it is completely full.
*/
if (mtk_wcn_stp_is_rxqueue_empty(BT_TASK_INDX))
{
poll_wait(filp, &inq, wait);
/* empty let select sleep */
if((!mtk_wcn_stp_is_rxqueue_empty(BT_TASK_INDX)) || retflag)
{
mask |= POLLIN | POLLRDNORM; /* readable */
}
}
else
{
mask |= POLLIN | POLLRDNORM; /* readable */
}
/* do we need condition? */
mask |= POLLOUT | POLLWRNORM; /* writable */
// up(&wr_mtx);
return mask;
}
ssize_t BT_write(struct file *filp, const char __user *buf, size_t count, loff_t *f_pos)
{
int retval = 0;
int written = 0;
down(&wr_mtx);
BT_DBG_FUNC("%s: count %d pos %lld\n", __func__, count, *f_pos);
if(retflag)
{
if (retflag == 1) //reset start
{
retval = -88;
BT_INFO_FUNC("MT662x reset Write: start\n");
}
else if (retflag == 2) // reset end
{
retval = -99;
BT_INFO_FUNC("MT662x reset Write: end\n");
}
goto OUT;
}
if (count > 0)
{
int copy_size = (count < MTKSTP_BUFFER_SIZE) ? count : MTKSTP_BUFFER_SIZE;
if (copy_from_user(&o_buf[0], &buf[0], copy_size))
{
retval = -EFAULT;
goto OUT;
}
//printk("%02x ", val);
written = mtk_wcn_stp_send_data(&o_buf[0], copy_size, BT_TASK_INDX);
if(0 == written)
{
retval = -ENOSPC;
/*no windowspace in STP is available, native process should not call BT_write with no delay at all*/
BT_ERR_FUNC("target packet length:%d, write success length:%d, retval = %d.\n", count, written, retval);
}
else
{
retval = written;
}
}else
{
retval = -EFAULT;
BT_ERR_FUNC("target packet length:%d is not allowed, retval = %d.\n", count, retval);
}
OUT:
up(&wr_mtx);
return (retval);
}
ssize_t BT_read(struct file *filp, char __user *buf, size_t count, loff_t *f_pos)
{
int retval = 0;
down(&rd_mtx);
BT_DBG_FUNC("BT_read(): count %d pos %lld\n", count, *f_pos);
if(retflag)
{
if (retflag == 1) //reset start
{
retval = -88;
BT_INFO_FUNC("MT662x reset Read: start\n");
}
else if (retflag == 2) // reset end
{
retval = -99;
BT_INFO_FUNC("MT662x reset Read: end\n");
}
goto OUT;
}
if(count > MTKSTP_BUFFER_SIZE)
{
count = MTKSTP_BUFFER_SIZE;
}
retval = mtk_wcn_stp_receive_data(i_buf, count, BT_TASK_INDX);
while(retval == 0) // got nothing, wait for STP's signal
{
/*If nonblocking mode, return directly O_NONBLOCK is specified during open() */
if (filp->f_flags & O_NONBLOCK){
BT_DBG_FUNC("Non-blocking BT_read() \n");
retval = -EAGAIN;
goto OUT;
}
BT_DBG_FUNC("BT_read(): wait_event 1\n");
wait_event(BT_wq, flag != 0);
BT_DBG_FUNC("BT_read(): wait_event 2\n");
flag = 0;
retval = mtk_wcn_stp_receive_data(i_buf, count, BT_TASK_INDX);
BT_DBG_FUNC("BT_read(): mtk_wcn_stp_receive_data() = %d\n", retval);
}
// we got something from STP driver
if (copy_to_user(buf, i_buf, retval))
{
retval = -EFAULT;
goto OUT;
}
OUT:
up(&rd_mtx);
BT_DBG_FUNC("BT_read(): retval = %d\n", retval);
return (retval);
}
//int BT_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg)
long BT_unlocked_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
{
int retval = 0;
MTK_WCN_BOOL bRet = MTK_WCN_BOOL_TRUE;
ENUM_WMTHWVER_TYPE_T hw_ver_sym = WMTHWVER_INVALID;
BT_DBG_FUNC("BT_ioctl(): cmd (%d)\n", cmd);
switch(cmd)
{
#if 0
case 0: // enable/disable STP
/* George: STP is controlled by WMT only */
/* mtk_wcn_stp_enable(arg); */
break;
#endif
case 1: // send raw data
BT_DBG_FUNC("BT_ioctl(): disable raw data from BT dev \n");
retval = -EINVAL;
break;
case COMBO_IOC_BT_HWVER:
/*get combo hw version*/
hw_ver_sym = mtk_wcn_wmt_hwver_get();
BT_INFO_FUNC("BT_ioctl(): get hw version = %d, sizeof(hw_ver_sym) = %d\n", hw_ver_sym, sizeof(hw_ver_sym));
if(copy_to_user((int __user *)arg, &hw_ver_sym, sizeof(hw_ver_sym))){
retval = -EFAULT;
}
break;
case COMBO_IOCTL_FW_ASSERT:
/* BT trigger fw assert for debug*/
BT_INFO_FUNC("BT Set fw assert......\n");
bRet = mtk_wcn_wmt_assert();
if (bRet == MTK_WCN_BOOL_TRUE) {
BT_INFO_FUNC("BT Set fw assert OK\n");
retval = 0;
} else {
BT_INFO_FUNC("BT Set fw assert Failed\n");
retval = (-1000);
}
break;
default:
retval = -EFAULT;
BT_DBG_FUNC("BT_ioctl(): unknown cmd (%d)\n", cmd);
break;
}
return retval;
}
static int BT_open(struct inode *inode, struct file *file)
{
BT_INFO_FUNC("%s: major %d minor %d (pid %d)\n", __func__,
imajor(inode),
iminor(inode),
current->pid
);
if(current->pid ==1)
return 0;
#if 1 /* GeorgeKuo: turn on function before check stp ready */
/* turn on BT */
if (MTK_WCN_BOOL_FALSE == mtk_wcn_wmt_func_on(WMTDRV_TYPE_BT)) {
BT_WARN_FUNC("WMT turn on BT fail!\n");
return -ENODEV;
}else{
retflag = 0;
mtk_wcn_wmt_msgcb_reg(WMTDRV_TYPE_BT, bt_cdev_rst_cb);
BT_INFO_FUNC("WMT register BT rst cb!\n");
}
#endif
if (mtk_wcn_stp_is_ready()) {
#if 0 /* GeorgeKuo: turn on function before check stp ready */
/* turn on BT */
if (MTK_WCN_BOOL_FALSE == mtk_wcn_wmt_func_on(WMTDRV_TYPE_BT)) {
BT_WARN_FUNC("WMT turn on BT fail!\n");
return -ENODEV;
}
#endif
mtk_wcn_stp_set_bluez(0);
BT_INFO_FUNC("Now it's in MTK Bluetooth Mode\n");
BT_INFO_FUNC("WMT turn on BT OK!\n");
BT_INFO_FUNC("STP is ready!\n");
platform_load_nvram_data(BT_NVRAM_CUSTOM_NAME,
(char *)&g_nvram_btdata, sizeof(g_nvram_btdata));
BT_INFO_FUNC("Read NVRAM : BD address %02x%02x%02x%02x%02x%02x Cap 0x%02x Codec 0x%02x\n",
g_nvram_btdata[0], g_nvram_btdata[1], g_nvram_btdata[2],
g_nvram_btdata[3], g_nvram_btdata[4], g_nvram_btdata[5],
g_nvram_btdata[6], g_nvram_btdata[7]);
mtk_wcn_stp_register_event_cb(BT_TASK_INDX, BT_event_cb);
BT_INFO_FUNC("mtk_wcn_stp_register_event_cb finish\n");
}
else {
BT_ERR_FUNC("STP is not ready\n");
/*return error code*/
return -ENODEV;
}
// init_MUTEX(&wr_mtx);
sema_init(&wr_mtx, 1);
// init_MUTEX(&rd_mtx);
sema_init(&rd_mtx, 1);
BT_INFO_FUNC("finish\n");
return 0;
}
static int BT_close(struct inode *inode, struct file *file)
{
BT_INFO_FUNC("%s: major %d minor %d (pid %d)\n", __func__,
imajor(inode),
iminor(inode),
current->pid
);
if(current->pid ==1)
return 0;
retflag = 0;
mtk_wcn_wmt_msgcb_unreg(WMTDRV_TYPE_BT);
mtk_wcn_stp_register_event_cb(BT_TASK_INDX, NULL);
if (MTK_WCN_BOOL_FALSE == mtk_wcn_wmt_func_off(WMTDRV_TYPE_BT)) {
BT_INFO_FUNC("WMT turn off BT fail!\n");
return -EIO; //mostly, native programmer will not check this return value.
}
else {
BT_INFO_FUNC("WMT turn off BT OK!\n");
}
return 0;
}
struct file_operations BT_fops = {
.open = BT_open,
.release = BT_close,
.read = BT_read,
.write = BT_write,
// .ioctl = BT_ioctl,
.unlocked_ioctl = BT_unlocked_ioctl,
.poll = BT_poll
};
static int BT_init(void)
{
dev_t dev = MKDEV(BT_major, 0);
int alloc_ret = 0;
int cdev_err = 0;
/*static allocate chrdev*/
alloc_ret = register_chrdev_region(dev, 1, BT_DRIVER_NAME);
if (alloc_ret) {
BT_ERR_FUNC("fail to register chrdev\n");
return alloc_ret;
}
cdev_init(&BT_cdev, &BT_fops);
BT_cdev.owner = THIS_MODULE;
cdev_err = cdev_add(&BT_cdev, dev, BT_devs);
if (cdev_err)
goto error;
BT_INFO_FUNC("%s driver(major %d) installed.\n", BT_DRIVER_NAME, BT_major);
retflag = 0;
mtk_wcn_stp_register_event_cb(BT_TASK_INDX, NULL);
/* init wait queue */
init_waitqueue_head(&(inq));
return 0;
error:
if (cdev_err == 0)
cdev_del(&BT_cdev);
if (alloc_ret == 0)
unregister_chrdev_region(dev, BT_devs);
return -1;
}
static void BT_exit(void)
{
dev_t dev = MKDEV(BT_major, 0);
retflag = 0;
mtk_wcn_stp_register_event_cb(BT_TASK_INDX, NULL); // unregister event callback function
cdev_del(&BT_cdev);
unregister_chrdev_region(dev, BT_devs);
BT_INFO_FUNC("%s driver removed.\n", BT_DRIVER_NAME);
}
module_init(BT_init);
module_exit(BT_exit);

View File

@@ -1,427 +0,0 @@
/** $Log: stp_chrdev_gps.c $
*
* 12 13 2010 Sean.Wang
* (1) Add GPS_DEBUG_TRACE_GPIO to disable GPIO debugging trace
* (2) Add GPS_DEBUG_DUMP to support GPS data dump
* (3) Add mtk_wcn_stp_is_ready() check in GPS_open()
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/fs.h>
#include <linux/cdev.h>
#include <linux/sched.h>
#include <asm/current.h>
#include <asm/uaccess.h>
#include <linux/skbuff.h>
#include "stp_exp.h"
#include "wmt_exp.h"
MODULE_LICENSE("GPL");
#define GPS_DRIVER_NAME "mtk_stp_GPS_chrdev"
#define GPS_DEV_MAJOR 191 // never used number
#define GPS_DEBUG_TRACE_GPIO 0
#define GPS_DEBUG_DUMP 0
#define PFX "[GPS] "
#define GPS_LOG_DBG 3
#define GPS_LOG_INFO 2
#define GPS_LOG_WARN 1
#define GPS_LOG_ERR 0
#define COMBO_IOC_GPS_HWVER 6
unsigned int gDbgLevel = GPS_LOG_DBG;
#define GPS_DBG_FUNC(fmt, arg...) if(gDbgLevel >= GPS_LOG_DBG){ printk(PFX "%s: " fmt, __FUNCTION__ ,##arg);}
#define GPS_INFO_FUNC(fmt, arg...) if(gDbgLevel >= GPS_LOG_INFO){ printk(PFX "%s: " fmt, __FUNCTION__ ,##arg);}
#define GPS_WARN_FUNC(fmt, arg...) if(gDbgLevel >= GPS_LOG_WARN){ printk(PFX "%s: " fmt, __FUNCTION__ ,##arg);}
#define GPS_ERR_FUNC(fmt, arg...) if(gDbgLevel >= GPS_LOG_ERR){ printk(PFX "%s: " fmt, __FUNCTION__ ,##arg);}
#define GPS_TRC_FUNC(f) if(gDbgLevel >= GPS_LOG_DBG){ printk(PFX "<%s> <%d>\n", __FUNCTION__, __LINE__);}
static int GPS_devs = 1; /* device count */
static int GPS_major = GPS_DEV_MAJOR; /* dynamic allocation */
module_param(GPS_major, uint, 0);
static struct cdev GPS_cdev;
static unsigned char i_buf[MTKSTP_BUFFER_SIZE]; // input buffer of read()
static unsigned char o_buf[MTKSTP_BUFFER_SIZE]; // output buffer of write()
static struct semaphore wr_mtx, rd_mtx;
static DECLARE_WAIT_QUEUE_HEAD(GPS_wq);
static int flag = 0;
static void GPS_event_cb(void);
ssize_t GPS_write(struct file *filp, const char __user *buf, size_t count, loff_t *f_pos)
{
int retval = 0;
int written = 0;
down(&wr_mtx);
//GPS_TRC_FUNC();
/*printk("%s: count %d pos %lld\n", __func__, count, *f_pos);*/
if (count > 0)
{
int copy_size = (count < MTKSTP_BUFFER_SIZE) ? count : MTKSTP_BUFFER_SIZE;
if (copy_from_user(&o_buf[0], &buf[0], copy_size))
{
retval = -EFAULT;
goto out;
}
//printk("%02x ", val);
#if GPS_DEBUG_TRACE_GPIO
mtk_wcn_stp_debug_gpio_assert(IDX_GPS_TX, DBG_TIE_LOW);
#endif
written = mtk_wcn_stp_send_data(&o_buf[0], copy_size, GPS_TASK_INDX);
#if GPS_DEBUG_TRACE_GPIO
mtk_wcn_stp_debug_gpio_assert(IDX_GPS_TX, DBG_TIE_HIGH);
#endif
#if GPS_DEBUG_DUMP
{
unsigned char *buf_ptr = &o_buf[0];
int k=0;
printk("--[GPS-WRITE]--");
for(k=0; k < 10 ; k++){
if(k%16 == 0) printk("\n");
printk("0x%02x ", o_buf[k]);
}
printk("\n");
}
#endif
/*
If cannot send successfully, enqueue again
if (written != copy_size) {
// George: FIXME! Move GPS retry handling from app to driver
}
*/
if(0 == written)
{
retval = -ENOSPC;
/*no windowspace in STP is available, native process should not call GPS_write with no delay at all*/
GPS_ERR_FUNC("target packet length:%d, write success length:%d, retval = %d.\n", count, written, retval);
}
else
{
retval = written;
}
}
else
{
retval = -EFAULT;
GPS_ERR_FUNC("target packet length:%d is not allowed, retval = %d.\n", count, retval);
}
out:
up(&wr_mtx);
return (retval);
}
ssize_t GPS_read(struct file *filp, char __user *buf, size_t count, loff_t *f_pos)
{
long val = 0;
int retval;
down(&rd_mtx);
/* printk("GPS_read(): count %d pos %lld\n", count, *f_pos);*/
if(count > MTKSTP_BUFFER_SIZE)
{
count = MTKSTP_BUFFER_SIZE;
}
#if GPS_DEBUG_TRACE_GPIO
mtk_wcn_stp_debug_gpio_assert(IDX_GPS_RX, DBG_TIE_LOW);
#endif
retval = mtk_wcn_stp_receive_data(i_buf, count, GPS_TASK_INDX);
#if GPS_DEBUG_TRACE_GPIO
mtk_wcn_stp_debug_gpio_assert(IDX_GPS_RX, DBG_TIE_HIGH);
#endif
while(retval == 0) // got nothing, wait for STP's signal
{
/*wait_event(GPS_wq, flag != 0);*/ /* George: let signal wake up */
val = wait_event_interruptible(GPS_wq, flag != 0);
flag = 0;
#if GPS_DEBUG_TRACE_GPIO
mtk_wcn_stp_debug_gpio_assert(IDX_GPS_RX, DBG_TIE_LOW);
#endif
retval = mtk_wcn_stp_receive_data(i_buf, count, GPS_TASK_INDX);
#if GPS_DEBUG_TRACE_GPIO
mtk_wcn_stp_debug_gpio_assert(IDX_GPS_RX, DBG_TIE_HIGH);
#endif
/* if we are signaled */
if (val) {
if (-ERESTARTSYS == val) {
GPS_INFO_FUNC("signaled by -ERESTARTSYS(%ld) \n ", val);
}
else {
GPS_INFO_FUNC("signaled by %ld \n ", val);
}
break;
}
}
#if GPS_DEBUG_DUMP
{
unsigned char *buf_ptr = &i_buf[0];
int k=0;
printk("--[GPS-READ]--");
for(k=0; k < 10 ; k++){
if(k%16 == 0) printk("\n");
printk("0x%02x ", i_buf[k]);
}
printk("--\n");
}
#endif
if (retval) {
// we got something from STP driver
if (copy_to_user(buf, i_buf, retval)) {
retval = -EFAULT;
goto OUT;
}
else {
/* success */
}
}
else {
// we got nothing from STP driver, being signaled
retval = val;
}
OUT:
up(&rd_mtx);
/* printk("GPS_read(): retval = %d\n", retval);*/
return (retval);
}
//int GPS_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg)
long GPS_unlocked_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
{
int retval = 0;
ENUM_WMTHWVER_TYPE_T hw_ver_sym = WMTHWVER_INVALID;
printk("GPS_ioctl(): cmd (%d)\n", cmd);
switch(cmd)
{
case 0: // enable/disable STP
GPS_INFO_FUNC(KERN_INFO "GPS_ioctl(): disable STP control from GPS dev\n");
retval = -EINVAL;
#if 1
#else
/* George: STP is controlled by WMT only */
mtk_wcn_stp_enable(arg);
#endif
break;
case 1: // send raw data
GPS_INFO_FUNC(KERN_INFO "GPS_ioctl(): disable raw data from GPS dev \n");
retval = -EINVAL;
break;
case COMBO_IOC_GPS_HWVER:
/*get combo hw version*/
hw_ver_sym = mtk_wcn_wmt_hwver_get();
GPS_INFO_FUNC(KERN_INFO "GPS_ioctl(): get hw version = %d, sizeof(hw_ver_sym) = %d\n", hw_ver_sym, sizeof(hw_ver_sym));
if(copy_to_user((int __user *)arg, &hw_ver_sym, sizeof(hw_ver_sym))){
retval = -EFAULT;
}
break;
default:
retval = -EFAULT;
GPS_INFO_FUNC(KERN_INFO "GPS_ioctl(): unknown cmd (%d)\n", cmd);
break;
}
/*OUT:*/
return retval;
}
static void gps_cdev_rst_cb(
ENUM_WMTDRV_TYPE_T src,
ENUM_WMTDRV_TYPE_T dst,
ENUM_WMTMSG_TYPE_T type,
void *buf,
unsigned int sz){
/*
To handle reset procedure please
*/
ENUM_WMTRSTMSG_TYPE_T rst_msg;
GPS_INFO_FUNC("sizeof(ENUM_WMTRSTMSG_TYPE_T) = %d\n", sizeof(ENUM_WMTRSTMSG_TYPE_T));
if(sz <= sizeof(ENUM_WMTRSTMSG_TYPE_T)){
memcpy((char *)&rst_msg, (char *)buf, sz);
GPS_INFO_FUNC("src = %d, dst = %d, type = %d, buf = 0x%x sz = %d, max = %d\n", src, dst, type, rst_msg, sz, WMTRSTMSG_RESET_MAX);
if((src==WMTDRV_TYPE_WMT) &&
(dst == WMTDRV_TYPE_GPS) &&
(type == WMTMSG_TYPE_RESET)){
if(rst_msg == WMTRSTMSG_RESET_START){
GPS_INFO_FUNC("gps restart start!\n");
/*reset_start message handling*/
} else if(rst_msg == WMTRSTMSG_RESET_END){
GPS_INFO_FUNC("gps restart end!\n");
/*reset_end message handling*/
}
}
} else {
/*message format invalid*/
}
}
static int GPS_open(struct inode *inode, struct file *file)
{
printk("%s: major %d minor %d (pid %d)\n", __func__,
imajor(inode),
iminor(inode),
current->pid
);
if(current->pid ==1)
return 0;
#if 1 /* GeorgeKuo: turn on function before check stp ready */
/* turn on BT */
if (MTK_WCN_BOOL_FALSE == mtk_wcn_wmt_func_on(WMTDRV_TYPE_GPS)) {
GPS_WARN_FUNC("WMT turn on GPS fail!\n");
return -ENODEV;
} else {
mtk_wcn_wmt_msgcb_reg(WMTDRV_TYPE_GPS, gps_cdev_rst_cb);
GPS_INFO_FUNC("WMT turn on GPS OK!\n");
}
#endif
if (mtk_wcn_stp_is_ready()) {
#if 0
if (MTK_WCN_BOOL_FALSE == mtk_wcn_wmt_func_on(WMTDRV_TYPE_GPS)) {
GPS_WARN_FUNC("WMT turn on GPS fail!\n");
return -ENODEV;
}
GPS_INFO_FUNC("WMT turn on GPS OK!\n");
#endif
mtk_wcn_stp_register_event_cb(GPS_TASK_INDX, GPS_event_cb);
} else {
GPS_ERR_FUNC("STP is not ready, Cannot open GPS Devices\n\r");
/*return error code*/
return -ENODEV;
}
//init_MUTEX(&wr_mtx);
sema_init(&wr_mtx, 1);
//init_MUTEX(&rd_mtx);
sema_init(&rd_mtx, 1);
return 0;
}
static int GPS_close(struct inode *inode, struct file *file)
{
printk("%s: major %d minor %d (pid %d)\n", __func__,
imajor(inode),
iminor(inode),
current->pid
);
if(current->pid ==1)
return 0;
/*Flush Rx Queue*/
mtk_wcn_stp_register_event_cb(GPS_TASK_INDX, 0x0); // unregister event callback function
mtk_wcn_wmt_msgcb_unreg(WMTDRV_TYPE_GPS);
if (MTK_WCN_BOOL_FALSE == mtk_wcn_wmt_func_off(WMTDRV_TYPE_GPS)) {
GPS_WARN_FUNC("WMT turn off GPS fail!\n");
return -EIO; //mostly, native programer does not care this return vlaue, but we still return error code.
}
else {
GPS_INFO_FUNC("WMT turn off GPS OK!\n");
}
return 0;
}
struct file_operations GPS_fops = {
.open = GPS_open,
.release = GPS_close,
.read = GPS_read,
.write = GPS_write,
// .ioctl = GPS_ioctl
.unlocked_ioctl = GPS_unlocked_ioctl,
};
void GPS_event_cb(void)
{
/* printk("GPS_event_cb() \n");*/
flag = 1;
wake_up(&GPS_wq);
return;
}
static int GPS_init(void)
{
dev_t dev = MKDEV(GPS_major, 0);
int alloc_ret = 0;
int cdev_err = 0;
/*static allocate chrdev*/
alloc_ret = register_chrdev_region(dev, 1, GPS_DRIVER_NAME);
if (alloc_ret) {
printk("fail to register chrdev\n");
return alloc_ret;
}
cdev_init(&GPS_cdev, &GPS_fops);
GPS_cdev.owner = THIS_MODULE;
cdev_err = cdev_add(&GPS_cdev, dev, GPS_devs);
if (cdev_err)
goto error;
printk(KERN_ALERT "%s driver(major %d) installed.\n", GPS_DRIVER_NAME, GPS_major);
return 0;
error:
if (cdev_err == 0)
cdev_del(&GPS_cdev);
if (alloc_ret == 0)
unregister_chrdev_region(dev, GPS_devs);
return -1;
}
static void GPS_exit(void)
{
dev_t dev = MKDEV(GPS_major, 0);
cdev_del(&GPS_cdev);
unregister_chrdev_region(dev, GPS_devs);
printk(KERN_ALERT "%s driver removed.\n", GPS_DRIVER_NAME);
}
module_init(GPS_init);
module_exit(GPS_exit);
EXPORT_SYMBOL(GPS_event_cb);

File diff suppressed because it is too large Load Diff

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@@ -1,938 +0,0 @@
#include <linux/version.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/fcntl.h>
#include <linux/interrupt.h>
#include <linux/ptrace.h>
#include <linux/poll.h>
#include <linux/slab.h>
#include <linux/tty.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/signal.h>
#include <linux/ioctl.h>
#include <linux/skbuff.h>
#include <linux/spinlock.h>
#include <linux/time.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/kfifo.h>
#include "stp_exp.h"
#define N_MTKSTP (15 + 1) /* refer to linux tty.h use N_HCI. */
#define HCIUARTSETPROTO _IOW('U', 200, int)
#define MAX(a,b) ((a) > (b) ? (a) : (b))
#define MIN(a,b) ((a) < (b) ? (a) : (b))
#define PFX "[UART] "
#define UART_LOG_LOUD 4
#define UART_LOG_DBG 3
#define UART_LOG_INFO 2
#define UART_LOG_WARN 1
#define UART_LOG_ERR 0
#define MAX_PACKET_ALLOWED 2000
unsigned int gDbgLevel = UART_LOG_INFO;
#define UART_DBG_FUNC(fmt, arg...) if(gDbgLevel >= UART_LOG_DBG){ printk(KERN_DEBUG PFX "%s: " fmt, __FUNCTION__ ,##arg);}
#define UART_INFO_FUNC(fmt, arg...) if(gDbgLevel >= UART_LOG_INFO){ printk(PFX "%s: " fmt, __FUNCTION__ ,##arg);}
#define UART_WARN_FUNC(fmt, arg...) if(gDbgLevel >= UART_LOG_WARN){ printk(PFX "%s: " fmt, __FUNCTION__ ,##arg);}
#define UART_ERR_FUNC(fmt, arg...) if(gDbgLevel >= UART_LOG_ERR){ printk(PFX "%s: " fmt, __FUNCTION__ ,##arg);}
#define UART_TRC_FUNC(f) if(gDbgLevel >= UART_LOG_DBG){ printk(KERN_DEBUG PFX "<%s> <%d>\n", __FUNCTION__, __LINE__);}
#include <linux/kfifo.h>
#define LDISC_RX_TASKLET 0
#define LDISC_RX_WORK 1
#if WMT_UART_RX_MODE_WORK
#define LDISC_RX LDISC_RX_WORK
#else
#define LDISC_RX LDISC_RX_TASKLET
#endif
#if (LDISC_RX == LDISC_RX_TASKLET)
#define LDISC_RX_FIFO_SIZE (0x20000) /*8192 bytes*/
struct kfifo *g_stp_uart_rx_fifo = NULL;
spinlock_t g_stp_uart_rx_fifo_spinlock;
struct tasklet_struct g_stp_uart_rx_fifo_tasklet;
#define RX_BUFFER_LEN 1024
unsigned char g_rx_data[RX_BUFFER_LEN];
//static DEFINE_RWLOCK(g_stp_uart_rx_handling_lock);
#elif (LDISC_RX == LDISC_RX_WORK)
#define LDISC_RX_FIFO_SIZE (0x4000) /* 16K bytes shall be enough...... */
#define LDISC_RX_BUF_SIZE (2048) /* 2K bytes in one shot is enough */
UINT8 *g_stp_uart_rx_buf; /* for stp rx data parsing */
struct kfifo *g_stp_uart_rx_fifo = NULL; /* for uart tty data receiving */
spinlock_t g_stp_uart_rx_fifo_spinlock; /* fifo spinlock */
struct workqueue_struct *g_stp_uart_rx_wq; /* rx work queue (do not use system_wq) */
struct work_struct *g_stp_uart_rx_work; /* rx work */
#endif
struct tty_struct *stp_tty = 0x0;
unsigned char tx_buf[MTKSTP_BUFFER_SIZE] = {0x0};
int rd_idx = 0;
int wr_idx = 0;
//struct semaphore buf_mtx;
spinlock_t buf_lock;
static INT32 mtk_wcn_uart_tx(const UINT8 *data, const UINT32 size, UINT32 *written_size);
static inline int stp_uart_tx_wakeup(struct tty_struct *tty)
{
int len = 0;
int written = 0;
int written_count = 0;
static int i = 0;
//unsigned long flags;
// get data from ring buffer
// down(&buf_mtx);
UART_DBG_FUNC("++\n");
//// spin_lock_irqsave(&buf_lock, flags);
#if 0
if((i > 1000) && (i % 5)== 0)
{
UART_INFO_FUNC("i=(%d), ****** drop data from uart******\n", i);
i++;
return 0;
} else {
UART_INFO_FUNC("i=(%d)at stp uart **\n", i);
}
#endif
len = (wr_idx >= rd_idx) ? (wr_idx - rd_idx) : (MTKSTP_BUFFER_SIZE - rd_idx);
if(len > 0 && len < MAX_PACKET_ALLOWED)
{
i++;
/*
* ops->write is called by the kernel to write a series of
* characters to the tty device. The characters may come from
* user space or kernel space. This routine will return the
* number of characters actually accepted for writing.
*/
set_bit(TTY_DO_WRITE_WAKEUP, &tty->flags);
written = tty->ops->write(tty, &tx_buf[rd_idx], len);
if(written != len) {
UART_ERR_FUNC("Error(i-%d):[pid(%d)(%s)]tty-ops->write FAIL!len(%d)wr(%d)wr_i(%d)rd_i(%d)\n\r", i, current->pid, current->comm, len, written, wr_idx, rd_idx);
return -1;
}
written_count = written;
//printk("len = %d, written = %d\n", len, written);
rd_idx = ((rd_idx + written) % MTKSTP_BUFFER_SIZE);
// all data is accepted by UART driver, check again in case roll over
len = (wr_idx >= rd_idx) ? (wr_idx - rd_idx) : (MTKSTP_BUFFER_SIZE - rd_idx);
if(len > 0 && len < MAX_PACKET_ALLOWED)
{
set_bit(TTY_DO_WRITE_WAKEUP, &tty->flags);
written = tty->ops->write(tty, &tx_buf[rd_idx], len);
if (written != len)
{
UART_ERR_FUNC("Error(i-%d):[pid(%d)(%s)]len(%d)wr(%d)wr_i(%d)rd_i(%d)\n\r", i, current->pid, current->comm, len, written, wr_idx, rd_idx);
return -1;
}
rd_idx = ((rd_idx + written) % MTKSTP_BUFFER_SIZE);
written_count += written;
}
else if(len < 0 || len >= MAX_PACKET_ALLOWED)
{
UART_ERR_FUNC("Warnning(i-%d):[pid(%d)(%s)]length verfication(external) warnning,len(%d), wr_idx(%d), rd_idx(%d)!\n\r", i, current->pid, current->comm, len, wr_idx, rd_idx);
return -1;
}
}
else
{
UART_ERR_FUNC("Warnning(i-%d):[pid(%d)(%s)]length verfication(external) warnning,len(%d), wr_idx(%d), rd_idx(%d)!\n\r", i, current->pid, current->comm, len, wr_idx, rd_idx);
return -1;
}
//up(&buf_mtx);
//// spin_unlock_irqrestore(&buf_lock, flags);
UART_DBG_FUNC("--\n");
return written_count;
}
/* ------ LDISC part ------ */
/* stp_uart_tty_open
*
* Called when line discipline changed to HCI_UART.
*
* Arguments:
* tty pointer to tty info structure
* Return Value:
* 0 if success, otherwise error code
*/
static int stp_uart_tty_open(struct tty_struct *tty)
{
UART_DBG_FUNC("stp_uart_tty_opentty: %p\n", tty);
tty->receive_room = 65536;
tty->low_latency = 1;
/* Flush any pending characters in the driver and line discipline. */
/* FIXME: why is this needed. Note don't use ldisc_ref here as the
open path is before the ldisc is referencable */
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,29)
/* definition changed!! */
if (tty->ldisc->ops->flush_buffer) {
tty->ldisc->ops->flush_buffer(tty);
}
#else
if (tty->ldisc.ops->flush_buffer) {
tty->ldisc.ops->flush_buffer(tty);
}
#endif
tty_driver_flush_buffer(tty);
// init_MUTEX(&buf_mtx);
//// spin_lock_init(&buf_lock);
rd_idx = wr_idx = 0;
stp_tty = tty;
mtk_wcn_stp_register_if_tx(STP_UART_IF_TX, mtk_wcn_uart_tx);
return 0;
}
/* stp_uart_tty_close()
*
* Called when the line discipline is changed to something
* else, the tty is closed, or the tty detects a hangup.
*/
static void stp_uart_tty_close(struct tty_struct *tty)
{
UART_DBG_FUNC("stp_uart_tty_close(): tty %p\n", tty);
mtk_wcn_stp_register_if_tx(STP_UART_IF_TX, NULL);
return;
}
/* stp_uart_tty_wakeup()
*
* Callback for transmit wakeup. Called when low level
* device driver can accept more send data.
*
* Arguments: tty pointer to associated tty instance data
* Return Value: None
*/
static void stp_uart_tty_wakeup(struct tty_struct *tty)
{
//printk("%s: start !!\n", __FUNCTION__);
//clear_bit(TTY_DO_WRITE_WAKEUP, &tty->flags);
//stp_uart_tx_wakeup(tty);
return;
}
/* stp_uart_tty_receive()
*
* Called by tty low level driver when receive data is
* available.
*
* Arguments: tty pointer to tty isntance data
* data pointer to received data
* flags pointer to flags for data
* count count of received data in bytes
*
* Return Value: None
*/
#if (LDISC_RX == LDISC_RX_TASKLET)
static int stp_uart_fifo_init(void)
{
int err = 0;
/*add rx fifo*/
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35))
{
spin_lock_init(&g_stp_uart_rx_fifo_spinlock);
g_stp_uart_rx_fifo = kfifo_alloc(LDISC_RX_FIFO_SIZE, GFP_ATOMIC, &g_stp_uart_rx_fifo_spinlock);
if (NULL == g_stp_uart_rx_fifo)
{
UART_ERR_FUNC("kfifo_alloc failed (kernel version < 2.6.35)\n");
err = -1;
}
}
#else
{
g_stp_uart_rx_fifo = kzalloc(sizeof(struct kfifo), GFP_ATOMIC);
if (NULL == g_stp_uart_rx_fifo)
{
err = -2;
UART_ERR_FUNC("kzalloc for g_stp_uart_rx_fifo failed (kernel version > 2.6.35)\n");
}
err = kfifo_alloc(g_stp_uart_rx_fifo, LDISC_RX_FIFO_SIZE, GFP_ATOMIC);
if (0 != err)
{
UART_ERR_FUNC("kfifo_alloc failed, errno(%d)(kernel version > 2.6.35)\n", err);
kfree(g_stp_uart_rx_fifo);
g_stp_uart_rx_fifo = NULL;
err = -3;
}
}
#endif
if (0 == err)
{
if (NULL != g_stp_uart_rx_fifo)
{
kfifo_reset(g_stp_uart_rx_fifo);
UART_ERR_FUNC("stp_uart_fifo_init() success.\n");
}
else
{
err = -4;
UART_ERR_FUNC("abnormal case, err = 0 but g_stp_uart_rx_fifo = NULL, set err to %d\n", err);
}
}
else
{
UART_ERR_FUNC("stp_uart_fifo_init() failed.\n");
}
return err;
}
static int stp_uart_fifo_deinit(void)
{
if (NULL != g_stp_uart_rx_fifo)
{
kfifo_free(g_stp_uart_rx_fifo);
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35))
//do nothing
#else
kfree(g_stp_uart_rx_fifo);
#endif
g_stp_uart_rx_fifo = NULL;
}
return 0;
}
static void stp_uart_rx_handling(unsigned long func_data){
unsigned int how_much_get = 0;
unsigned int how_much_to_get = 0;
unsigned int flag = 0;
// read_lock(&g_stp_uart_rx_handling_lock);
how_much_to_get = kfifo_len(g_stp_uart_rx_fifo);
if (how_much_to_get >= RX_BUFFER_LEN)
{
flag = 1;
UART_INFO_FUNC ("fifolen(%d)\n", how_much_to_get);
}
do{
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35))
how_much_get= kfifo_get(g_stp_uart_rx_fifo, g_rx_data, RX_BUFFER_LEN);
#else
how_much_get= kfifo_out(g_stp_uart_rx_fifo, g_rx_data, RX_BUFFER_LEN);
#endif
//UART_INFO_FUNC ("fifoget(%d)\n", how_much_get);
mtk_wcn_stp_parser_data((UINT8 *)g_rx_data, how_much_get);
how_much_to_get = kfifo_len(g_stp_uart_rx_fifo);
}while(how_much_to_get > 0);
// read_unlock(&g_stp_uart_rx_handling_lock);
if (1 == flag)
{
UART_INFO_FUNC ("finish, fifolen(%d)\n", kfifo_len(g_stp_uart_rx_fifo));
}
}
static void stp_uart_tty_receive(struct tty_struct *tty, const u8 *data, char *flags, int count)
{
unsigned int fifo_avail_len = LDISC_RX_FIFO_SIZE - kfifo_len(g_stp_uart_rx_fifo);
unsigned int how_much_put = 0;
#if 0
{
struct timeval now;
do_gettimeofday(&now);
printk("[+STP][ ][R] %4d --> sec = %lu, --> usec --> %lu\n",
count, now.tv_sec, now.tv_usec);
}
#endif
// write_lock(&g_stp_uart_rx_handling_lock);
if(count > 2000){
/*this is abnormal*/
UART_ERR_FUNC("abnormal: buffer count = %d\n", count);
}
/*How much empty seat?*/
if(fifo_avail_len > 0){
//UART_INFO_FUNC ("fifo left(%d), count(%d)\n", fifo_avail_len, count);
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35))
how_much_put = kfifo_put(g_stp_uart_rx_fifo,(unsigned char *) data, count);
#else
how_much_put = kfifo_in(g_stp_uart_rx_fifo,(unsigned char *) data, count);
#endif
/*schedule it!*/
tasklet_schedule(&g_stp_uart_rx_fifo_tasklet);
}else{
UART_ERR_FUNC("stp_uart_tty_receive rxfifo is full!!\n");
}
#if 0
{
struct timeval now;
do_gettimeofday(&now);
printk("[-STP][ ][R] %4d --> sec = %lu, --> usec --> %lu\n",
count, now.tv_sec, now.tv_usec);
}
#endif
// write_unlock(&g_stp_uart_rx_handling_lock);
}
#elif (LDISC_RX ==LDISC_RX_WORK)
static int stp_uart_fifo_init(void)
{
int err = 0;
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37))
g_stp_uart_rx_buf = vzalloc(LDISC_RX_BUF_SIZE);
if (!g_stp_uart_rx_buf) {
UART_ERR_FUNC("kfifo_alloc failed (kernel version >= 2.6.37)\n");
err = -4;
goto fifo_init_end;
}
#else
g_stp_uart_rx_buf = vmalloc(LDISC_RX_BUF_SIZE);
if (!g_stp_uart_rx_buf) {
UART_ERR_FUNC("kfifo_alloc failed (kernel version < 2.6.37)\n");
err = -4;
goto fifo_init_end;
}
memset(g_stp_uart_rx_buf, 0, LDISC_RX_BUF_SIZE);
#endif
UART_INFO_FUNC("g_stp_uart_rx_buf alloc ok(0x%p, %d)\n",
g_stp_uart_rx_buf, LDISC_RX_BUF_SIZE);
/*add rx fifo*/
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33))
spin_lock_init(&g_stp_uart_rx_fifo_spinlock);
g_stp_uart_rx_fifo = kfifo_alloc(LDISC_RX_FIFO_SIZE, GFP_KERNEL, &g_stp_uart_rx_fifo_spinlock);
if (NULL == g_stp_uart_rx_fifo) {
UART_ERR_FUNC("kfifo_alloc failed (kernel version < 2.6.33)\n");
err = -1;
goto fifo_init_end;
}
#else
/* allocate struct kfifo first */
g_stp_uart_rx_fifo = kzalloc(sizeof(struct kfifo), GFP_KERNEL);
if (NULL == g_stp_uart_rx_fifo) {
err = -2;
UART_ERR_FUNC("kzalloc struct kfifo failed (kernel version > 2.6.33)\n");
goto fifo_init_end;
}
/* allocate kfifo data buffer then */
err = kfifo_alloc(g_stp_uart_rx_fifo, LDISC_RX_FIFO_SIZE, GFP_KERNEL);
if (0 != err) {
UART_ERR_FUNC("kfifo_alloc failed, err(%d)(kernel version > 2.6.33)\n", err);
kfree(g_stp_uart_rx_fifo);
g_stp_uart_rx_fifo = NULL;
err = -3;
goto fifo_init_end;
}
#endif
UART_INFO_FUNC("g_stp_uart_rx_fifo alloc ok\n");
fifo_init_end:
if (0 == err) {
/* kfifo init ok */
kfifo_reset(g_stp_uart_rx_fifo);
UART_DBG_FUNC("g_stp_uart_rx_fifo init success\n");
}
else {
UART_ERR_FUNC("stp_uart_fifo_init() fail(%d)\n", err);
if (g_stp_uart_rx_buf) {
UART_ERR_FUNC("free g_stp_uart_rx_buf\n");
vfree(g_stp_uart_rx_buf);
g_stp_uart_rx_buf = NULL;
}
}
return err;
}
static int stp_uart_fifo_deinit(void)
{
if (g_stp_uart_rx_buf) {
vfree(g_stp_uart_rx_buf);
g_stp_uart_rx_buf = NULL;
}
if (NULL != g_stp_uart_rx_fifo) {
kfifo_free(g_stp_uart_rx_fifo);
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33))
//do nothing
#else
kfree(g_stp_uart_rx_fifo);
#endif
g_stp_uart_rx_fifo = NULL;
}
return 0;
}
static void stp_uart_fifo_reset (void) {
if (NULL != g_stp_uart_rx_fifo) {
kfifo_reset(g_stp_uart_rx_fifo);
}
}
static void stp_uart_rx_worker (struct work_struct *work)
{
unsigned int read;
if (unlikely(!g_stp_uart_rx_fifo)) {
UART_ERR_FUNC("NULL rx fifo!\n");
return;
}
if (unlikely(!g_stp_uart_rx_buf)) {
UART_ERR_FUNC("NULL rx buf!\n");
return;
}
/* run until fifo becomes empty */
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33))
while (kfifo_len(g_stp_uart_rx_fifo)) {
read = kfifo_get(g_stp_uart_rx_fifo, g_stp_uart_rx_buf, LDISC_RX_BUF_SIZE);
//UART_LOUD_FUNC("kfifo_get(%d)\n", read);
if (likely(read)) {
mtk_wcn_stp_parser_data((UINT8 *)g_stp_uart_rx_buf, read);
}
}
#else
while (!kfifo_is_empty(g_stp_uart_rx_fifo)) {
read = kfifo_out(g_stp_uart_rx_fifo, g_stp_uart_rx_buf, LDISC_RX_BUF_SIZE);
UART_DBG_FUNC("kfifo_out(%d)\n", read);
//printk("rx_work:%d\n\r",read);
if (likely(read)) {
//UART_LOUD_FUNC("->%d\n", read);
mtk_wcn_stp_parser_data((UINT8 *)g_stp_uart_rx_buf, read);
//UART_LOUD_FUNC("<-\n", read);
}
}
#endif
return;
}
/* stp_uart_tty_receive()
*
* Called by tty low level driver when receive data is
* available.
*
* Arguments: tty pointer to tty isntance data
* data pointer to received data
* flags pointer to flags for data
* count count of received data in bytes
*
* Return Value: None
*/
static void stp_uart_tty_receive(struct tty_struct *tty, const u8 *data, char *flags, int count)
{
unsigned int written;
//UART_LOUD_FUNC("URX:%d\n", count);
if (unlikely(count > 2000)) {
UART_WARN_FUNC("abnormal: buffer count = %d\n", count);
}
if (unlikely(!g_stp_uart_rx_fifo || !g_stp_uart_rx_work || !g_stp_uart_rx_wq)) {
UART_ERR_FUNC("abnormal g_stp_uart_rx_fifo(0x%p),g_stp_uart_rx_work(0x%p),g_stp_uart_rx_wq(0x%p)\n",
g_stp_uart_rx_fifo, g_stp_uart_rx_work, g_stp_uart_rx_wq);
return;
}
/* need to check available buffer size? skip! */
/* need to lock fifo? skip for single writer single reader! */
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33))
written = kfifo_put(g_stp_uart_rx_fifo, (unsigned char *) data, count);
#else
written = kfifo_in(g_stp_uart_rx_fifo, (unsigned char *) data, count);
#endif
//printk("uart_rx:%d,wr:%d\n\r",count,written);
queue_work(g_stp_uart_rx_wq, g_stp_uart_rx_work);
if (unlikely(written != count)) {
UART_ERR_FUNC("c(%d),w(%d) bytes dropped\n", count, written);
}
return;
}
#else
static void stp_uart_tty_receive(struct tty_struct *tty, const u8 *data, char *flags, int count)
{
#if 0
mtk_wcn_stp_debug_gpio_assert(IDX_STP_RX_PROC, DBG_TIE_LOW);
#endif
if(count > 2000){
/*this is abnormal*/
UART_ERR_FUNC("stp_uart_tty_receive buffer count = %d\n", count);
}
#if 0
{
struct timeval now;
do_gettimeofday(&now);
printk("[+STP][ ][R] %4d --> sec = %d, --> usec --> %d\n",
count, now.tv_sec, now.tv_usec);
}
#endif
/*There are multi-context to access here? Need to spinlock?*/
/*Only one context: flush_to_ldisc in tty_buffer.c*/
mtk_wcn_stp_parser_data((UINT8 *)data, (UINT32)count);
#if 0
mtk_wcn_stp_debug_gpio_assert(IDX_STP_RX_PROC, DBG_TIE_HIGH);
#endif
tty_unthrottle(tty);
#if 0
{
struct timeval now;
do_gettimeofday(&now);
printk("[-STP][ ][R] %4d --> sec = %d, --> usec --> %d\n",
count, now.tv_sec, now.tv_usec);
}
#endif
return;
}
#endif
/* stp_uart_tty_ioctl()
*
* Process IOCTL system call for the tty device.
*
* Arguments:
*
* tty pointer to tty instance data
* file pointer to open file object for device
* cmd IOCTL command code
* arg argument for IOCTL call (cmd dependent)
*
* Return Value: Command dependent
*/
static int stp_uart_tty_ioctl(struct tty_struct *tty, struct file * file,
unsigned int cmd, unsigned long arg)
{
int err = 0;
UART_DBG_FUNC("%s =>\n", __FUNCTION__);
switch (cmd) {
case HCIUARTSETPROTO:
UART_DBG_FUNC("<!!> Set low_latency to TRUE <!!>\n");
tty->low_latency = 1;
break;
default:
UART_DBG_FUNC("<!!> n_tty_ioctl_helper <!!>\n");
err = n_tty_ioctl_helper(tty, file, cmd, arg);
break;
};
UART_DBG_FUNC("%s <=\n", __FUNCTION__);
return err;
}
/*
* We don't provide read/write/poll interface for user space.
*/
static ssize_t stp_uart_tty_read(struct tty_struct *tty, struct file *file,
unsigned char __user *buf, size_t nr)
{
return 0;
}
static ssize_t stp_uart_tty_write(struct tty_struct *tty, struct file *file,
const unsigned char *data, size_t count)
{
return 0;
}
static unsigned int stp_uart_tty_poll(struct tty_struct *tty,
struct file *filp, poll_table *wait)
{
return 0;
}
INT32 mtk_wcn_uart_tx(const UINT8 *data, const UINT32 size, UINT32 *written_size)
{
int room;
//int idx = 0;
//unsigned long flags;
unsigned int len;
//static int tmp=0;
static int i = 0;
if(stp_tty == NULL) return -1;
UART_DBG_FUNC("++\n");
(*written_size) = 0;
// put data into ring buffer
//down(&buf_mtx);
/*
[PatchNeed]
spin_lock_irqsave is redundant
*/
//spin_lock_irqsave(&buf_lock, flags);
room = (wr_idx >= rd_idx) ? (MTKSTP_BUFFER_SIZE - (wr_idx - rd_idx) - 1) : (rd_idx - wr_idx - 1);
UART_DBG_FUNC("r(%d)s(%d)wr_i(%d)rd_i(%d)\n\r", room, size, wr_idx, rd_idx);
/*
[PatchNeed]
Block copy instead of byte copying
*/
if(data == NULL){
UART_ERR_FUNC("pid(%d)(%s): data is NULL\n", current->pid, current->comm);
(*written_size) = 0;
UART_DBG_FUNC("--\n");
return -2;
}
#if 1
if(unlikely(size > room)){
UART_ERR_FUNC("pid(%d)(%s)room is not available, size needed(%d), wr_idx(%d), rd_idx(%d), room left(%d)\n", current->pid, current->comm, size, wr_idx, rd_idx, room);
UART_DBG_FUNC("--\n");
(*written_size) = 0;
return -3;
}
else {
/*
wr_idx : the position next to write
rd_idx : the position next to read
*/
len = min(size, MTKSTP_BUFFER_SIZE - (unsigned int)wr_idx);
memcpy(&tx_buf[wr_idx], &data[0], len);
memcpy(&tx_buf[0], &data[len], size - len);
wr_idx = (wr_idx + size) % MTKSTP_BUFFER_SIZE;
UART_DBG_FUNC("r(%d)s(%d)wr_i(%d)rd_i(%d)\n\r", room, size, wr_idx, rd_idx);
i++;
if (size < 0)
{
UART_ERR_FUNC("Error(i-%d):[pid(%d)(%s)]len(%d)size(%d)wr_i(%d)rd_i(%d)\n\r", i, current->pid, current->comm, len, size, wr_idx, rd_idx);
(*written_size) = 0;
}
else if (size == 0)
{
(*written_size) = 0;
}
else if (size < MAX_PACKET_ALLOWED)
{
//only size ~(0, 2000) is allowed
(*written_size) = stp_uart_tx_wakeup(stp_tty);
if(*written_size < 0)
{
//reset read and write index of tx_buffer, is there any risk?
wr_idx = rd_idx = 0;
*written_size = 0;
}
}
else
{
//we filter all packet with size > 2000
UART_ERR_FUNC("Warnning(i-%d):[pid(%d)(%s)]len(%d)size(%d)wr_i(%d)rd_i(%d)\n\r", i, current->pid, current->comm, len, size, wr_idx, rd_idx);
(*written_size)= 0;
}
}
#endif
#if 0
while((room > 0) && (size > 0))
{
tx_buf[wr_idx] = data[idx];
wr_idx = ((wr_idx + 1) % MTKSTP_BUFFER_SIZE);
idx++;
room--;
size--;
(*written_size)++;
}
#endif
//up(&buf_mtx);
/*
[PatchNeed]
spin_lock_irqsave is redundant
*/
//// spin_lock_irqsave(&buf_lock, flags);
/*[PatchNeed]To add a tasklet to shedule Uart Tx*/
UART_DBG_FUNC("--\n");
return 0;
}
static int __init mtk_wcn_stp_uart_init(void)
{
static struct tty_ldisc_ops stp_uart_ldisc;
int err;
int fifo_init_done =0;
UART_INFO_FUNC("mtk_wcn_stp_uart_init(): MTK STP UART driver\n");
#if (LDISC_RX == LDISC_RX_TASKLET)
err = stp_uart_fifo_init();
if (err != 0)
{
goto init_err;
}
fifo_init_done = 1;
/*init rx tasklet*/
tasklet_init(&g_stp_uart_rx_fifo_tasklet, stp_uart_rx_handling, (unsigned long) 0);
#elif (LDISC_RX == LDISC_RX_WORK)
err = stp_uart_fifo_init();
if (err != 0) {
UART_ERR_FUNC("stp_uart_fifo_init(WORK) error(%d)\n", err);
err = -EFAULT;
goto init_err;
}
fifo_init_done = 1;
g_stp_uart_rx_work = vmalloc(sizeof(struct work_struct));
if (!g_stp_uart_rx_work) {
UART_ERR_FUNC("vmalloc work_struct(%d) fail\n", sizeof(struct work_struct));
err = -ENOMEM;
goto init_err;
}
g_stp_uart_rx_wq = create_singlethread_workqueue("mtk_urxd");
if (!g_stp_uart_rx_wq) {
UART_ERR_FUNC("create_singlethread_workqueue fail\n");
err = -ENOMEM;
goto init_err;
}
/* init rx work */
INIT_WORK(g_stp_uart_rx_work, stp_uart_rx_worker);
#endif
/* Register the tty discipline */
memset(&stp_uart_ldisc, 0, sizeof (stp_uart_ldisc));
stp_uart_ldisc.magic = TTY_LDISC_MAGIC;
stp_uart_ldisc.name = "n_mtkstp";
stp_uart_ldisc.open = stp_uart_tty_open;
stp_uart_ldisc.close = stp_uart_tty_close;
stp_uart_ldisc.read = stp_uart_tty_read;
stp_uart_ldisc.write = stp_uart_tty_write;
stp_uart_ldisc.ioctl = stp_uart_tty_ioctl;
stp_uart_ldisc.poll = stp_uart_tty_poll;
stp_uart_ldisc.receive_buf = stp_uart_tty_receive;
stp_uart_ldisc.write_wakeup = stp_uart_tty_wakeup;
stp_uart_ldisc.owner = THIS_MODULE;
if ((err = tty_register_ldisc(N_MTKSTP, &stp_uart_ldisc)))
{
UART_ERR_FUNC("MTK STP line discipline registration failed. (%d)\n", err);
goto init_err;
}
/*
mtk_wcn_stp_register_if_tx( mtk_wcn_uart_tx);
*/
return 0;
init_err:
#if (LDISC_RX == LDISC_RX_TASKLET)
/* nothing */
if (fifo_init_done) {
stp_uart_fifo_deinit();
}
#elif (LDISC_RX == LDISC_RX_WORK)
if (g_stp_uart_rx_wq) {
destroy_workqueue(g_stp_uart_rx_wq);
g_stp_uart_rx_wq = NULL;
}
if (g_stp_uart_rx_work) {
vfree(g_stp_uart_rx_work);
}
if (fifo_init_done) {
stp_uart_fifo_deinit();
}
#endif
UART_ERR_FUNC("init fail, return(%d)\n", err);
return err;
}
static void __exit mtk_wcn_stp_uart_exit(void)
{
int err;
mtk_wcn_stp_register_if_tx(STP_UART_IF_TX, NULL); // unregister if_tx function
/* Release tty registration of line discipline */
if ((err = tty_unregister_ldisc(N_MTKSTP)))
{
UART_ERR_FUNC("Can't unregister MTK STP line discipline (%d)\n", err);
}
#if (LDISC_RX == LDISC_RX_TASKLET)
tasklet_kill(&g_stp_uart_rx_fifo_tasklet);
stp_uart_fifo_deinit();
#elif (LDISC_RX == LDISC_RX_WORK)
if (g_stp_uart_rx_work) {
cancel_work_sync(g_stp_uart_rx_work);
}
if (g_stp_uart_rx_wq) {
destroy_workqueue(g_stp_uart_rx_wq);
g_stp_uart_rx_wq = NULL;
}
if (g_stp_uart_rx_work) {
vfree(g_stp_uart_rx_work);
g_stp_uart_rx_work = NULL;
}
stp_uart_fifo_deinit();
#endif
return;
}
module_init(mtk_wcn_stp_uart_init);
module_exit(mtk_wcn_stp_uart_exit);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("MediaTek Inc WCN_SE_CS3");
MODULE_DESCRIPTION("STP-HIF UART Interface");

View File

@@ -1,179 +0,0 @@
#include <linux/init.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/fs.h>
#include <linux/cdev.h>
#include <linux/sched.h>
#include <asm/current.h>
#include <asm/uaccess.h>
#include <linux/fcntl.h>
#include <linux/poll.h>
#include <linux/time.h>
#include <linux/delay.h>
#include "wmt_exp.h"
#include "stp_exp.h"
MODULE_LICENSE("Dual BSD/GPL");
#define WIFI_DRIVER_NAME "mtk_wmt_WIFI_chrdev"
#if WMT_PLAT_APEX
#define WIFI_DEV_MAJOR 194 // never used number
#else
#define WIFI_DEV_MAJOR 153 // never used number
#endif
#define PFX "[MTK-WIFI] "
#define WIFI_LOG_DBG 3
#define WIFI_LOG_INFO 2
#define WIFI_LOG_WARN 1
#define WIFI_LOG_ERR 0
unsigned int gDbgLevel = WIFI_LOG_INFO;
#define WIFI_DBG_FUNC(fmt, arg...) if(gDbgLevel >= WIFI_LOG_DBG){ printk(PFX "%s: " fmt, __FUNCTION__ ,##arg);}
#define WIFI_INFO_FUNC(fmt, arg...) if(gDbgLevel >= WIFI_LOG_INFO){ printk(PFX "%s: " fmt, __FUNCTION__ ,##arg);}
#define WIFI_WARN_FUNC(fmt, arg...) if(gDbgLevel >= WIFI_LOG_WARN){ printk(PFX "%s: " fmt, __FUNCTION__ ,##arg);}
#define WIFI_ERR_FUNC(fmt, arg...) if(gDbgLevel >= WIFI_LOG_ERR){ printk(PFX "%s: " fmt, __FUNCTION__ ,##arg);}
#define WIFI_TRC_FUNC(f) if(gDbgLevel >= WIFI_LOG_DBG){printk(PFX "<%s> <%d>\n", __FUNCTION__, __LINE__);}
#define VERSION "1.0"
static int WIFI_devs = 1; /* device count */
static int WIFI_major = WIFI_DEV_MAJOR; /* dynamic allocation */
module_param(WIFI_major, uint, 0);
static struct cdev WIFI_cdev;
volatile int retflag = 0;
static struct semaphore wr_mtx;
static int WIFI_open(struct inode *inode, struct file *file)
{
WIFI_INFO_FUNC("%s: major %d minor %d (pid %d)\n", __func__,
imajor(inode),
iminor(inode),
current->pid
);
return 0;
}
static int WIFI_close(struct inode *inode, struct file *file)
{
WIFI_INFO_FUNC("%s: major %d minor %d (pid %d)\n", __func__,
imajor(inode),
iminor(inode),
current->pid
);
retflag = 0;
return 0;
}
ssize_t WIFI_write(struct file *filp, const char __user *buf, size_t count, loff_t *f_pos)
{
int retval = -EIO;
char local[4] = {0};
static int opened = 0;
down(&wr_mtx);
if (count > 0) {
if (0 == copy_from_user(local, buf, (count > 4) ? 4 : count)) {
WIFI_INFO_FUNC("WIFI_write %c\n", local[0]);
if (local[0] == '0' && opened == 1) {
//TODO
//Configure the EINT pin to GPIO mode.
if (MTK_WCN_BOOL_FALSE == mtk_wcn_wmt_func_off(WMTDRV_TYPE_WIFI)) {
WIFI_INFO_FUNC("WMT turn off WIFI fail!\n");
}
else {
WIFI_INFO_FUNC("WMT turn off WIFI OK!\n");
opened = 0;
retval = count;
}
}
else if (local[0] == '1') {
//TODO
//Disable EINT(external interrupt), and set the GPIO to EINT mode.
if (MTK_WCN_BOOL_FALSE == mtk_wcn_wmt_func_on(WMTDRV_TYPE_WIFI)) {
WIFI_WARN_FUNC("WMT turn on WIFI fail!\n");
}
else {
opened = 1;
retval = count;
WIFI_INFO_FUNC("WMT turn on WIFI success!\n");
}
}
}
}
up(&wr_mtx);
return (retval);
}
struct file_operations WIFI_fops = {
.open = WIFI_open,
.release = WIFI_close,
.write = WIFI_write,
};
static int WIFI_init(void)
{
dev_t dev = MKDEV(WIFI_major, 0);
int alloc_ret = 0;
int cdev_err = 0;
/*static allocate chrdev*/
alloc_ret = register_chrdev_region(dev, 1, WIFI_DRIVER_NAME);
if (alloc_ret) {
WIFI_ERR_FUNC("fail to register chrdev\n");
return alloc_ret;
}
cdev_init(&WIFI_cdev, &WIFI_fops);
WIFI_cdev.owner = THIS_MODULE;
cdev_err = cdev_add(&WIFI_cdev, dev, WIFI_devs);
if (cdev_err) {
goto error;
}
sema_init(&wr_mtx, 1);
WIFI_INFO_FUNC("%s driver(major %d) installed.\n", WIFI_DRIVER_NAME, WIFI_major);
retflag = 0;
return 0;
error:
if (cdev_err == 0) {
cdev_del(&WIFI_cdev);
}
if (alloc_ret == 0) {
unregister_chrdev_region(dev, WIFI_devs);
}
return -1;
}
static void WIFI_exit(void)
{
dev_t dev = MKDEV(WIFI_major, 0);
retflag = 0;
cdev_del(&WIFI_cdev);
unregister_chrdev_region(dev, WIFI_devs);
WIFI_INFO_FUNC("%s driver removed.\n", WIFI_DRIVER_NAME);
}
module_init(WIFI_init);
module_exit(WIFI_exit);

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@@ -1,346 +0,0 @@
/* Copyright Statement:
*
* This software/firmware and related documentation ("MediaTek Software") are
* protected under relevant copyright laws. The information contained herein
* is confidential and proprietary to MediaTek Inc. and/or its licensors.
* Without the prior written permission of MediaTek inc. and/or its licensors,
* any reproduction, modification, use or disclosure of MediaTek Software,
* and information contained herein, in whole or in part, shall be strictly prohibited.
*
* MediaTek Inc. (C) 2010. All rights reserved.
*
* BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
* THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
* CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
* SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
* STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
* CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
*
* The following software/firmware and/or related documentation ("MediaTek Software")
* have been modified by MediaTek Inc. All revisions are subject to any receiver's
* applicable license agreements with MediaTek Inc.
*/
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
/*******************************************************************************
* Copyright (c) 2009 MediaTek Inc.
*
* All rights reserved. Copying, compilation, modification, distribution
* or any other use whatsoever of this material is strictly prohibited
* except in accordance with a Software License Agreement with
* MediaTek Inc.
********************************************************************************
*/
/*******************************************************************************
* LEGAL DISCLAIMER
*
* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND
* AGREES THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK
* SOFTWARE") RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE
* PROVIDED TO BUYER ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY
* DISCLAIMS ANY AND ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT
* LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
* PARTICULAR PURPOSE OR NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE
* ANY WARRANTY WHATSOEVER WITH RESPECT TO THE SOFTWARE OF ANY THIRD PARTY
* WHICH MAY BE USED BY, INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK
* SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY
* WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE
* FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S SPECIFICATION OR TO
* CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
*
* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL
* BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT
* ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY
* BUYER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
*
* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT
* OF LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING
* THEREOF AND RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN
* FRANCISCO, CA, UNDER THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE
* (ICC).
********************************************************************************
*/
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
#ifdef DFT_TAG
#undef DFT_TAG
#endif
#define DFT_TAG "[WMT-CMB-HW]"
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
#include "osal.h"
#include "mtk_wcn_cmb_hw.h"
#include "wmt_plat.h"
#include "wmt_exp.h"
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
#define DFT_RTC_STABLE_TIME 100
#define DFT_LDO_STABLE_TIME 100
#define DFT_RST_STABLE_TIME 30
#define DFT_OFF_STABLE_TIME 10
#define DFT_ON_STABLE_TIME 30
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
PWR_SEQ_TIME gPwrSeqTime;
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
INT32
mtk_wcn_cmb_hw_pwr_off (VOID)
{
INT32 iRet = 0;
WMT_INFO_FUNC("CMB-HW, hw_pwr_off start\n");
/*1. disable irq --> should be done when do wmt-ic swDeinit period*/
// TODO:[FixMe][GeorgeKuo] clarify this
/*2. set bgf eint/all eint to deinit state, namely input low state*/
iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_DEINIT);
iRet += wmt_plat_gpio_ctrl(PIN_BGF_EINT, PIN_STA_DEINIT);
WMT_INFO_FUNC("CMB-HW, BGF_EINT IRQ unregistered and set BGF_EINT GPIO to correct state!\n");
/* 2.1 set ALL_EINT pin to correct state even it is not used currently */
iRet += wmt_plat_eirq_ctrl(PIN_ALL_EINT, PIN_STA_EINT_DIS);
WMT_INFO_FUNC("CMB-HW, ALL_EINT IRQ unregistered and disabled\n");
iRet += wmt_plat_gpio_ctrl(PIN_ALL_EINT, PIN_STA_DEINIT);
/* 2.2 deinit gps sync */
iRet += wmt_plat_gpio_ctrl(PIN_GPS_SYNC, PIN_STA_DEINIT);
/*3. set audio interface to CMB_STUB_AIF_0, BT PCM OFF, I2S OFF*/
iRet += wmt_plat_audio_ctrl(CMB_STUB_AIF_0, CMB_STUB_AIF_CTRL_DIS);
/*4. set control gpio into deinit state, namely input low state*/
iRet += wmt_plat_gpio_ctrl(PIN_SDIO_GRP, PIN_STA_DEINIT);
iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_OUT_L);
iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_OUT_L);
/*5. set uart tx/rx into deinit state, namely input low state*/
iRet += wmt_plat_gpio_ctrl(PIN_UART_GRP, PIN_STA_DEINIT);
/* 6. Last, LDO output low */
iRet += wmt_plat_gpio_ctrl(PIN_LDO, PIN_STA_OUT_L);
/*7. deinit gps_lna*/
iRet += wmt_plat_gpio_ctrl(PIN_GPS_LNA, PIN_STA_DEINIT);
WMT_INFO_FUNC("CMB-HW, hw_pwr_off finish\n");
return iRet;
}
INT32
mtk_wcn_cmb_hw_pwr_on (VOID)
{
static UINT32 _pwr_first_time = 1;
INT32 iRet = 0;
WMT_INFO_FUNC("CMB-HW, hw_pwr_on start\n");
#if 0 //IRQ should in inact state before power on, so this step is not needed
/* disable interrupt firstly */
iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_EINT_DIS);
iRet += wmt_plat_eirq_ctrl(PIN_ALL_EINT, PIN_STA_EINT_DIS);
#endif
/*set all control and eint gpio to init state, namely input low mode*/
iRet += wmt_plat_gpio_ctrl(PIN_LDO, PIN_STA_INIT);
iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_INIT);
iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_INIT);
iRet += wmt_plat_gpio_ctrl(PIN_SDIO_GRP, PIN_STA_INIT);
iRet += wmt_plat_gpio_ctrl(PIN_BGF_EINT, PIN_STA_INIT);
iRet += wmt_plat_gpio_ctrl(PIN_ALL_EINT, PIN_STA_INIT);
iRet += wmt_plat_gpio_ctrl(PIN_GPS_SYNC, PIN_STA_INIT);
iRet += wmt_plat_gpio_ctrl(PIN_GPS_LNA, PIN_STA_INIT);
// wmt_plat_gpio_ctrl(PIN_WIFI_EINT, PIN_STA_INIT); /* WIFI_EINT is controlled by SDIO host driver */
// TODO: [FixMe][George]:WIFI_EINT is used in common SDIO
/*1. pull high LDO to supply power to chip*/
iRet += wmt_plat_gpio_ctrl(PIN_LDO, PIN_STA_OUT_H);
osal_msleep(gPwrSeqTime.ldoStableTime);
/* 2. export RTC clock to chip*/
if (_pwr_first_time) {
/* rtc clock should be output all the time, so no need to enable output again*/
iRet += wmt_plat_gpio_ctrl(PIN_RTC, PIN_STA_INIT);
osal_msleep(gPwrSeqTime.rtcStableTime);
WMT_INFO_FUNC("CMB-HW, rtc clock exported\n");
}
/*3. set UART Tx/Rx to UART mode*/
iRet += wmt_plat_gpio_ctrl(PIN_UART_GRP, PIN_STA_INIT);
/*4. PMU->output low, RST->output low, sleep off stable time*/
iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_OUT_L);
iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_OUT_L);
osal_msleep(gPwrSeqTime.offStableTime);
/*5. PMU->output high, sleep rst stable time*/
iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_OUT_H);
osal_msleep(gPwrSeqTime.rstStableTime);
/*6. RST->output high, sleep on stable time*/
iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_OUT_H);
osal_msleep(gPwrSeqTime.onStableTime);
/*7. set audio interface to CMB_STUB_AIF_1, BT PCM ON, I2S OFF*/
/* BT PCM bus default mode. Real control is done by audio */
iRet += wmt_plat_audio_ctrl(CMB_STUB_AIF_1, CMB_STUB_AIF_CTRL_DIS);
/*8. set EINT< -ommited-> move this to WMT-IC module, where common sdio interface will be identified and do proper operation*/
// TODO: [FixMe][GeorgeKuo] double check if BGF_INT is implemented ok
iRet += wmt_plat_gpio_ctrl(PIN_BGF_EINT, PIN_STA_MUX);
iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_INIT);
iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_EINT_DIS);
WMT_INFO_FUNC("CMB-HW, BGF_EINT IRQ registered and disabled \n");
/* 8.1 set ALL_EINT pin to correct state even it is not used currently */
iRet += wmt_plat_gpio_ctrl(PIN_ALL_EINT, PIN_STA_MUX);
iRet += wmt_plat_eirq_ctrl(PIN_ALL_EINT, PIN_STA_INIT);
iRet += wmt_plat_eirq_ctrl(PIN_ALL_EINT, PIN_STA_EINT_DIS);
WMT_INFO_FUNC("CMB-HW, hw_pwr_on finish (%d)\n", iRet);
_pwr_first_time = 0;
return iRet;
}
INT32
mtk_wcn_cmb_hw_rst (VOID)
{
INT32 iRet = 0;
WMT_INFO_FUNC("CMB-HW, hw_rst start, eirq should be disabled before this step\n");
/*1. PMU->output low, RST->output low, sleep off stable time*/
iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_OUT_L);
iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_OUT_L);
osal_msleep(gPwrSeqTime.offStableTime);
/*2. PMU->output high, sleep rst stable time*/
iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_OUT_H);
osal_msleep(gPwrSeqTime.rstStableTime);
/*3. RST->output high, sleep on stable time*/
iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_OUT_H);
osal_msleep(gPwrSeqTime.onStableTime);
WMT_INFO_FUNC("CMB-HW, hw_rst finish, eirq should be enabled after this step\n");
return 0;
}
static VOID
mtk_wcn_cmb_hw_dmp_seq (VOID)
{
PUINT32 pTimeSlot = (PUINT32)&gPwrSeqTime;
WMT_INFO_FUNC("combo chip power on sequence time, RTC (%d), LDO (%d), RST(%d), OFF(%d), ON(%d)\n",
pTimeSlot[0], /**pTimeSlot++,*/
pTimeSlot[1],
pTimeSlot[2],
pTimeSlot[3],
pTimeSlot[4]
);
return;
}
INT32
mtk_wcn_cmb_hw_init (
P_PWR_SEQ_TIME pPwrSeqTime
)
{
if (NULL != pPwrSeqTime &&
pPwrSeqTime->ldoStableTime > 0 &&
pPwrSeqTime->rtcStableTime > 0 &&
pPwrSeqTime->offStableTime > DFT_OFF_STABLE_TIME &&
pPwrSeqTime->onStableTime > DFT_ON_STABLE_TIME &&
pPwrSeqTime->rstStableTime > DFT_RST_STABLE_TIME
) {
/*memcpy may be more performance*/
WMT_DBG_FUNC("setting hw init sequence parameters\n");
osal_memcpy(&gPwrSeqTime, pPwrSeqTime, osal_sizeof(gPwrSeqTime));
}
else {
WMT_WARN_FUNC("invalid pPwrSeqTime parameter, use default hw init sequence parameters\n");
gPwrSeqTime.ldoStableTime = DFT_LDO_STABLE_TIME;
gPwrSeqTime.offStableTime = DFT_OFF_STABLE_TIME;
gPwrSeqTime.onStableTime = DFT_ON_STABLE_TIME;
gPwrSeqTime.rstStableTime = DFT_RST_STABLE_TIME;
gPwrSeqTime.rtcStableTime = DFT_RTC_STABLE_TIME;
}
mtk_wcn_cmb_hw_dmp_seq();
return 0;
}
INT32
mtk_wcn_cmb_hw_deinit (VOID)
{
WMT_WARN_FUNC("mtk_wcn_cmb_hw_deinit start, set to default hw init sequence parameters\n");
gPwrSeqTime.ldoStableTime = DFT_LDO_STABLE_TIME;
gPwrSeqTime.offStableTime = DFT_OFF_STABLE_TIME;
gPwrSeqTime.onStableTime = DFT_ON_STABLE_TIME;
gPwrSeqTime.rstStableTime = DFT_RST_STABLE_TIME;
gPwrSeqTime.rtcStableTime = DFT_RTC_STABLE_TIME;
WMT_WARN_FUNC("mtk_wcn_cmb_hw_deinit finish\n");
return 0;
}

View File

@@ -1,348 +0,0 @@
/* Copyright Statement:
*
* This software/firmware and related documentation ("MediaTek Software") are
* protected under relevant copyright laws. The information contained herein
* is confidential and proprietary to MediaTek Inc. and/or its licensors.
* Without the prior written permission of MediaTek inc. and/or its licensors,
* any reproduction, modification, use or disclosure of MediaTek Software,
* and information contained herein, in whole or in part, shall be strictly prohibited.
*
* MediaTek Inc. (C) 2010. All rights reserved.
*
* BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
* THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
* CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
* SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
* STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
* CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
*
* The following software/firmware and/or related documentation ("MediaTek Software")
* have been modified by MediaTek Inc. All revisions are subject to any receiver's
* applicable license agreements with MediaTek Inc.
*/
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
/*******************************************************************************
* Copyright (c) 2009 MediaTek Inc.
*
* All rights reserved. Copying, compilation, modification, distribution
* or any other use whatsoever of this material is strictly prohibited
* except in accordance with a Software License Agreement with
* MediaTek Inc.
********************************************************************************
*/
/*******************************************************************************
* LEGAL DISCLAIMER
*
* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND
* AGREES THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK
* SOFTWARE") RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE
* PROVIDED TO BUYER ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY
* DISCLAIMS ANY AND ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT
* LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
* PARTICULAR PURPOSE OR NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE
* ANY WARRANTY WHATSOEVER WITH RESPECT TO THE SOFTWARE OF ANY THIRD PARTY
* WHICH MAY BE USED BY, INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK
* SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY
* WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE
* FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S SPECIFICATION OR TO
* CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
*
* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL
* BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT
* ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY
* BUYER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
*
* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT
* OF LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING
* THEREOF AND RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN
* FRANCISCO, CA, UNDER THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE
* (ICC).
********************************************************************************
*/
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
#define CMB_STUB_LOG_INFO(fmt, arg...) printk(KERN_INFO fmt, ##arg)
#define CMB_STUB_LOG_WARN(fmt, arg...) printk(KERN_WARNING fmt, ##arg)
#define CMB_STUB_LOG_DBG(fmt, arg...) printk(KERN_DEBUG fmt, ##arg)
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
#include <linux/kernel.h>
#include <linux/module.h>
//#include <cust_gpio_usage.h>
//#include <mach/mt6573_pll.h> /* clr_device_working_ability, MT65XX_PDN_PERI_UART3, DEEP_IDLE_STATE, MT65XX_PDN_PERI_MSDC2 */
//#include <mach/mt6575_dcm.h>
// TODO: [FixMe][GeorgeKuo] keep prototype unchanged temporarily. Replace it
// when integrate MT6628 & ALPS & other built-in modules, such as AUDIO.
//#include <mach/mt_combo.h>
#include <mach/mtk_wcn_cmb_stub.h>
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
static wmt_aif_ctrl_cb cmb_stub_aif_ctrl_cb = NULL;
static wmt_func_ctrl_cb cmb_stub_func_ctrl_cb = NULL;
static CMB_STUB_AIF_X cmb_stub_aif_stat = CMB_STUB_AIF_0;
/* A temp translation table between COMBO_AUDIO_STATE_X and CMB_STUB_AIF_X.
* This is used for ALPS backward compatible ONLY!!! Remove this table, related
* functions, and type definition after modifying other kernel built-in modules,
* such as AUDIO. [FixMe][GeorgeKuo]
*/
static CMB_STUB_AIF_X audio2aif[] = {
[COMBO_AUDIO_STATE_0] = CMB_STUB_AIF_0,
[COMBO_AUDIO_STATE_1] = CMB_STUB_AIF_1,
[COMBO_AUDIO_STATE_2] = CMB_STUB_AIF_2,
[COMBO_AUDIO_STATE_3] = CMB_STUB_AIF_3,
};
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
/*!
* \brief A registration function for WMT-PLAT to register itself to CMB-STUB.
*
* An MTK-WCN-CMB-STUB registration function provided to WMT-PLAT to register
* itself and related callback functions when driver being loaded into kernel.
*
* \param p_stub_cb a pointer carrying CMB_STUB_CB information
*
* \retval 0 operation success
* \retval -1 invalid parameters
*/
int
mtk_wcn_cmb_stub_reg (P_CMB_STUB_CB p_stub_cb)
{
if ( (!p_stub_cb )
|| (p_stub_cb->size != sizeof(CMB_STUB_CB)) ) {
CMB_STUB_LOG_WARN( "[cmb_stub] invalid p_stub_cb:0x%p size(%d)\n",
p_stub_cb, (p_stub_cb) ? p_stub_cb->size: 0);
return -1;
}
CMB_STUB_LOG_DBG( "[cmb_stub] registered, p_stub_cb:0x%p size(%d)\n",
p_stub_cb, p_stub_cb->size);
cmb_stub_aif_ctrl_cb = p_stub_cb->aif_ctrl_cb;
cmb_stub_func_ctrl_cb = p_stub_cb->func_ctrl_cb;
return 0;
}
EXPORT_SYMBOL(mtk_wcn_cmb_stub_reg);
/*!
* \brief A unregistration function for WMT-PLAT to unregister from CMB-STUB.
*
* An MTK-WCN-CMB-STUB unregistration function provided to WMT-PLAT to
* unregister itself and clear callback function references.
*
* \retval 0 operation success
*/
int
mtk_wcn_cmb_stub_unreg (void)
{
cmb_stub_aif_ctrl_cb = NULL;
cmb_stub_func_ctrl_cb = NULL;
CMB_STUB_LOG_INFO("[cmb_stub] unregistered \n"); /* KERN_DEBUG */
return 0;
}
EXPORT_SYMBOL(mtk_wcn_cmb_stub_unreg);
/* stub functions for kernel to control audio path pin mux */
int mtk_wcn_cmb_stub_aif_ctrl (CMB_STUB_AIF_X state, CMB_STUB_AIF_CTRL ctrl)
{
int ret;
if ( (CMB_STUB_AIF_MAX <= state)
|| (CMB_STUB_AIF_CTRL_MAX <= ctrl) ) {
CMB_STUB_LOG_WARN("[cmb_stub] aif_ctrl invalid (%d, %d)\n", state, ctrl);
return -1;
}
/* avoid the early interrupt before we register the eirq_handler */
if (cmb_stub_aif_ctrl_cb){
ret = (*cmb_stub_aif_ctrl_cb)(state, ctrl);
CMB_STUB_LOG_INFO( "[cmb_stub] aif_ctrl_cb state(%d->%d) ctrl(%d) ret(%d)\n",
cmb_stub_aif_stat , state, ctrl, ret); /* KERN_DEBUG */
cmb_stub_aif_stat = state;
return ret;
}
else {
CMB_STUB_LOG_WARN("[cmb_stub] aif_ctrl_cb null \n");
return -2;
}
}
EXPORT_SYMBOL(mtk_wcn_cmb_stub_aif_ctrl);
/* Use a temp translation table between COMBO_AUDIO_STATE_X and CMB_STUB_AIF_X
* for ALPS backward compatible ONLY!!! Remove this table, related functions,
* and type definition after modifying other kernel built-in modules, such as
* AUDIO. [FixMe][GeorgeKuo]
*/
int
mt_combo_audio_ctrl_ex (COMBO_AUDIO_STATE state, u32 clt_ctrl)
{
/* input sanity check */
if (COMBO_AUDIO_STATE_MAX < state) {
CMB_STUB_LOG_WARN("[cmb_stub] invalid COMBO_AUDIO_STATE(%d)\n", state);
return -1;
}
return mtk_wcn_cmb_stub_aif_ctrl(audio2aif[state],
(clt_ctrl) ? CMB_STUB_AIF_CTRL_EN : CMB_STUB_AIF_CTRL_DIS );
}
EXPORT_SYMBOL(mt_combo_audio_ctrl_ex);
void mtk_wcn_cmb_stub_func_ctrl (unsigned int type, unsigned int on) {
if (cmb_stub_func_ctrl_cb) {
(*cmb_stub_func_ctrl_cb)(type, on);
}
else {
CMB_STUB_LOG_WARN("[cmb_stub] func_ctrl_cb null \n");
}
}
EXPORT_SYMBOL(mtk_wcn_cmb_stub_func_ctrl);
/*platform-related APIs*/
//void clr_device_working_ability(UINT32 clockId, MT6573_STATE state);
//void set_device_working_ability(UINT32 clockId, MT6573_STATE state);
static int
_mt_combo_plt_do_deep_idle(COMBO_IF src, int enter) {
int ret = -1;
const char *combo_if_name[] =
{ "COMBO_IF_UART",
"COMBO_IF_MSDC"
};
if(src != COMBO_IF_UART && src!= COMBO_IF_MSDC){
CMB_STUB_LOG_WARN("src = %d is error\n", src);
return ret;
}
if(src >= 0 && src < COMBO_IF_MAX){
CMB_STUB_LOG_INFO("src = %s, to enter deep idle? %d \n",
combo_if_name[src],
enter);
}
/*TODO: For Common SDIO configuration, we need to do some judgement between STP and WIFI
to decide if the msdc will enter deep idle safely*/
switch(src){
case COMBO_IF_UART:
if(enter == 0){
//clr_device_working_ability(MT65XX_PDN_PERI_UART3, DEEP_IDLE_STATE);
//disable_dpidle_by_bit(MT65XX_PDN_PERI_UART2);
} else {
//set_device_working_ability(MT65XX_PDN_PERI_UART3, DEEP_IDLE_STATE);
//enable_dpidle_by_bit(MT65XX_PDN_PERI_UART2);
}
ret = 0;
break;
case COMBO_IF_MSDC:
if(enter == 0){
//clr_device_working_ability(MT65XX_PDN_PERI_MSDC2, DEEP_IDLE_STATE);
} else {
//set_device_working_ability(MT65XX_PDN_PERI_MSDC2, DEEP_IDLE_STATE);
}
ret = 0;
break;
default:
ret = -1;
break;
}
return ret;
}
int
mt_combo_plt_enter_deep_idle (
COMBO_IF src
) {
//return 0;
// TODO: [FixMe][GeorgeKuo] handling this depends on common UART or common SDIO
return _mt_combo_plt_do_deep_idle(src, 1);
}
EXPORT_SYMBOL(mt_combo_plt_enter_deep_idle);
int
mt_combo_plt_exit_deep_idle (
COMBO_IF src
) {
//return 0;
// TODO: [FixMe][GeorgeKuo] handling this depends on common UART or common SDIO
return _mt_combo_plt_do_deep_idle(src, 0);
}
EXPORT_SYMBOL(mt_combo_plt_exit_deep_idle);

View File

@@ -1,110 +0,0 @@
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
#if CONFIG_HAS_WAKELOCK
#include <linux/wakelock.h>
#define CFG_WMT_WAKELOCK_SUPPORT 1
#endif
#ifdef DFT_TAG
#undef DFT_TAG
#endif
#define DFT_TAG "[WMT-PLAT]"
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
/* ALPS and COMBO header files */
#include <mach/mtk_wcn_cmb_stub.h>
/* MTK_WCN_COMBO header files */
#include "wmt_plat.h"
#include "wmt_plat_stub.h"
#include "wmt_exp.h"
#include <mach/mtk_wcn_cmb_stub.h>
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
static VOID wmt_plat_func_ctrl (UINT32 type, UINT32 on);
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
static VOID wmt_plat_func_ctrl (UINT32 type, UINT32 on)
{
if (on) {
mtk_wcn_wmt_func_on((ENUM_WMTDRV_TYPE_T)type);
}
else {
mtk_wcn_wmt_func_off((ENUM_WMTDRV_TYPE_T)type);
}
return;
}
INT32 wmt_plat_stub_init (void)
{
INT32 iRet = -1;
CMB_STUB_CB stub_cb;
stub_cb.aif_ctrl_cb = wmt_plat_audio_ctrl;
stub_cb.func_ctrl_cb = wmt_plat_func_ctrl;
stub_cb.size = sizeof(stub_cb);
/* register to cmb_stub */
iRet = mtk_wcn_cmb_stub_reg(&stub_cb);
return iRet;
}

View File

@@ -1,346 +0,0 @@
/* Copyright Statement:
*
* This software/firmware and related documentation ("MediaTek Software") are
* protected under relevant copyright laws. The information contained herein
* is confidential and proprietary to MediaTek Inc. and/or its licensors.
* Without the prior written permission of MediaTek inc. and/or its licensors,
* any reproduction, modification, use or disclosure of MediaTek Software,
* and information contained herein, in whole or in part, shall be strictly prohibited.
*
* MediaTek Inc. (C) 2010. All rights reserved.
*
* BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
* THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
* CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
* SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
* STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
* CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
*
* The following software/firmware and/or related documentation ("MediaTek Software")
* have been modified by MediaTek Inc. All revisions are subject to any receiver's
* applicable license agreements with MediaTek Inc.
*/
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
/*******************************************************************************
* Copyright (c) 2009 MediaTek Inc.
*
* All rights reserved. Copying, compilation, modification, distribution
* or any other use whatsoever of this material is strictly prohibited
* except in accordance with a Software License Agreement with
* MediaTek Inc.
********************************************************************************
*/
/*******************************************************************************
* LEGAL DISCLAIMER
*
* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND
* AGREES THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK
* SOFTWARE") RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE
* PROVIDED TO BUYER ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY
* DISCLAIMS ANY AND ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT
* LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
* PARTICULAR PURPOSE OR NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE
* ANY WARRANTY WHATSOEVER WITH RESPECT TO THE SOFTWARE OF ANY THIRD PARTY
* WHICH MAY BE USED BY, INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK
* SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY
* WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE
* FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S SPECIFICATION OR TO
* CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
*
* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL
* BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT
* ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY
* BUYER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
*
* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT
* OF LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING
* THEREOF AND RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN
* FRANCISCO, CA, UNDER THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE
* (ICC).
********************************************************************************
*/
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
#ifdef DFT_TAG
#undef DFT_TAG
#endif
#define DFT_TAG "[WMT-CMB-HW]"
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
#include "osal.h"
#include "mtk_wcn_cmb_hw.h"
#include "wmt_plat.h"
#include "wmt_exp.h"
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
#define DFT_RTC_STABLE_TIME 100
#define DFT_LDO_STABLE_TIME 100
#define DFT_RST_STABLE_TIME 30
#define DFT_OFF_STABLE_TIME 10
#define DFT_ON_STABLE_TIME 30
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
PWR_SEQ_TIME gPwrSeqTime;
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
INT32
mtk_wcn_cmb_hw_pwr_off (VOID)
{
INT32 iRet = 0;
WMT_INFO_FUNC("CMB-HW, hw_pwr_off start\n");
/*1. disable irq --> should be done when do wmt-ic swDeinit period*/
// TODO:[FixMe][GeorgeKuo] clarify this
/*2. set bgf eint/all eint to deinit state, namely input low state*/
iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_DEINIT);
iRet += wmt_plat_gpio_ctrl(PIN_BGF_EINT, PIN_STA_DEINIT);
WMT_INFO_FUNC("CMB-HW, BGF_EINT IRQ unregistered and set BGF_EINT GPIO to correct state!\n");
/* 2.1 set ALL_EINT pin to correct state even it is not used currently */
iRet += wmt_plat_eirq_ctrl(PIN_ALL_EINT, PIN_STA_EINT_DIS);
WMT_INFO_FUNC("CMB-HW, ALL_EINT IRQ unregistered and disabled\n");
iRet += wmt_plat_gpio_ctrl(PIN_ALL_EINT, PIN_STA_DEINIT);
/* 2.2 deinit gps sync */
iRet += wmt_plat_gpio_ctrl(PIN_GPS_SYNC, PIN_STA_DEINIT);
/*3. set audio interface to CMB_STUB_AIF_0, BT PCM OFF, I2S OFF*/
iRet += wmt_plat_audio_ctrl(CMB_STUB_AIF_0, CMB_STUB_AIF_CTRL_DIS);
/*4. set control gpio into deinit state, namely input low state*/
iRet += wmt_plat_gpio_ctrl(PIN_SDIO_GRP, PIN_STA_DEINIT);
iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_OUT_L);
iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_OUT_L);
/*5. set uart tx/rx into deinit state, namely input low state*/
iRet += wmt_plat_gpio_ctrl(PIN_UART_GRP, PIN_STA_DEINIT);
/* 6. Last, LDO output low */
iRet += wmt_plat_gpio_ctrl(PIN_LDO, PIN_STA_OUT_L);
/*7. deinit gps_lna*/
iRet += wmt_plat_gpio_ctrl(PIN_GPS_LNA, PIN_STA_DEINIT);
WMT_INFO_FUNC("CMB-HW, hw_pwr_off finish\n");
return iRet;
}
INT32
mtk_wcn_cmb_hw_pwr_on (VOID)
{
static UINT32 _pwr_first_time = 1;
INT32 iRet = 0;
WMT_INFO_FUNC("CMB-HW, hw_pwr_on start\n");
#if 0 //IRQ should in inact state before power on, so this step is not needed
/* disable interrupt firstly */
iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_EINT_DIS);
iRet += wmt_plat_eirq_ctrl(PIN_ALL_EINT, PIN_STA_EINT_DIS);
#endif
/*set all control and eint gpio to init state, namely input low mode*/
iRet += wmt_plat_gpio_ctrl(PIN_LDO, PIN_STA_INIT);
iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_INIT);
iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_INIT);
iRet += wmt_plat_gpio_ctrl(PIN_SDIO_GRP, PIN_STA_INIT);
iRet += wmt_plat_gpio_ctrl(PIN_BGF_EINT, PIN_STA_INIT);
iRet += wmt_plat_gpio_ctrl(PIN_ALL_EINT, PIN_STA_INIT);
iRet += wmt_plat_gpio_ctrl(PIN_GPS_SYNC, PIN_STA_INIT);
iRet += wmt_plat_gpio_ctrl(PIN_GPS_LNA, PIN_STA_INIT);
// wmt_plat_gpio_ctrl(PIN_WIFI_EINT, PIN_STA_INIT); /* WIFI_EINT is controlled by SDIO host driver */
// TODO: [FixMe][George]:WIFI_EINT is used in common SDIO
/*1. pull high LDO to supply power to chip*/
iRet += wmt_plat_gpio_ctrl(PIN_LDO, PIN_STA_OUT_H);
osal_msleep(gPwrSeqTime.ldoStableTime);
/* 2. export RTC clock to chip*/
if (_pwr_first_time) {
/* rtc clock should be output all the time, so no need to enable output again*/
iRet += wmt_plat_gpio_ctrl(PIN_RTC, PIN_STA_INIT);
osal_msleep(gPwrSeqTime.rtcStableTime);
WMT_INFO_FUNC("CMB-HW, rtc clock exported\n");
}
/*3. set UART Tx/Rx to UART mode*/
iRet += wmt_plat_gpio_ctrl(PIN_UART_GRP, PIN_STA_INIT);
/*4. PMU->output low, RST->output low, sleep off stable time*/
iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_OUT_L);
iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_OUT_L);
osal_msleep(gPwrSeqTime.offStableTime);
/*5. PMU->output high, sleep rst stable time*/
iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_OUT_H);
osal_msleep(gPwrSeqTime.rstStableTime);
/*6. RST->output high, sleep on stable time*/
iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_OUT_H);
osal_msleep(gPwrSeqTime.onStableTime);
/*7. set audio interface to CMB_STUB_AIF_1, BT PCM ON, I2S OFF*/
/* BT PCM bus default mode. Real control is done by audio */
iRet += wmt_plat_audio_ctrl(CMB_STUB_AIF_1, CMB_STUB_AIF_CTRL_DIS);
/*8. set EINT< -ommited-> move this to WMT-IC module, where common sdio interface will be identified and do proper operation*/
// TODO: [FixMe][GeorgeKuo] double check if BGF_INT is implemented ok
iRet += wmt_plat_gpio_ctrl(PIN_BGF_EINT, PIN_STA_MUX);
iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_INIT);
iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_EINT_DIS);
WMT_INFO_FUNC("CMB-HW, BGF_EINT IRQ registered and disabled \n");
/* 8.1 set ALL_EINT pin to correct state even it is not used currently */
iRet += wmt_plat_gpio_ctrl(PIN_ALL_EINT, PIN_STA_MUX);
iRet += wmt_plat_eirq_ctrl(PIN_ALL_EINT, PIN_STA_INIT);
iRet += wmt_plat_eirq_ctrl(PIN_ALL_EINT, PIN_STA_EINT_DIS);
WMT_INFO_FUNC("CMB-HW, hw_pwr_on finish (%d)\n", iRet);
_pwr_first_time = 0;
return iRet;
}
INT32
mtk_wcn_cmb_hw_rst (VOID)
{
INT32 iRet = 0;
WMT_INFO_FUNC("CMB-HW, hw_rst start, eirq should be disabled before this step\n");
/*1. PMU->output low, RST->output low, sleep off stable time*/
iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_OUT_L);
iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_OUT_L);
osal_msleep(gPwrSeqTime.offStableTime);
/*2. PMU->output high, sleep rst stable time*/
iRet += wmt_plat_gpio_ctrl(PIN_PMU, PIN_STA_OUT_H);
osal_msleep(gPwrSeqTime.rstStableTime);
/*3. RST->output high, sleep on stable time*/
iRet += wmt_plat_gpio_ctrl(PIN_RST, PIN_STA_OUT_H);
osal_msleep(gPwrSeqTime.onStableTime);
WMT_INFO_FUNC("CMB-HW, hw_rst finish, eirq should be enabled after this step\n");
return 0;
}
static VOID
mtk_wcn_cmb_hw_dmp_seq (VOID)
{
PUINT32 pTimeSlot = (PUINT32)&gPwrSeqTime;
WMT_INFO_FUNC("combo chip power on sequence time, RTC (%d), LDO (%d), RST(%d), OFF(%d), ON(%d)\n",
pTimeSlot[0], /**pTimeSlot++,*/
pTimeSlot[1],
pTimeSlot[2],
pTimeSlot[3],
pTimeSlot[4]
);
return;
}
INT32
mtk_wcn_cmb_hw_init (
P_PWR_SEQ_TIME pPwrSeqTime
)
{
if (NULL != pPwrSeqTime &&
pPwrSeqTime->ldoStableTime > 0 &&
pPwrSeqTime->rtcStableTime > 0 &&
pPwrSeqTime->offStableTime > DFT_OFF_STABLE_TIME &&
pPwrSeqTime->onStableTime > DFT_ON_STABLE_TIME &&
pPwrSeqTime->rstStableTime > DFT_RST_STABLE_TIME
) {
/*memcpy may be more performance*/
WMT_DBG_FUNC("setting hw init sequence parameters\n");
osal_memcpy(&gPwrSeqTime, pPwrSeqTime, osal_sizeof(gPwrSeqTime));
}
else {
WMT_WARN_FUNC("invalid pPwrSeqTime parameter, use default hw init sequence parameters\n");
gPwrSeqTime.ldoStableTime = DFT_LDO_STABLE_TIME;
gPwrSeqTime.offStableTime = DFT_OFF_STABLE_TIME;
gPwrSeqTime.onStableTime = DFT_ON_STABLE_TIME;
gPwrSeqTime.rstStableTime = DFT_RST_STABLE_TIME;
gPwrSeqTime.rtcStableTime = DFT_RTC_STABLE_TIME;
}
mtk_wcn_cmb_hw_dmp_seq();
return 0;
}
INT32
mtk_wcn_cmb_hw_deinit (VOID)
{
WMT_WARN_FUNC("mtk_wcn_cmb_hw_deinit start, set to default hw init sequence parameters\n");
gPwrSeqTime.ldoStableTime = DFT_LDO_STABLE_TIME;
gPwrSeqTime.offStableTime = DFT_OFF_STABLE_TIME;
gPwrSeqTime.onStableTime = DFT_ON_STABLE_TIME;
gPwrSeqTime.rstStableTime = DFT_RST_STABLE_TIME;
gPwrSeqTime.rtcStableTime = DFT_RTC_STABLE_TIME;
WMT_WARN_FUNC("mtk_wcn_cmb_hw_deinit finish\n");
return 0;
}

View File

@@ -1,348 +0,0 @@
/* Copyright Statement:
*
* This software/firmware and related documentation ("MediaTek Software") are
* protected under relevant copyright laws. The information contained herein
* is confidential and proprietary to MediaTek Inc. and/or its licensors.
* Without the prior written permission of MediaTek inc. and/or its licensors,
* any reproduction, modification, use or disclosure of MediaTek Software,
* and information contained herein, in whole or in part, shall be strictly prohibited.
*
* MediaTek Inc. (C) 2010. All rights reserved.
*
* BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
* THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
* CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
* SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
* STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
* CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
*
* The following software/firmware and/or related documentation ("MediaTek Software")
* have been modified by MediaTek Inc. All revisions are subject to any receiver's
* applicable license agreements with MediaTek Inc.
*/
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
/*******************************************************************************
* Copyright (c) 2009 MediaTek Inc.
*
* All rights reserved. Copying, compilation, modification, distribution
* or any other use whatsoever of this material is strictly prohibited
* except in accordance with a Software License Agreement with
* MediaTek Inc.
********************************************************************************
*/
/*******************************************************************************
* LEGAL DISCLAIMER
*
* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND
* AGREES THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK
* SOFTWARE") RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE
* PROVIDED TO BUYER ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY
* DISCLAIMS ANY AND ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT
* LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
* PARTICULAR PURPOSE OR NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE
* ANY WARRANTY WHATSOEVER WITH RESPECT TO THE SOFTWARE OF ANY THIRD PARTY
* WHICH MAY BE USED BY, INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK
* SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY
* WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE
* FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S SPECIFICATION OR TO
* CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
*
* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL
* BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT
* ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY
* BUYER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
*
* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT
* OF LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING
* THEREOF AND RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN
* FRANCISCO, CA, UNDER THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE
* (ICC).
********************************************************************************
*/
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
#define CMB_STUB_LOG_INFO(fmt, arg...) printk(KERN_INFO fmt, ##arg)
#define CMB_STUB_LOG_WARN(fmt, arg...) printk(KERN_WARNING fmt, ##arg)
#define CMB_STUB_LOG_DBG(fmt, arg...) printk(KERN_DEBUG fmt, ##arg)
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
#include <linux/kernel.h>
#include <linux/module.h>
//#include <cust_gpio_usage.h>
//#include <mach/mt6573_pll.h> /* clr_device_working_ability, MT65XX_PDN_PERI_UART3, DEEP_IDLE_STATE, MT65XX_PDN_PERI_MSDC2 */
//#include <mach/mt6575_dcm.h>
// TODO: [FixMe][GeorgeKuo] keep prototype unchanged temporarily. Replace it
// when integrate MT6628 & ALPS & other built-in modules, such as AUDIO.
//#include <mach/mt_combo.h>
#include <mach/mtk_wcn_cmb_stub.h>
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
static wmt_aif_ctrl_cb cmb_stub_aif_ctrl_cb = NULL;
static wmt_func_ctrl_cb cmb_stub_func_ctrl_cb = NULL;
static CMB_STUB_AIF_X cmb_stub_aif_stat = CMB_STUB_AIF_0;
/* A temp translation table between COMBO_AUDIO_STATE_X and CMB_STUB_AIF_X.
* This is used for ALPS backward compatible ONLY!!! Remove this table, related
* functions, and type definition after modifying other kernel built-in modules,
* such as AUDIO. [FixMe][GeorgeKuo]
*/
static CMB_STUB_AIF_X audio2aif[] = {
[COMBO_AUDIO_STATE_0] = CMB_STUB_AIF_0,
[COMBO_AUDIO_STATE_1] = CMB_STUB_AIF_1,
[COMBO_AUDIO_STATE_2] = CMB_STUB_AIF_2,
[COMBO_AUDIO_STATE_3] = CMB_STUB_AIF_3,
};
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
/*!
* \brief A registration function for WMT-PLAT to register itself to CMB-STUB.
*
* An MTK-WCN-CMB-STUB registration function provided to WMT-PLAT to register
* itself and related callback functions when driver being loaded into kernel.
*
* \param p_stub_cb a pointer carrying CMB_STUB_CB information
*
* \retval 0 operation success
* \retval -1 invalid parameters
*/
int
mtk_wcn_cmb_stub_reg (P_CMB_STUB_CB p_stub_cb)
{
if ( (!p_stub_cb )
|| (p_stub_cb->size != sizeof(CMB_STUB_CB)) ) {
CMB_STUB_LOG_WARN( "[cmb_stub] invalid p_stub_cb:0x%p size(%d)\n",
p_stub_cb, (p_stub_cb) ? p_stub_cb->size: 0);
return -1;
}
CMB_STUB_LOG_DBG( "[cmb_stub] registered, p_stub_cb:0x%p size(%d)\n",
p_stub_cb, p_stub_cb->size);
cmb_stub_aif_ctrl_cb = p_stub_cb->aif_ctrl_cb;
cmb_stub_func_ctrl_cb = p_stub_cb->func_ctrl_cb;
return 0;
}
EXPORT_SYMBOL(mtk_wcn_cmb_stub_reg);
/*!
* \brief A unregistration function for WMT-PLAT to unregister from CMB-STUB.
*
* An MTK-WCN-CMB-STUB unregistration function provided to WMT-PLAT to
* unregister itself and clear callback function references.
*
* \retval 0 operation success
*/
int
mtk_wcn_cmb_stub_unreg (void)
{
cmb_stub_aif_ctrl_cb = NULL;
cmb_stub_func_ctrl_cb = NULL;
CMB_STUB_LOG_INFO("[cmb_stub] unregistered \n"); /* KERN_DEBUG */
return 0;
}
EXPORT_SYMBOL(mtk_wcn_cmb_stub_unreg);
/* stub functions for kernel to control audio path pin mux */
int mtk_wcn_cmb_stub_aif_ctrl (CMB_STUB_AIF_X state, CMB_STUB_AIF_CTRL ctrl)
{
int ret;
if ( (CMB_STUB_AIF_MAX <= state)
|| (CMB_STUB_AIF_CTRL_MAX <= ctrl) ) {
CMB_STUB_LOG_WARN("[cmb_stub] aif_ctrl invalid (%d, %d)\n", state, ctrl);
return -1;
}
/* avoid the early interrupt before we register the eirq_handler */
if (cmb_stub_aif_ctrl_cb){
ret = (*cmb_stub_aif_ctrl_cb)(state, ctrl);
CMB_STUB_LOG_INFO( "[cmb_stub] aif_ctrl_cb state(%d->%d) ctrl(%d) ret(%d)\n",
cmb_stub_aif_stat , state, ctrl, ret); /* KERN_DEBUG */
cmb_stub_aif_stat = state;
return ret;
}
else {
CMB_STUB_LOG_WARN("[cmb_stub] aif_ctrl_cb null \n");
return -2;
}
}
EXPORT_SYMBOL(mtk_wcn_cmb_stub_aif_ctrl);
/* Use a temp translation table between COMBO_AUDIO_STATE_X and CMB_STUB_AIF_X
* for ALPS backward compatible ONLY!!! Remove this table, related functions,
* and type definition after modifying other kernel built-in modules, such as
* AUDIO. [FixMe][GeorgeKuo]
*/
int
mt_combo_audio_ctrl_ex (COMBO_AUDIO_STATE state, u32 clt_ctrl)
{
/* input sanity check */
if (COMBO_AUDIO_STATE_MAX < state) {
CMB_STUB_LOG_WARN("[cmb_stub] invalid COMBO_AUDIO_STATE(%d)\n", state);
return -1;
}
return mtk_wcn_cmb_stub_aif_ctrl(audio2aif[state],
(clt_ctrl) ? CMB_STUB_AIF_CTRL_EN : CMB_STUB_AIF_CTRL_DIS );
}
EXPORT_SYMBOL(mt_combo_audio_ctrl_ex);
void mtk_wcn_cmb_stub_func_ctrl (unsigned int type, unsigned int on) {
if (cmb_stub_func_ctrl_cb) {
(*cmb_stub_func_ctrl_cb)(type, on);
}
else {
CMB_STUB_LOG_WARN("[cmb_stub] func_ctrl_cb null \n");
}
}
EXPORT_SYMBOL(mtk_wcn_cmb_stub_func_ctrl);
/*platform-related APIs*/
//void clr_device_working_ability(UINT32 clockId, MT6573_STATE state);
//void set_device_working_ability(UINT32 clockId, MT6573_STATE state);
static int
_mt_combo_plt_do_deep_idle(COMBO_IF src, int enter) {
int ret = -1;
const char *combo_if_name[] =
{ "COMBO_IF_UART",
"COMBO_IF_MSDC"
};
if(src != COMBO_IF_UART && src!= COMBO_IF_MSDC){
CMB_STUB_LOG_WARN("src = %d is error\n", src);
return ret;
}
if(src >= 0 && src < COMBO_IF_MAX){
CMB_STUB_LOG_INFO("src = %s, to enter deep idle? %d \n",
combo_if_name[src],
enter);
}
/*TODO: For Common SDIO configuration, we need to do some judgement between STP and WIFI
to decide if the msdc will enter deep idle safely*/
switch(src){
case COMBO_IF_UART:
if(enter == 0){
//clr_device_working_ability(MT65XX_PDN_PERI_UART3, DEEP_IDLE_STATE);
//disable_dpidle_by_bit(MT65XX_PDN_PERI_UART2);
} else {
//set_device_working_ability(MT65XX_PDN_PERI_UART3, DEEP_IDLE_STATE);
//enable_dpidle_by_bit(MT65XX_PDN_PERI_UART2);
}
ret = 0;
break;
case COMBO_IF_MSDC:
if(enter == 0){
//clr_device_working_ability(MT65XX_PDN_PERI_MSDC2, DEEP_IDLE_STATE);
} else {
//set_device_working_ability(MT65XX_PDN_PERI_MSDC2, DEEP_IDLE_STATE);
}
ret = 0;
break;
default:
ret = -1;
break;
}
return ret;
}
int
mt_combo_plt_enter_deep_idle (
COMBO_IF src
) {
//return 0;
// TODO: [FixMe][GeorgeKuo] handling this depends on common UART or common SDIO
return _mt_combo_plt_do_deep_idle(src, 1);
}
EXPORT_SYMBOL(mt_combo_plt_enter_deep_idle);
int
mt_combo_plt_exit_deep_idle (
COMBO_IF src
) {
//return 0;
// TODO: [FixMe][GeorgeKuo] handling this depends on common UART or common SDIO
return _mt_combo_plt_do_deep_idle(src, 0);
}
EXPORT_SYMBOL(mt_combo_plt_exit_deep_idle);

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@@ -1,110 +0,0 @@
/*! \file
\brief Declaration of library functions
Any definitions in this file will be shared among GLUE Layer and internal Driver Stack.
*/
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
#if CONFIG_HAS_WAKELOCK
#include <linux/wakelock.h>
#define CFG_WMT_WAKELOCK_SUPPORT 1
#endif
#ifdef DFT_TAG
#undef DFT_TAG
#endif
#define DFT_TAG "[WMT-PLAT]"
/*******************************************************************************
* E X T E R N A L R E F E R E N C E S
********************************************************************************
*/
/* ALPS and COMBO header files */
#include <mach/mtk_wcn_cmb_stub.h>
/* MTK_WCN_COMBO header files */
#include "wmt_plat.h"
#include "wmt_plat_stub.h"
#include "wmt_exp.h"
#include <mach/mtk_wcn_cmb_stub.h>
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N D E C L A R A T I O N S
********************************************************************************
*/
static VOID wmt_plat_func_ctrl (UINT32 type, UINT32 on);
/*******************************************************************************
* P U B L I C D A T A
********************************************************************************
*/
/*******************************************************************************
* P R I V A T E D A T A
********************************************************************************
*/
/*******************************************************************************
* F U N C T I O N S
********************************************************************************
*/
static VOID wmt_plat_func_ctrl (UINT32 type, UINT32 on)
{
if (on) {
mtk_wcn_wmt_func_on((ENUM_WMTDRV_TYPE_T)type);
}
else {
mtk_wcn_wmt_func_off((ENUM_WMTDRV_TYPE_T)type);
}
return;
}
INT32 wmt_plat_stub_init (void)
{
INT32 iRet = -1;
CMB_STUB_CB stub_cb;
stub_cb.aif_ctrl_cb = wmt_plat_audio_ctrl;
stub_cb.func_ctrl_cb = wmt_plat_func_ctrl;
stub_cb.size = sizeof(stub_cb);
/* register to cmb_stub */
iRet = mtk_wcn_cmb_stub_reg(&stub_cb);
return iRet;
}

View File

@@ -1,43 +0,0 @@
# Copyright Statement:
#
# This software/firmware and related documentation ("MediaTek Software") are
# protected under relevant copyright laws. The information contained herein
# is confidential and proprietary to MediaTek Inc. and/or its licensors.
# Without the prior written permission of MediaTek inc. and/or its licensors,
# any reproduction, modification, use or disclosure of MediaTek Software,
# and information contained herein, in whole or in part, shall be strictly prohibited.
#
# MediaTek Inc. (C) 2010. All rights reserved.
#
# BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
# THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
# RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
# AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
# NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
# SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
# SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
# THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
# THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
# CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
# SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
# STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
# CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
# AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
# OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
# MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
#
# The following software/firmware and/or related documentation ("MediaTek Software")
# have been modified by MediaTek Inc. All revisions are subject to any receiver's
# applicable license agreements with MediaTek Inc.
#
# Makefile for the Linux Bluetooth HCI device drivers.
#
ccflags-y := -I$(src)/include -I$(src)/../common/include -I$(src)/../common/linux/include
obj-$(CONFIG_MTK_COMBO_BT_HCI) += hci_stp.o
hci_stp-objs := linux/hci_stp.o

View File

@@ -1,45 +0,0 @@
/* Copyright Statement:
*
* This software/firmware and related documentation ("MediaTek Software") are
* protected under relevant copyright laws. The information contained herein
* is confidential and proprietary to MediaTek Inc. and/or its licensors.
* Without the prior written permission of MediaTek inc. and/or its licensors,
* any reproduction, modification, use or disclosure of MediaTek Software,
* and information contained herein, in whole or in part, shall be strictly prohibited.
*
* MediaTek Inc. (C) 2010. All rights reserved.
*
* BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER ON
* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES TO LOOK ONLY TO SUCH
* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. RECEIVER EXPRESSLY ACKNOWLEDGES
* THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES
* CONTAINED IN MEDIATEK SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK
* SOFTWARE RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
* STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND
* CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY RECEIVER TO
* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
*
* The following software/firmware and/or related documentation ("MediaTek Software")
* have been modified by MediaTek Inc. All revisions are subject to any receiver's
* applicable license agreements with MediaTek Inc.
*/
static struct btradio_conf_data sDefaultCfg =
{
{0x00, 0x00, 0x46, 0x66, 0x20, 0x01},
{0x60, 0x00},
{0x23, 0x10, 0x00, 0x00},
{0x06, 0x80, 0x00, 0x06, 0x03, 0x06},
{0x03, 0x40, 0x1F, 0x40, 0x1F, 0x00, 0x04},
{0x80, 0x00},
{0xFF, 0xFF, 0xFF}
};

View File

@@ -1,172 +0,0 @@
/* Copyright Statement:
*
* This software/firmware and related documentation ("MediaTek Software") are
* protected under relevant copyright laws. The information contained herein is
* confidential and proprietary to MediaTek Inc. and/or its licensors. Without
* the prior written permission of MediaTek inc. and/or its licensors, any
* reproduction, modification, use or disclosure of MediaTek Software, and
* information contained herein, in whole or in part, shall be strictly
* prohibited.
*
* MediaTek Inc. (C) 2010. All rights reserved.
*
* BY OPENING THIS FILE, RECEIVER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO RECEIVER
* ON AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL
* WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED
* WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
* NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH
* RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
* INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND RECEIVER AGREES
* TO LOOK ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO.
* RECEIVER EXPRESSLY ACKNOWLEDGES THAT IT IS RECEIVER'S SOLE RESPONSIBILITY TO
* OBTAIN FROM ANY THIRD PARTY ALL PROPER LICENSES CONTAINED IN MEDIATEK
* SOFTWARE. MEDIATEK SHALL ALSO NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE
* RELEASES MADE TO RECEIVER'S SPECIFICATION OR TO CONFORM TO A PARTICULAR
* STANDARD OR OPEN FORUM. RECEIVER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S
* ENTIRE AND CUMULATIVE LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE
* RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE
* MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE
* CHARGE PAID BY RECEIVER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
*
* The following software/firmware and/or related documentation ("MediaTek
* Software") have been modified by MediaTek Inc. All revisions are subject to
* any receiver's applicable license agreements with MediaTek Inc.
*/
#ifndef _HCI_STP_H
#define _HCI_STP_H
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/fcntl.h>
#include <linux/interrupt.h>
#include <linux/ptrace.h>
#include <linux/poll.h>
#include <linux/slab.h>
#include <linux/tty.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/signal.h>
#include <linux/ioctl.h>
#include <linux/skbuff.h>
#include <linux/interrupt.h>
#include <linux/spinlock.h>
#include <linux/fs.h>
#include <asm/uaccess.h>
/* debugging */
#include <linux/time.h>
#include <linux/delay.h>
/* constant of kernel version */
#include <linux/version.h>
/* kthread APIs */
#include <linux/kthread.h>
#include <net/bluetooth/bluetooth.h>
#include <net/bluetooth/hci_core.h>
/*******************************************************************************
* C O M P I L E R F L A G S
********************************************************************************
*/
#define HCI_STP_TX_TASKLET (0) /* do tx in a tasklet context */
#define HCI_STP_TX_THRD (1) /* do tx in an init thread context */
/* select tx context */
#define HCI_STP_TX (HCI_STP_TX_THRD)
#if (HCI_STP_TX == HCI_STP_TX_TASKLET)
#define HCI_STP_TX_TASKLET_RWLOCK (0) /* use rwlock_t */
#define HCI_STP_TX_TASKLET_SPINLOCK (1) /* use spinlock_t */
/* select txq protection method */
#define HCI_STP_TX_TASKLET_LOCK (HCI_STP_TX_TASKLET_SPINLOCK)
#endif
/* Flag to enable BD address auto-gen mechanism */
/* Auto-gen address is illegal, default disabled */
#define BD_ADDR_AUTOGEN (0)
/*******************************************************************************
* C O N S T A N T S
********************************************************************************
*/
/* HCI-STP flag bits */
#define HCI_STP_PROTO_SET (0)
/* HCI-STP flag TX states bits */
#define HCI_STP_SENDING (1)
#define HCI_STP_TX_WAKEUP (2)
/* maximum delay required, shall also consider possible delay on a busy system. */
#define BT_CMD_DELAY_MS_COMM (100) /*(50)*/
#define BT_CMD_DELAY_MS_RESET (600) /*(500)*/
#define BT_CMD_DELAY_SAFE_GUARD (20) /*(2)*/
/* HCI-STP safer hci_reset handling */
#define HCI_STP_SAFE_RESET (1)
/*******************************************************************************
* D A T A T Y P E S
********************************************************************************
*/
struct hci_stp_init_cmd {
unsigned char *hci_cmd;
unsigned int cmdSz;
unsigned char *hci_evt;
unsigned int evtSz;
char *str;
};
struct hci_stp {
struct hci_dev *hdev;
unsigned long flags;
struct sk_buff_head txq; /* used to queue TX packets */
unsigned long tx_state;
struct work_struct init_work;
struct completion *p_init_comp;
wait_queue_head_t *p_init_evt_wq;
spinlock_t init_lock; /* protect init variables: comp and wq */
unsigned int init_cmd_idx;
int init_evt_rx_flag; /* init result of last sent cmd */
#if HCI_STP_SAFE_RESET
wait_queue_head_t reset_wq;
atomic_t reset_count; /* !0: reset in progress */
#endif
//void *priv; /* unused? */
//struct sk_buff *tx_skb; /* unused? */
//spinlock_t rx_lock; /* unused? */
};
struct btradio_conf_data {
unsigned char addr[6];
unsigned char voice[2];
unsigned char codec[4];
unsigned char radio[6];
unsigned char sleep[7];
unsigned char feature[2];
unsigned char tx_pwr_offset[3];
};
/*******************************************************************************
* M A C R O S
********************************************************************************
*/
#define hci_stp_init_entry(c) \
{.hci_cmd=c, .cmdSz=sizeof(c), .hci_evt=c##_evt, .evtSz=sizeof(c##_evt), .str=#c}
#endif /* end of _HCI_STP_H */

File diff suppressed because it is too large Load Diff

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@@ -1,82 +0,0 @@
# Makefile generated by Mediatek
# fm support
#6628 FM driver
ifeq ($(CONFIG_MTK_COMBO_CHIP_MT6628), y)
$(warning MT6628_FM)
ccflags-y += -I$(src)/inc \
-I$(src)/mt6628/inc \
-I$(src)/../common/include \
-I$(src)/../common/linux/include \
-I$(src)/cust/mt6628 \
-I$(src)/private/inc \
-DMT6628_FM
obj-$(CONFIG_MTK_COMBO_FM) += mtk_fm_drv.o
mtk_fm_drv-objs += core/fm_module.o \
core/fm_main.o \
core/fm_config.o \
core/fm_rds_parser.o \
core/fm_patch.o \
core/fm_utils.o \
core/fm_link.o \
core/fm_eint.o \
mt6628/pub/mt6628_fm_lib.o \
mt6628/pub/mt6628_fm_rds.o \
mt6628/pub/mt6628_fm_cmd.o \
mt6628/pub/mt6628_fm_config.o
$(warning $(mtk_fm_drv-objs))
endif
# MT6620 FM driver
ifeq ($(CONFIG_MTK_COMBO_CHIP_MT6620), y)
$(warning MT6620_FM)
ccflags-y += -I$(src)/inc \
-I$(src)/mt6620/inc \
-I$(src)/../common/include \
-I$(src)/../common/linux/include \
-I$(src)/cust/mt6620 \
-I$(src)/private/inc \
-DMT6620_FM
obj-$(CONFIG_MTK_COMBO_FM) += mtk_fm_drv.o
mtk_fm_drv-objs += core/fm_module.o \
core/fm_main.o \
core/fm_config.o \
core/fm_rds_parser.o \
core/fm_patch.o \
core/fm_utils.o \
core/fm_link.o \
core/fm_eint.o \
mt6620/pub/mt6620_fm_lib.o \
mt6620/pub/mt6620_fm_rds.o \
mt6620/pub/mt6620_fm_cmd.o \
mt6620/pub/mt6620_fm_config.o
$(warning $(mtk_fm_drv-objs))
endif
# MT6626 FM driver
ifeq ($(CONFIG_MTK_COMBO_CHIP_MT6626), y)
FM_CHIP = mt6626
FM_CHIP_PATH = $(FM_CHIP)/pub/$(FM_CHIP)
ccflags-y := -I$(src)/inc \
-I$(src)/$(FM_CHIP)/inc \
-I$(src)/cust/$(FM_CHIP) \
-I$(src)/private/inc \
-DMT6626_FM
obj-$(CONFIG_MTK_COMBO_FM) += mtk_fm_drv.o
mtk_fm_drv-objs := core/fm_module.o \
core/fm_main.o \
core/fm_config.o \
core/fm_patch.o \
core/fm_rds_parser.o \
core/fm_utils.o \
core/fm_link.o \
$(FM_CHIP_PATH)_fm_lib.o \
$(FM_CHIP_PATH)_fm_rds.o \
$(FM_CHIP_PATH)_fm_link.o \
$(FM_CHIP_PATH)_fm_eint.o
endif

View File

@@ -1,597 +0,0 @@
/* fm_config.c
*
* (C) Copyright 2011
* MediaTek <www.MediaTek.com>
* hongcheng <hongcheng.xia@MediaTek.com>
*
* FM Radio Driver
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/string.h>
#include <linux/slab.h>
#include "fm_typedef.h"
#include "fm_rds.h"
#include "fm_dbg.h"
#include "fm_err.h"
#include "fm_stdlib.h"
#include "fm_patch.h"
#include "fm_config.h"
#if (!defined(MT6628_FM)&&!defined(MT6620_FM))
#include "fm_cust_cfg.h"
#endif
static fm_cust_cfg fm_config;
static fm_s32 fm_index = 0;
#if 0
static fm_s32 to_upper(fm_s8 *str)
{
fm_s32 i = 0;
for (i = 0; i < (int)strlen(str); i++) {
if (('a' <= str[i]) && (str[i] <= 'z')) {
str[i] = str[i] - ('a' - 'A');
}
}
return 0;
}
#endif
fm_s32 to_upper_n(fm_s8 *str, fm_s32 len)
{
fm_s32 i = 0;
for (i = 0; i < len; i++) {
if (('a' <= str[i]) && (str[i] <= 'z')) {
str[i] = str[i] - ('a' - 'A');
}
}
return 0;
}
fm_s32 check_hex_str(fm_s8 *str, fm_s32 len)
{
fm_s32 i = 0;
for (i = 0; i < len; i++) {
if ((('a' <= str[i]) && (str[i] <= 'z')) || (('A' <= str[i]) && (str[i] <= 'Z')) || (('0' <= str[i]) && (str[i] <= '9'))) {
;
} else {
return -1;
}
}
return 0;
}
fm_s32 check_dec_str(fm_s8 *str, fm_s32 len)
{
fm_s32 i = 0;
for (i = 0; i < len; i++) {
if (('0' <= str[i]) && (str[i] <= '9')) {
;
} else {
return -1;
}
}
return 0;
}
fm_s32 ascii_to_hex(fm_s8 *in_ascii, fm_u16 *out_hex)
{
fm_s32 len = (fm_s32)strlen(in_ascii);
int i = 0;
fm_u16 tmp;
len = (len > 4) ? 4 : len;
if (check_hex_str(in_ascii, len)) {
return -1;
}
to_upper_n(in_ascii, len);
*out_hex = 0;
for (i = 0; i < len; i++) {
if (in_ascii[len-i-1] < 'A') {
tmp = in_ascii[len-i-1];
*out_hex |= ((tmp - '0') << (4 * i));
} else {
tmp = in_ascii[len-i-1];
*out_hex |= ((tmp - 'A' + 10) << (4 * i));
}
}
return 0;
}
fm_s32 ascii_to_dec(fm_s8 *in_ascii, fm_s32 *out_dec)
{
fm_s32 len = (fm_s32)strlen(in_ascii);
int i = 0;
int flag;
int multi = 1;
len = (len > 10) ? 10 : len;
if (in_ascii[0] == '-') {
flag = -1;
in_ascii += 1;
len -= 1;
} else {
flag = 1;
}
if (check_dec_str(in_ascii, len)) {
return -1;
}
*out_dec = 0;
multi = 1;
for (i = 0; i < len; i++) {
*out_dec += ((in_ascii[len-i-1] - '0') * multi);
multi *= 10;
}
*out_dec *= flag;
return 0;
}
fm_s32 trim_string(fm_s8 **start)
{
fm_s8 *end = *start;
/* Advance to non-space character */
while (*(*start) == ' ') {
(*start)++;
}
/* Move to end of string */
while (*end != '\0') {
(end)++;
}
/* Backup to non-space character */
do {
end--;
} while ((end >= *start) && (*end == ' '));
/* Terminate string after last non-space character */
*(++end) = '\0';
return (end - *start);
}
fm_s32 trim_path(fm_s8 **start)
{
fm_s8 *end = *start;
while (*(*start) == ' ') {
(*start)++;
}
while (*end != '\0') {
(end)++;
}
do {
end--;
} while ((end >= *start) && ((*end == ' ') || (*end == '\n') || (*end == '\r')));
*(++end) = '\0';
return (end - *start);
}
fm_s32 cfg_parser(fm_s8 *buffer, CFG_HANDLER handler, fm_cust_cfg *cfg)
{
fm_s32 ret = 0;
fm_s8 *p = buffer;
fm_s8 *group_start = NULL;
fm_s8 *key_start = NULL;
fm_s8 *value_start = NULL;
enum fm_cfg_parser_state state = FM_CFG_STAT_NONE;
FMR_ASSERT(p);
for (p = buffer; *p != '\0'; p++) {
switch (state) {
case FM_CFG_STAT_NONE: {
if (*p == '[') {
//if we get char '[' in none state, it means a new group name start
state = FM_CFG_STAT_GROUP;
group_start = p + 1;
} else if (*p == COMMENT_CHAR) {
//if we get char '#' in none state, it means a new comment start
state = FM_CFG_STAT_COMMENT;
} else if (!isspace(*p) && (*p != '\n') && (*p != '\r')) {
//if we get an nonspace char in none state, it means a new key start
state = FM_CFG_STAT_KEY;
key_start = p;
}
break;
}
case FM_CFG_STAT_GROUP: {
if (*p == ']') {
//if we get char ']' in group state, it means a group name complete
*p = '\0';
//FIX_ME
//record group name
state = FM_CFG_STAT_NONE;
trim_string(&group_start);
//WCN_DBG(FM_NTC|MAIN, "g=%s\n", group_start);
}
break;
}
case FM_CFG_STAT_COMMENT: {
if (*p == '\n') {
//if we get char '\n' in comment state, it means new line start
state = FM_CFG_STAT_NONE;
group_start = p + 1;
}
break;
}
case FM_CFG_STAT_KEY: {
if (*p == DELIMIT_CHAR) {
//if we get char '=' in key state, it means a key name complete
*p = '\0';
//FIX_ME
//record key name
state = FM_CFG_STAT_VALUE;
value_start = p + 1;
trim_string(&key_start);
//WCN_DBG(FM_NTC|MAIN, "k=%s\n", key_start);
}
break;
}
case FM_CFG_STAT_VALUE: {
if (*p == '\n' || *p == '\r') {
//if we get char '\n' or '\r' in value state, it means a value complete
*p = '\0';
//record value
trim_string(&value_start);
//WCN_DBG(FM_NTC|MAIN, "v=%s\n", value_start);
if (handler) {
ret = handler(group_start, key_start, value_start, cfg);
}
state = FM_CFG_STAT_NONE;
}
break;
}
default:
break;
}
}
return ret;
}
fm_s32 cfg_item_match(fm_s8 *src_key, fm_s8 *src_val, fm_s8 *dst_key, fm_s32 *dst_val)
{
fm_s32 ret = 0;
fm_u16 tmp_hex;
fm_s32 tmp_dec;
//WCN_DBG(FM_NTC|MAIN,"src_key=%s,src_val=%s\n", src_key,src_val);
//WCN_DBG(FM_NTC|MAIN,"dst_key=%s\n", dst_key);
if (strcmp(src_key, dst_key) == 0) {
if (strncmp(src_val, "0x", strlen("0x")) == 0) {
src_val += strlen("0x");
//WCN_DBG(FM_NTC|MAIN,"%s\n", src_val);
ret = ascii_to_hex(src_val, &tmp_hex);
if (!ret) {
*dst_val = tmp_hex;
//WCN_DBG(FM_NTC|MAIN, "%s 0x%04x\n", dst_key, tmp_hex);
return 0;
} else {
//WCN_DBG(FM_ERR | MAIN, "%s format error\n", dst_key);
return 1;
}
} else {
ret = ascii_to_dec(src_val, &tmp_dec);
if (!ret /*&& ((0 <= tmp_dec) && (tmp_dec <= 0xFFFF))*/) {
*dst_val = tmp_dec;
//WCN_DBG(FM_NTC|MAIN, "%s %d\n", dst_key, tmp_dec);
return 0;
} else {
//WCN_DBG(FM_ERR | MAIN, "%s format error\n", dst_key);
return 1;
}
}
}
//else
//{
// WCN_DBG(FM_ERR | MAIN, "src_key!=dst_key\n");
//}
return -1;
}
static fm_s32 cfg_item_handler(fm_s8 *grp, fm_s8 *key, fm_s8 *val, fm_cust_cfg *cfg)
{
fm_s32 ret = 0;
struct fm_rx_cust_cfg *rx_cfg = &cfg->rx_cfg;
struct fm_tx_cust_cfg *tx_cfg = &cfg->tx_cfg;
if (0 <= (ret = cfg_item_match(key, val, "FMR_RSSI_TH_L", &rx_cfg->long_ana_rssi_th))) {//FMR_RSSI_TH_L = 0x0301
return ret;
} else if (0 <= (ret = cfg_item_match(key, val, "FMR_RSSI_TH_S", &rx_cfg->short_ana_rssi_th))) {
return ret;
} else if (0 <= (ret = cfg_item_match(key, val, "FMR_CQI_TH", &rx_cfg->cqi_th))) {
return ret;
} else if (0 <= (ret = cfg_item_match(key, val, "FMR_MR_TH", &rx_cfg->mr_th))) {
return ret;
} else if (0 <= (ret = cfg_item_match(key, val, "FMR_SMG_TH", &rx_cfg->smg_th))) {
return ret;
} else if (0 <= (ret = cfg_item_match(key, val, "FMR_SCAN_CH_SIZE", &rx_cfg->scan_ch_size))) {
return ret;
} else if (0 <= (ret = cfg_item_match(key, val, "FMR_SCAN_SORT", &rx_cfg->scan_sort))) {
return ret;
} else if (0 <= (ret = cfg_item_match(key, val, "FMR_SEEK_SPACE", &rx_cfg->seek_space))) {
return ret;
} else if (0 <= (ret = cfg_item_match(key, val, "FMR_BAND", &rx_cfg->band))) {
return ret;
} else if (0 <= (ret = cfg_item_match(key, val, "FMR_BAND_FREQ_L", &rx_cfg->band_freq_l))) {
return ret;
} else if (0 <= (ret = cfg_item_match(key, val, "FMR_BAND_FREQ_H", &rx_cfg->band_freq_h))) {
return ret;
} else if (0 <= (ret = cfg_item_match(key, val, "FMR_FAKE_CH", &rx_cfg->fake_ch[fm_index]))) {
fm_index += 1;
rx_cfg->fake_ch_num = (rx_cfg->fake_ch_num < fm_index) ? fm_index : rx_cfg->fake_ch_num;
return ret;
} else if (0 <= (ret = cfg_item_match(key, val, "FMR_FAKE_CH_RSSI", &rx_cfg->fake_ch_rssi_th))) {
return ret;
} else if (0 <= (ret = cfg_item_match(key, val, "FMR_DEEMPHASIS", &rx_cfg->deemphasis))) {
return ret;
} else if (0 <= (ret = cfg_item_match(key, val, "FMR_OSC_FREQ", &rx_cfg->osc_freq))) {
return ret;
} else if (0 <= (ret = cfg_item_match(key, val, "FMT_SCAN_HOLE_L", &tx_cfg->scan_hole_low))) {
return ret;
} else if (0 <= (ret = cfg_item_match(key, val, "FMT_SCAN_HOLE_H", &tx_cfg->scan_hole_high))) {
return ret;
} else if (0 <= (ret = cfg_item_match(key, val, "FMT_PWR_LVL_MAX", &tx_cfg->power_level))) {
return ret;
} else {
WCN_DBG(FM_WAR | MAIN, "invalid key\n");
return -1;
}
}
static fm_s32 fm_cust_config_default(fm_cust_cfg *cfg)
{
FMR_ASSERT(cfg);
#if (!defined(MT6628_FM)&&!defined(MT6620_FM))
cfg->rx_cfg.long_ana_rssi_th = FM_RX_RSSI_TH_LONG;
cfg->rx_cfg.short_ana_rssi_th = FM_RX_RSSI_TH_SHORT;
cfg->rx_cfg.cqi_th = FM_RX_CQI_TH;
cfg->rx_cfg.mr_th = FM_RX_MR_TH;
cfg->rx_cfg.smg_th = FM_RX_SMG_TH;
cfg->rx_cfg.scan_ch_size = FM_RX_SCAN_CH_SIZE;
cfg->rx_cfg.seek_space = FM_RX_SEEK_SPACE;
cfg->rx_cfg.band = FM_RX_BAND;
cfg->rx_cfg.band_freq_l = FM_RX_BAND_FREQ_L;
cfg->rx_cfg.band_freq_h = FM_RX_BAND_FREQ_H;
cfg->rx_cfg.scan_sort = FM_RX_SCAN_SORT_SELECT;
cfg->rx_cfg.fake_ch_num = FM_RX_FAKE_CH_NUM;
cfg->rx_cfg.fake_ch_rssi_th = FM_RX_FAKE_CH_RSSI;
cfg->rx_cfg.fake_ch[0] = FM_RX_FAKE_CH_1;
cfg->rx_cfg.fake_ch[1] = FM_RX_FAKE_CH_2;
cfg->rx_cfg.fake_ch[2] = FM_RX_FAKE_CH_3;
cfg->rx_cfg.fake_ch[3] = FM_RX_FAKE_CH_4;
cfg->rx_cfg.fake_ch[4] = FM_RX_FAKE_CH_5;
cfg->rx_cfg.deemphasis = FM_RX_DEEMPHASIS;
cfg->tx_cfg.scan_hole_low = FM_TX_SCAN_HOLE_LOW;
cfg->tx_cfg.scan_hole_high = FM_TX_SCAN_HOLE_HIGH;
cfg->tx_cfg.power_level = FM_TX_PWR_LEVEL_MAX;
#endif
return 0;
}
static fm_s32 fm_cust_config_file(const fm_s8 *filename, fm_cust_cfg *cfg)
{
fm_s32 ret = 0;
fm_s8 *buf = NULL;
fm_s32 file_len = 0;
if (!(buf = fm_zalloc(4096))) {
WCN_DBG(FM_ALT | MAIN, "-ENOMEM\n");
return -ENOMEM;
}
fm_index = 0;
file_len = fm_file_read(filename, buf, 4096, 0);
if (file_len <= 0) {
ret = -1;
goto out;
}
ret = cfg_parser(buf, cfg_item_handler, cfg);
out:
if (buf) {
fm_free(buf);
}
return ret;
}
static fm_s32 fm_cust_config_print(fm_cust_cfg *cfg)
{
fm_s32 i;
WCN_DBG(FM_NTC | MAIN, "rssi_l:\t0x%04x\n", cfg->rx_cfg.long_ana_rssi_th);
WCN_DBG(FM_NTC | MAIN, "rssi_s:\t0x%04x\n", cfg->rx_cfg.short_ana_rssi_th);
WCN_DBG(FM_NTC | MAIN, "mr_th:\t0x%04x\n", cfg->rx_cfg.mr_th);
WCN_DBG(FM_NTC | MAIN, "cqi_th:\t0x%04x\n", cfg->rx_cfg.cqi_th);
WCN_DBG(FM_NTC | MAIN, "smg_th:\t0x%04x\n", cfg->rx_cfg.smg_th);
WCN_DBG(FM_NTC | MAIN, "scan_ch_size:\t%d\n", cfg->rx_cfg.scan_ch_size);
WCN_DBG(FM_NTC | MAIN, "seek_space:\t%d\n", cfg->rx_cfg.seek_space);
WCN_DBG(FM_NTC | MAIN, "band:\t%d\n", cfg->rx_cfg.band);
WCN_DBG(FM_NTC | MAIN, "band_freq_l:\t%d\n", cfg->rx_cfg.band_freq_l);
WCN_DBG(FM_NTC | MAIN, "band_freq_h:\t%d\n", cfg->rx_cfg.band_freq_h);
WCN_DBG(FM_NTC | MAIN, "scan_sort:\t%d\n", cfg->rx_cfg.scan_sort);
WCN_DBG(FM_NTC | MAIN, "fake_ch_num:\t%d\n", cfg->rx_cfg.fake_ch_num);
WCN_DBG(FM_NTC | MAIN, "fake_ch_rssi_th:\t%d\n", cfg->rx_cfg.fake_ch_rssi_th);
for (i = 0; i < cfg->rx_cfg.fake_ch_num; i++) {
WCN_DBG(FM_NTC | MAIN, "fake_ch:\t%d\n", cfg->rx_cfg.fake_ch[i]);
}
WCN_DBG(FM_NTC | MAIN, "de_emphasis:\t%d\n", cfg->rx_cfg.deemphasis);
WCN_DBG(FM_NTC | MAIN, "osc_freq:\t%d\n", cfg->rx_cfg.osc_freq);
WCN_DBG(FM_NTC | MAIN, "scan_hole_low:\t%d\n", cfg->tx_cfg.scan_hole_low);
WCN_DBG(FM_NTC | MAIN, "scan_hole_high:\t%d\n", cfg->tx_cfg.scan_hole_high);
WCN_DBG(FM_NTC | MAIN, "power_level:\t%d\n", cfg->tx_cfg.power_level);
return 0;
}
fm_s32 fm_cust_config(const fm_s8 *filepath)
{
fm_s32 ret = 0;
fm_s8 *filep = NULL;
fm_s8 file_path[51] = {0};
fm_cust_config_default(&fm_config);
WCN_DBG(FM_NTC | MAIN, "FM default config\n");
fm_cust_config_print(&fm_config);
if (!filepath) {
filep = FM_CUST_CFG_PATH;
} else {
memcpy(file_path, filepath, (strlen(filepath) > 50) ? 50 : strlen(filepath));
filep = file_path;
trim_path(&filep);
}
ret = fm_cust_config_file(filep, &fm_config);
WCN_DBG(FM_NTC | MAIN, "FM cust config\n");
fm_cust_config_print(&fm_config);
return ret;
}
fm_u16 fm_cust_config_fetch(enum fm_cust_cfg_op op_code)
{
fm_u16 tmp = 0;
fm_s32 i;
static fm_s32 fake_ch_idx = 0;
switch (op_code) {
//For FM RX
case FM_CFG_RX_RSSI_TH_LONG: {
tmp = fm_config.rx_cfg.long_ana_rssi_th;
break;
}
case FM_CFG_RX_RSSI_TH_SHORT: {
tmp = fm_config.rx_cfg.short_ana_rssi_th;
break;
}
case FM_CFG_RX_CQI_TH: {
tmp = fm_config.rx_cfg.cqi_th;
break;
}
case FM_CFG_RX_MR_TH: {
tmp = fm_config.rx_cfg.mr_th;
break;
}
case FM_CFG_RX_SMG_TH: {
tmp = fm_config.rx_cfg.smg_th;
break;
}
case FM_CFG_RX_SCAN_CH_SIZE: {
tmp = fm_config.rx_cfg.scan_ch_size;
break;
}
case FM_CFG_RX_SEEK_SPACE: {
tmp = fm_config.rx_cfg.seek_space;
break;
}
case FM_CFG_RX_BAND: {
tmp = fm_config.rx_cfg.band;
break;
}
case FM_CFG_RX_BAND_FREQ_L: {
tmp = fm_config.rx_cfg.band_freq_l;
break;
}
case FM_CFG_RX_BAND_FREQ_H: {
tmp = fm_config.rx_cfg.band_freq_h;
break;
}
case FM_CFG_RX_SCAN_SORT: {
tmp = fm_config.rx_cfg.scan_sort;
break;
}
case FM_CFG_RX_FAKE_CH_NUM: {
tmp = fm_config.rx_cfg.fake_ch_num;
break;
}
case FM_CFG_RX_FAKE_CH: {
tmp = fm_config.rx_cfg.fake_ch[fake_ch_idx];
i = (fm_config.rx_cfg.fake_ch_num > 0) ? fm_config.rx_cfg.fake_ch_num : FAKE_CH_MAX;
fake_ch_idx++;
fake_ch_idx = fake_ch_idx % i;
break;
}
case FM_CFG_RX_FAKE_CH_RSSI: {
tmp = fm_config.rx_cfg.fake_ch_rssi_th;
break;
}
case FM_CFG_RX_DEEMPHASIS: {
tmp = fm_config.rx_cfg.deemphasis;
break;
}
case FM_CFG_RX_OSC_FREQ: {
tmp = fm_config.rx_cfg.osc_freq;
break;
}
//For FM TX
case FM_CFG_TX_SCAN_HOLE_LOW: {
tmp = fm_config.tx_cfg.scan_hole_low;
break;
}
case FM_CFG_TX_SCAN_HOLE_HIGH: {
tmp = fm_config.tx_cfg.scan_hole_high;
break;
}
case FM_CFG_TX_PWR_LEVEL: {
tmp = fm_config.tx_cfg.power_level;
break;
}
default:
break;
}
WCN_DBG(FM_DBG | MAIN, "cust cfg %d: 0x%04x\n", op_code, tmp);
return tmp;
}

View File

@@ -1,55 +0,0 @@
/* mt6620_fm_eint.c
*
* (C) Copyright 2009
* MediaTek <www.MediaTek.com>
* Run <Run.Liu@MediaTek.com>
*
* WCN combo chip FM Radio Driver -- EINT functions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#if (defined(MT6620_FM)||defined(MT6628_FM))
#include "stp_exp.h"
#include "wmt_exp.h"
#include "fm_typedef.h"
#include "fm_dbg.h"
#include "fm_err.h"
#include "fm_eint.h"
fm_s32 fm_enable_eint(void)
{
return 0;
}
fm_s32 fm_disable_eint(void)
{
return 0;
}
fm_s32 fm_request_eint(void (*parser)(void))
{
WCN_DBG(FM_NTC|EINT,"%s\n", __func__);
mtk_wcn_stp_register_event_cb(FM_TASK_INDX, parser);
return 0;
}
fm_s32 fm_eint_pin_cfg(fm_s32 mode)
{
return 0;
}
#endif

View File

@@ -1,550 +0,0 @@
/* fm_link.c
*
* (C) Copyright 2012
* MediaTek <www.MediaTek.com>
* Hongcheng <hongcheng.xia@MediaTek.com>
*
* FM Radio Driver -- setup data link common part
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
#include "fm_typedef.h"
#include "fm_dbg.h"
#include "fm_err.h"
#include "fm_stdlib.h"
#include "fm_link.h"
#if (defined(MT6620_FM)||defined(MT6628_FM))
#include "stp_exp.h"
#include "wmt_exp.h"
static struct fm_link_event *link_event;
static struct fm_trace_fifo_t *cmd_fifo;
static struct fm_trace_fifo_t *evt_fifo;
static fm_s32 (*reset)(fm_s32 sta) = NULL;
static void WCNfm_wholechip_rst_cb(ENUM_WMTDRV_TYPE_T src,
ENUM_WMTDRV_TYPE_T dst,
ENUM_WMTMSG_TYPE_T type,
void *buf,
unsigned int sz)
{
//To handle reset procedure please
ENUM_WMTRSTMSG_TYPE_T rst_msg;
if (sz <= sizeof(ENUM_WMTRSTMSG_TYPE_T)) {
memcpy((char *)&rst_msg, (char *)buf, sz);
WCN_DBG(FM_WAR | LINK, "[src=%d], [dst=%d], [type=%d], [buf=0x%x], [sz=%d], [max=%d]\n", src, dst, type, rst_msg, sz, WMTRSTMSG_RESET_MAX);
if ((src == WMTDRV_TYPE_WMT) && (dst == WMTDRV_TYPE_FM) && (type == WMTMSG_TYPE_RESET)) {
if (rst_msg == WMTRSTMSG_RESET_START) {
WCN_DBG(FM_WAR | LINK, "FM restart start!\n");
if (reset) {
reset(1);
}
} else if (rst_msg == WMTRSTMSG_RESET_END) {
WCN_DBG(FM_WAR | LINK, "FM restart end!\n");
if (reset) {
reset(0);
}
}
}
} else {
/*message format invalid*/
WCN_DBG(FM_WAR | LINK, "message format invalid!\n");
}
}
fm_s32 fm_link_setup(void* data)
{
fm_s32 ret = 0;
if (!(link_event = fm_zalloc(sizeof(struct fm_link_event)))) {
WCN_DBG(FM_ALT | LINK, "fm_zalloc(fm_link_event) -ENOMEM\n");
return -1;
}
link_event->ln_event = fm_flag_event_create("ln_evt");
if (!link_event->ln_event) {
WCN_DBG(FM_ALT | LINK, "create mt6620_ln_event failed\n");
fm_free(link_event);
return -1;
}
fm_flag_event_get(link_event->ln_event);
WCN_DBG(FM_NTC | LINK, "fm link setup\n");
cmd_fifo = fm_trace_fifo_create("cmd_fifo");
if (!cmd_fifo) {
WCN_DBG(FM_ALT | LINK, "create cmd_fifo failed\n");
ret = -1;
goto failed;
}
evt_fifo = fm_trace_fifo_create("evt_fifo");
if (!evt_fifo) {
WCN_DBG(FM_ALT | LINK, "create evt_fifo failed\n");
ret = -1;
goto failed;
}
reset = data; // get whole chip reset cb
mtk_wcn_wmt_msgcb_reg(WMTDRV_TYPE_FM, WCNfm_wholechip_rst_cb);
return 0;
failed:
fm_trace_fifo_release(evt_fifo);
fm_trace_fifo_release(cmd_fifo);
fm_flag_event_put(link_event->ln_event);
if (link_event) {
fm_free(link_event);
}
return ret;
}
fm_s32 fm_link_release(void)
{
fm_trace_fifo_release(evt_fifo);
fm_trace_fifo_release(cmd_fifo);
fm_flag_event_put(link_event->ln_event);
if (link_event) {
fm_free(link_event);
}
WCN_DBG(FM_NTC | LINK, "fm link release\n");
return 0;
}
/*
* fm_ctrl_rx
* the low level func to read a rigister
* @addr - rigister address
* @val - the pointer of target buf
* If success, return 0; else error code
*/
fm_s32 fm_ctrl_rx(fm_u8 addr, fm_u16 *val)
{
return 0;
}
/*
* fm_ctrl_tx
* the low level func to write a rigister
* @addr - rigister address
* @val - value will be writed in the rigister
* If success, return 0; else error code
*/
fm_s32 fm_ctrl_tx(fm_u8 addr, fm_u16 val)
{
return 0;
}
/*
* fm_cmd_tx() - send cmd to FM firmware and wait event
* @buf - send buffer
* @len - the length of cmd
* @mask - the event flag mask
* @ cnt - the retry conter
* @timeout - timeout per cmd
* Return 0, if success; error code, if failed
*/
fm_s32 fm_cmd_tx(fm_u8* buf, fm_u16 len, fm_s32 mask, fm_s32 cnt, fm_s32 timeout, fm_s32(*callback)(struct fm_res_ctx* result))
{
fm_s32 ret_time = 0;
struct task_struct *task = current;
struct fm_trace_t trace;
if ((NULL == buf) || (len < 0) || (0 == mask)
|| (cnt > SW_RETRY_CNT_MAX) || (timeout > SW_WAIT_TIMEOUT_MAX)) {
WCN_DBG(FM_ERR | LINK, "cmd tx, invalid para\n");
return -FM_EPARA;
}
FM_EVENT_CLR(link_event->ln_event, mask);
#ifdef FM_TRACE_ENABLE
trace.type = buf[0];
trace.opcode = buf[1];
trace.len = len - 4;
trace.tid = (fm_s32)task->pid;
fm_memset(trace.pkt, 0, FM_TRACE_PKT_SIZE);
fm_memcpy(trace.pkt, &buf[4], (trace.len > FM_TRACE_PKT_SIZE) ? FM_TRACE_PKT_SIZE : trace.len);
#endif
sw_retry:
#ifdef FM_TRACE_ENABLE
if (fm_true == FM_TRACE_FULL(cmd_fifo)) {
FM_TRACE_OUT(cmd_fifo, NULL);
}
FM_TRACE_IN(cmd_fifo, &trace);
#endif
//send cmd to FM firmware
if ((ret_time = mtk_wcn_stp_send_data(buf, len, FM_TASK_INDX)) <= 0)
{
WCN_DBG(FM_EMG | LINK, "send data over stp failed[%d]\n",ret_time);
return -FM_ELINK;
}
//wait the response form FM firmware
ret_time = FM_EVENT_WAIT_TIMEOUT(link_event->ln_event, mask, timeout);
if (!ret_time) {
if (0 < cnt--) {
WCN_DBG(FM_WAR | LINK, "wait even timeout, [retry_cnt=%d], pid=%d\n", cnt, task->pid);
fm_print_cmd_fifo();
fm_print_evt_fifo();
return -FM_EFW;
goto sw_retry; //retry if timeout and retry cnt > 0
} else {
WCN_DBG(FM_ALT | LINK, "fatal error, SW retry failed, reset HW\n");
return -FM_EFW;
}
}
FM_EVENT_CLR(link_event->ln_event, mask);
if (callback) {
callback(&link_event->result);
}
return 0;
}
fm_s32 fm_event_parser(fm_s32(*rds_parser)(struct rds_rx_t*, fm_s32))
{
fm_s32 len;
fm_s32 i = 0;
fm_u8 opcode = 0;
fm_u16 length = 0;
fm_u8 ch;
fm_u8 rx_buf[RX_BUF_SIZE + 10] = {0}; //the 10 bytes are protect gaps
static volatile fm_task_parser_state state = FM_TASK_RX_PARSER_PKT_TYPE;
struct fm_trace_t trace;
struct task_struct *task = current;
len = mtk_wcn_stp_receive_data(rx_buf, RX_BUF_SIZE, FM_TASK_INDX);
WCN_DBG(FM_DBG | LINK, "[len=%d],[CMD=0x%02x 0x%02x 0x%02x 0x%02x]\n", len, rx_buf[0], rx_buf[1], rx_buf[2], rx_buf[3]);
while (i < len) {
ch = rx_buf[i];
switch (state) {
case FM_TASK_RX_PARSER_PKT_TYPE:
if (ch == FM_TASK_EVENT_PKT_TYPE) {
if ((i + 5) < RX_BUF_SIZE) {
WCN_DBG(FM_DBG | LINK, "0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x \n", rx_buf[i], rx_buf[i+1], rx_buf[i+2], rx_buf[i+3], rx_buf[i+4], rx_buf[i+5]);
} else {
WCN_DBG(FM_DBG | LINK, "0x%02x 0x%02x\n", rx_buf[i], rx_buf[i+1]);
}
state = FM_TASK_RX_PARSER_OPCODE;
} else {
WCN_DBG(FM_ALT | LINK, "event pkt type error (rx_buf[%d] = 0x%02x)\n", i, ch);
}
i++;
break;
case FM_TASK_RX_PARSER_OPCODE:
i++;
opcode = ch;
state = FM_TASK_RX_PARSER_PKT_LEN_1;
break;
case FM_TASK_RX_PARSER_PKT_LEN_1:
i++;
length = ch;
state = FM_TASK_RX_PARSER_PKT_LEN_2;
break;
case FM_TASK_RX_PARSER_PKT_LEN_2:
i++;
length |= (fm_u16)(ch << 0x8);
#ifdef FM_TRACE_ENABLE
trace.type = FM_TASK_EVENT_PKT_TYPE;
trace.opcode = opcode;
trace.len = length;
trace.tid = (fm_s32)task->pid;
fm_memset(trace.pkt, 0, FM_TRACE_PKT_SIZE);
fm_memcpy(trace.pkt, &rx_buf[i], (length > FM_TRACE_PKT_SIZE) ? FM_TRACE_PKT_SIZE : length);
if (fm_true == FM_TRACE_FULL(cmd_fifo)) {
FM_TRACE_OUT(cmd_fifo, NULL);
}
FM_TRACE_IN(cmd_fifo, &trace);
#endif
if (length > 0) {
state = FM_TASK_RX_PARSER_PKT_PAYLOAD;
} else {
state = FM_TASK_RX_PARSER_PKT_TYPE;
FM_EVENT_SEND(link_event->ln_event, (1 << opcode));
}
break;
case FM_TASK_RX_PARSER_PKT_PAYLOAD:
switch (opcode) {
case FM_TUNE_OPCODE:
if ((length == 1) && (rx_buf[i] == 1)) {
FM_EVENT_SEND(link_event->ln_event, FLAG_TUNE_DONE);
}
break;
case FM_SOFT_MUTE_TUNE_OPCODE:
if (length >= 2) {
fm_memcpy(link_event->result.cqi, &rx_buf[i], (length > FM_CQI_BUF_SIZE) ? FM_CQI_BUF_SIZE : length);
FM_EVENT_SEND(link_event->ln_event, FLAG_SM_TUNE);
}
break;
case FM_SEEK_OPCODE:
if ((i + 1) < RX_BUF_SIZE) {
link_event->result.seek_result = rx_buf[i] + (rx_buf[i+1] << 8); // 8760 means 87.60Mhz
}
FM_EVENT_SEND(link_event->ln_event, FLAG_SEEK_DONE);
break;
case FM_SCAN_OPCODE:
//check if the result data is long enough
if ((RX_BUF_SIZE - i) < (sizeof(fm_u16) * FM_SCANTBL_SIZE)) {
WCN_DBG(FM_ALT | LINK, "FM_SCAN_OPCODE err, [tblsize=%d],[bufsize=%d]\n", (sizeof(fm_u16) * FM_SCANTBL_SIZE), (RX_BUF_SIZE - i));
FM_EVENT_SEND(link_event->ln_event, FLAG_SCAN_DONE);
return 0;
} else if ((length >= FM_CQI_BUF_SIZE) && ((RX_BUF_SIZE - i) >= FM_CQI_BUF_SIZE)) {
fm_memcpy(link_event->result.cqi, &rx_buf[i], FM_CQI_BUF_SIZE);
FM_EVENT_SEND(link_event->ln_event, FLAG_CQI_DONE);
} else {
fm_memcpy(link_event->result.scan_result, &rx_buf[i], sizeof(fm_u16) * FM_SCANTBL_SIZE);
FM_EVENT_SEND(link_event->ln_event, FLAG_SCAN_DONE);
}
break;
case FSPI_READ_OPCODE:
if ((i + 1) < RX_BUF_SIZE) {
link_event->result.fspi_rd = (rx_buf[i] + (rx_buf[i+1] << 8));
}
FM_EVENT_SEND(link_event->ln_event, (1 << opcode));
break;
case RDS_RX_DATA_OPCODE:
//check if the rds data is long enough
if ((RX_BUF_SIZE - i) < length) {
WCN_DBG(FM_ALT | LINK, "RDS RX err, [rxlen=%d],[bufsize=%d]\n", (fm_s32)length, (RX_BUF_SIZE - i));
FM_EVENT_SEND(link_event->ln_event, (1 << opcode));
break;
}
//copy rds data to rds buf
fm_memcpy(&link_event->result.rds_rx_result, &rx_buf[i], length);
/*Handle the RDS data that we get*/
if (rds_parser) {
rds_parser(&link_event->result.rds_rx_result, length);
} else {
WCN_DBG(FM_WAR | LINK, "no method to parse RDS data\n");
}
FM_EVENT_SEND(link_event->ln_event, (1 << opcode));
break;
default:
FM_EVENT_SEND(link_event->ln_event, (1 << opcode));
break;
}
state = FM_TASK_RX_PARSER_PKT_TYPE;
i += length;
break;
default:
break;
}
}
return 0;
}
fm_bool fm_wait_stc_done(fm_u32 sec)
{
return fm_true;
}
fm_s32 fm_force_active_event(fm_u32 mask)
{
fm_u32 flag;
flag = FM_EVENT_GET(link_event->ln_event);
WCN_DBG(FM_WAR | LINK, "before force active event, [flag=0x%08x]\n", flag);
flag = FM_EVENT_SEND(link_event->ln_event, mask);
WCN_DBG(FM_WAR | LINK, "after force active event, [flag=0x%08x]\n", flag);
return 0;
}
extern fm_s32 fm_print_cmd_fifo(void)
{
#ifdef FM_TRACE_ENABLE
struct fm_trace_t trace;
fm_s32 i = 0;
while (fm_false == FM_TRACE_EMPTY(cmd_fifo)) {
fm_memset(trace.pkt, 0, FM_TRACE_PKT_SIZE);
FM_TRACE_OUT(cmd_fifo, &trace);
WCN_DBG(FM_ALT | LINK, "trace, type %d, op %d, len %d, tid %d, time %d\n", trace.type, trace.opcode, trace.len, trace.tid, jiffies_to_msecs(abs(trace.time)));
i = 0;
while ((trace.len > 0) && (i < trace.len) && (i < (FM_TRACE_PKT_SIZE-8))) {
WCN_DBG(FM_ALT | LINK, "trace, %02x %02x %02x %02x %02x %02x %02x %02x\n", \
trace.pkt[i], trace.pkt[i+1], trace.pkt[i+2], trace.pkt[i+3], trace.pkt[i+4], trace.pkt[i+5], trace.pkt[i+6], trace.pkt[i+7]);
i += 8;
}
WCN_DBG(FM_ALT | LINK, "trace\n");
}
#endif
return 0;
}
extern fm_s32 fm_print_evt_fifo(void)
{
#ifdef FM_TRACE_ENABLE
struct fm_trace_t trace;
fm_s32 i = 0;
while (fm_false == FM_TRACE_EMPTY(evt_fifo)) {
fm_memset(trace.pkt, 0, FM_TRACE_PKT_SIZE);
FM_TRACE_OUT(evt_fifo, &trace);
WCN_DBG(FM_ALT | LINK, "%s: op %d, len %d, %d\n", evt_fifo->name, trace.opcode, trace.len, jiffies_to_msecs(abs(trace.time)));
i = 0;
while ((trace.len > 0) && (i < trace.len) && (i < (FM_TRACE_PKT_SIZE-8))) {
WCN_DBG(FM_ALT | LINK, "%s: %02x %02x %02x %02x %02x %02x %02x %02x\n", \
evt_fifo->name, trace.pkt[i], trace.pkt[i+1], trace.pkt[i+2], trace.pkt[i+3], trace.pkt[i+4], trace.pkt[i+5], trace.pkt[i+6], trace.pkt[i+7]);
i += 8;
}
WCN_DBG(FM_ALT | LINK, "%s\n", evt_fifo->name);
}
#endif
return 0;
}
#endif
fm_s32 fm_trace_in(struct fm_trace_fifo_t *thiz, struct fm_trace_t *new_tra)
{
FMR_ASSERT(new_tra);
if (thiz->len < thiz->size) {
fm_memcpy(&(thiz->trace[thiz->in]), new_tra, sizeof(struct fm_trace_t));
thiz->trace[thiz->in].time = jiffies;
thiz->in = (thiz->in + 1) % thiz->size;
thiz->len++;
//WCN_DBG(FM_DBG | RDSC, "add a new tra[len=%d]\n", thiz->len);
} else {
WCN_DBG(FM_WAR | RDSC, "tra buf is full\n");
return -FM_ENOMEM;
}
return 0;
}
fm_s32 fm_trace_out(struct fm_trace_fifo_t *thiz, struct fm_trace_t *dst_tra)
{
if (thiz->len > 0) {
if (dst_tra) {
fm_memcpy(dst_tra, &(thiz->trace[thiz->out]), sizeof(struct fm_trace_t));
fm_memset(&(thiz->trace[thiz->out]), 0, sizeof(struct fm_trace_t));
}
thiz->out = (thiz->out + 1) % thiz->size;
thiz->len--;
//WCN_DBG(FM_DBG | RDSC, "del a tra[len=%d]\n", thiz->len);
} else {
WCN_DBG(FM_WAR | RDSC, "tra buf is empty\n");
}
return 0;
}
fm_bool fm_trace_is_full(struct fm_trace_fifo_t *thiz)
{
return (thiz->len == thiz->size) ? fm_true : fm_false;
}
fm_bool fm_trace_is_empty(struct fm_trace_fifo_t *thiz)
{
return (thiz->len == 0) ? fm_true : fm_false;
}
struct fm_trace_fifo_t* fm_trace_fifo_create(const fm_s8 *name)
{
struct fm_trace_fifo_t *tmp;
if (!(tmp = fm_zalloc(sizeof(struct fm_trace_fifo_t)))) {
WCN_DBG(FM_ALT | MAIN, "fm_zalloc(fm_trace_fifo) -ENOMEM\n");
return NULL;
}
fm_memcpy(tmp->name, name, 20);
tmp->size = FM_TRACE_FIFO_SIZE;
tmp->in = 0;
tmp->out = 0;
tmp->len = 0;
tmp->trace_in = fm_trace_in;
tmp->trace_out = fm_trace_out;
tmp->is_full = fm_trace_is_full;
tmp->is_empty = fm_trace_is_empty;
WCN_DBG(FM_NTC | LINK, "%s created\n", tmp->name);
return tmp;
}
fm_s32 fm_trace_fifo_release(struct fm_trace_fifo_t *fifo)
{
if (fifo) {
WCN_DBG(FM_NTC | LINK, "%s released\n", fifo->name);
fm_free(fifo);
}
return 0;
}

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File diff suppressed because it is too large Load Diff

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