a8d46129a9
Fixes: 4491f53eac ("arm64: dts: rockchip: rv1126b-thunder-boot: Enlarge meta memory size to 0xe0000")
Signed-off-by: Yuefu Su <yuefu.su@rock-chips.com>
Change-Id: I0ea6b0480296c7e3f931e34388c5f49665e05ec6
134 lines
3.0 KiB
Plaintext
134 lines
3.0 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2025 Rockchip Electronics Co., Ltd.
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*/
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/ {
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ramdisk: ramdisk {
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compatible = "rockchip,ramdisk";
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memory-region = <&ramdisk_r>;
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};
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thunder_boot_rkisp: thunder-boot-rkisp {
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compatible = "rockchip,thunder-boot-rkisp";
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clocks = <&cru CLK_HPMCU>,
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<&cru PCLK_HPMCU_INTMUX>, <&cru PCLK_HPMCU_MAILBOX>,
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<&cru PCLK_WDT_HPMCU>, <&cru HCLK_CACHE>,
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<&cru PCLK_TIMER>,
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<&cru ACLK_ISP>, <&cru HCLK_ISP>,
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<&cru CLK_CORE_ISP>, <&cru ISP0CLK_VICAP>,
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<&cru ACLK_VICAP>, <&cru HCLK_VICAP>,
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<&cru DCLK_VICAP>, <&cru ISP0CLK_VICAP>,
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<&cru PCLK_CSI2HOST0>, <&cru PCLK_CSI2HOST1>,
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<&cru CLK_I2C4>, <&cru PCLK_I2C4>;
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clock-names = "clk_hpmcu",
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"pclk_hpmcu_intmux", "pclk_hpmcu_mailbox",
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"pclk_wdt_hpmcu", "hclk_cache",
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"pclk_timer",
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"aclk_isp", "hclk_isp",
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"clk_isp_core", "clk_isp_core_vicap",
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"aclk_cif","hclk_cif",
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"dclk_cif", "isp0clk_cif",
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"pclk_csi2host0", "pclk_csi2host1",
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"clk_i2c4", "pclk_i2c4";
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};
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thunder_boot_service: thunder-boot-service {
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compatible = "rockchip,thunder-boot-service";
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mbox-names = "amp-rx";
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mboxes = <&hpmcu_mbox0 0>;
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resets = <&cru SRST_RESETN_HPMCU_FULL_CLUSTER>;
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reset-names = "hpmcu_full_cluster";
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memory-region = <&rtos>;
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status = "okay";
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};
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};
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&hpmcu_mbox0 {
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status = "okay";
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};
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&hw_decompress {
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memory-region = <&ramdisk_c>;
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status = "okay";
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};
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&reserved_memory {
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/*
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* reserved memory layout
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*
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* H _______________________
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* | |
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* | ramdisk_c |
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* |_______________________|
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* | |
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* | ramdisk_r |
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* 0x48c40000 |_______________________|
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* | |
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* | mcu_log |
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* 0x48c3c000 |_______________________|
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* | |
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* | mcu |
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* 0x48c00000 |_______________________|
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* | |
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* | [TEEOS+TA+SHM] |
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* 0x48400000 |_______________________|
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* | |
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* | isp[0..1]_tb_rmem |
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* |_______________________|
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* | |
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* | meta |
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* 0x41240000 |_______________________|
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* | |
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* | fdt |
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* 0x41200000 |_______________________|
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* | |
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* | kernel_r |
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* 0x40208000 |_______________________|
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* | |
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* | bl31 |
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* L |_______________________|
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*
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*/
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meta: meta@41240000 {
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/* reg's offset MUST match with RTOS */
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reg = <0x41240000 0x000e0000>;
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};
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rkisp_thunderboot: rkisp@41320000 {
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/* reg's offset MUST match with RTOS */
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/*
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* vicap, capture raw10, ceil(w*10/8/256)*256*h *4(buf num)
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* e.g. 1920x1080: 0xa8c000
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*/
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reg = <0x41320000 0xa8c000>;
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};
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rkisp1_thunderboot: rkisp1_thunderboot {
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/* vicap capture for a second camera */
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};
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/* Should enable this node if the security feature is enabled, like TA. */
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tee: tee@48400000 {
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reg = <0x48400000 0x00800000>;
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status = "disabled";
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};
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rtos: rtos@48c00000 {
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reg = <0x48c00000 0x0003a000>;
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};
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mcu_log: mcu_log@48c3c000 {
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reg = <0x48c3c000 0x4000>;
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};
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ramdisk_r: ramdisk_r {
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reg = <0x48c40000 (10 * 0x00100000)>;
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};
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ramdisk_c: ramdisk_c {
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reg = <0x49640000 (5 * 0x00100000)>;
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};
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};
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