5dcbe7e386
As suggested by Arnd Bergmann, the newly added mmc aliases should be board specific, so move them from the general dtsi to the individual boards. Suggested-by: Arnd Bergmann <arnd@kernel.org> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20210324122235.1059292-7-heiko@sntech.de
112 lines
2.3 KiB
Plaintext
112 lines
2.3 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd
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* Copyright (c) 2019 Markus Reichl <m.reichl@fivetechno.de>
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*/
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/dts-v1/;
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#include "rk3399-roc-pc.dtsi"
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/ {
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model = "Firefly ROC-RK3399-PC Mezzanine Board";
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compatible = "firefly,roc-rk3399-pc-mezzanine", "rockchip,rk3399";
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aliases {
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mmc2 = &sdio0;
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};
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/* MP8009 PoE PD */
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poe_12v: poe-12v {
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compatible = "regulator-fixed";
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regulator-name = "poe_12v";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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};
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vcc3v3_ngff: vcc3v3-ngff {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_ngff";
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enable-active-high;
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gpio = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc3v3_ngff_en>;
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&sys_12v>;
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};
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vcc3v3_pcie: vcc3v3-pcie {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pcie";
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enable-active-high;
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gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc3v3_pcie_en>;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&sys_12v>;
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};
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};
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&sys_12v {
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vin-supply = <&poe_12v>;
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};
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&pcie_phy {
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status = "okay";
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};
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&pcie0 {
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ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
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num-lanes = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_perst>;
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vpcie3v3-supply = <&vcc3v3_pcie>;
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vpcie1v8-supply = <&vcc1v8_pmu>;
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vpcie0v9-supply = <&vcca_0v9>;
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status = "okay";
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};
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&pinctrl {
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ngff {
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vcc3v3_ngff_en: vcc3v3-ngff-en {
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rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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pcie {
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vcc3v3_pcie_en: vcc3v3-pcie-en {
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rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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pcie_perst: pcie-perst {
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rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&sdio0 {
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bus-width = <4>;
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cap-sd-highspeed;
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cap-sdio-irq;
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keep-power-in-suspend;
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mmc-pwrseq = <&sdio_pwrseq>;
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non-removable;
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pinctrl-names = "default";
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pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
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sd-uhs-sdr104;
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vmmc-supply = <&vcc3v3_ngff>;
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vqmmc-supply = <&vcc_1v8>;
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status = "okay";
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
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status = "okay";
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};
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