72101c82b8
* commit '3a8b94c5be2ca4a2a9dd5916074e2f466ebcc57f': (873 commits) arm64: dts: rockchip: rv1126b: Remove dma for i2c0, i2c4 and i2c5 dt-bindings: i2c: rockchip: add rockchip,rv1126b-i2c i2c: rk3x: Add dma feature arm64: dts: rockchip: rv1126b-evb: Change clock rates to 24M for fephy ethernet: stmmac: dwmac-rk: Correct clock input/output sel for RV1126B net: phy: rockchip-fephy: Add param to access group registers net: phy: rockchip-fephy: Fix for the correct names net: phy: rockchip-fephy: Add 24M clock rate setting net: phy: rockchip-fephy: Change off-energy level0 threshold between link up/down power: supply: rk817_battery: Supports battery aging calibration power: supply: rk817_battery: Supporting battery charging with JEITA standards drm/rockchip: vop2: update cluster fbc xoffset check rule arm64: dts: rockchip: rk3576: Add customer demand nvmem cell for opp table driver: rknpu: Add opp data for rk3576s MALI: bifrost: Add opp data for rk3576s cpufreq: rockchip: Add opp data for rk3576s media: rockchip: isp: support wrap stream latter for isp35 arm64: dts: rockchip: rv1126b-pinctrl: update i2c config arm64: dts: rockchip: rk3588: Adjust the HDMITX1 DDC M0 IO driver strength media: rockchip: vicap add soft reset before start stream ... Change-Id: I6973bf32974c14f06231e1e87f7da24a321efa22
88 lines
1.6 KiB
Plaintext
88 lines
1.6 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
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*/
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/dts-v1/;
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#include <dt-bindings/display/media-bus-format.h>
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#include "rk3506.dtsi"
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#include "rk3506-evb1-v10.dtsi"
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/ {
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model = "Rockchip RK3506G(QFN128) EVB1 V10 Board + RK EVB VOP3 RGB24BIT DISPLAY Ext Board";
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compatible = "rockchip,rk3506g-evb1-v10-rgb-Q7050ITH2641AA1T", "rockchip,rk3506";
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panel: panel {
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compatible = "simple-panel";
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bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
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backlight = <&backlight>;
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enable-gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_LOW>;
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enable-delay-ms = <20>;
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reset-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
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reset-delay-ms = <10>;
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status = "okay";
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display-timings {
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native-mode = <&q7050ith2641aa1t_timing>;
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q7050ith2641aa1t_timing: timing0 {
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clock-frequency = <51200000>;
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hactive = <1024>;
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vactive = <600>;
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hback-porch = <160>;
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hfront-porch = <160>;
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vback-porch = <23>;
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vfront-porch = <12>;
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hsync-len = <24>;
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vsync-len = <2>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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};
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port {
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panel_in_rgb: endpoint {
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remote-endpoint = <&rgb_out_panel>;
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};
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};
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};
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};
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&cma {
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size = <0x1600000>;
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};
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&rgb {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&rgb888_pins>;
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ports {
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rgb_out: port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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rgb_out_panel: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&panel_in_rgb>;
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};
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};
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};
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};
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&rgb_in_vop {
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status = "okay";
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};
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&route_rgb {
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status = "okay";
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};
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&u2phy_otg0 {
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rockchip,vbus-always-on;
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};
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