Files
rockchip-kernel/arch/arm/boot/dts/rockchip/rk3506-rk801.dtsi
Tao Huang 72101c82b8 Merge commit '3a8b94c5be2ca4a2a9dd5916074e2f466ebcc57f'
* commit '3a8b94c5be2ca4a2a9dd5916074e2f466ebcc57f': (873 commits)
  arm64: dts: rockchip: rv1126b: Remove dma for i2c0, i2c4 and i2c5
  dt-bindings: i2c: rockchip: add rockchip,rv1126b-i2c
  i2c: rk3x: Add dma feature
  arm64: dts: rockchip: rv1126b-evb: Change clock rates to 24M for fephy
  ethernet: stmmac: dwmac-rk: Correct clock input/output sel for RV1126B
  net: phy: rockchip-fephy: Add param to access group registers
  net: phy: rockchip-fephy: Fix for the correct names
  net: phy: rockchip-fephy: Add 24M clock rate setting
  net: phy: rockchip-fephy: Change off-energy level0 threshold between link up/down
  power: supply: rk817_battery: Supports battery aging calibration
  power: supply: rk817_battery: Supporting battery charging with JEITA standards‌
  drm/rockchip: vop2: update cluster fbc xoffset check rule
  arm64: dts: rockchip: rk3576: Add customer demand nvmem cell for opp table
  driver: rknpu: Add opp data for rk3576s
  MALI: bifrost: Add opp data for rk3576s
  cpufreq: rockchip: Add opp data for rk3576s
  media: rockchip: isp: support wrap stream latter for isp35
  arm64: dts: rockchip: rv1126b-pinctrl: update i2c config
  arm64: dts: rockchip: rk3588: Adjust the HDMITX1 DDC M0 IO driver strength
  media: rockchip: vicap add soft reset before start stream
  ...

Change-Id: I6973bf32974c14f06231e1e87f7da24a321efa22
2025-07-24 19:38:29 +08:00

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2.8 KiB
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
*
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
&i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&rm_io0_i2c0_scl &rm_io2_i2c0_sda>;
rk801: rk801@27 {
compatible = "rockchip,rk801";
status = "okay";
reg = <0x27>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PC2 IRQ_TYPE_LEVEL_LOW>;
pwrctrl-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int>;
rockchip,system-power-controller;
wakeup-source;
vcc1-supply = <&vcc12v_dc>;
vcc2-supply = <&vcc12v_dc>;
vcc3-supply = <&vcc5v0_sys>;
vcc4-supply = <&vcc5v0_sys>;
vcc5-supply = <&vcc3v3_sys>;
vcc6-supply = <&vcc3v3_sys>;
vcc7-supply = <&vcc3v3_sys>;
regulators {
vcc3v3_sys: DCDC_REG1 {
regulator-name = "vcc3v3_sys";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-initial-mode = <0x1>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-mode = <0x2>;
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vcc5v0_sys: DCDC_REG2 {
regulator-name = "vcc5v0_sys";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-initial-mode = <0x1>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-mode = <0x2>;
regulator-on-in-suspend;
regulator-suspend-microvolt = <5000000>;
};
};
vcc_ddr: DCDC_REG3 {
regulator-name = "vcc_ddr";
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-mode = <0x2>;
regulator-on-in-suspend;
};
};
vdd_cpu: DCDC_REG4 {
regulator-name = "vdd_cpu";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1500000>;
regulator-initial-mode = <0x1>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-mode = <0x2>;
regulator-off-in-suspend;
};
};
vdd0v9_sys: LDO_REG1 {
regulator-name = "vdd0v9_sys";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <900000>;
};
};
vcc_1v8: LDO_REG2 {
regulator-name = "vcc_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vcc_3v3: SWITCH_REG {
regulator-name = "vcc_3v3";
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
};
};
};