Files
rockchip-kernel/arch/arm64/boot/dts/rockchip/rk3568-evb6-ddr3-v10.dtsi
Wu Liangqing b81652bce8 arm64: dts: rockchip: rk356x ddr3 set dmc max-freq 1056Mhz
Change-Id: I33191a9b62a5b6fec8d88de79119898033b63616
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
2020-12-29 10:22:58 +08:00

338 lines
6.4 KiB
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
#include "rk3568.dtsi"
#include "rk3568-evb.dtsi"
/ {
model = "Rockchip RK3568 EVB6 DDR3 V10 Board";
compatible = "rockchip,rk3568-evb6-ddr3-v10", "rockchip,rk3568";
pcie20_3v3: gpio-regulator {
compatible = "regulator-gpio";
regulator-name = "pcie20_3v3";
regulator-min-microvolt = <0100000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
gpios-states = <0x1>;
states = <0100000 0x0
3300000 0x1>;
};
pcie30_avdd0v9: pcie30-avdd0v9 {
compatible = "regulator-fixed";
regulator-name = "pcie30_avdd0v9";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
vin-supply = <&vcc3v3_sys>;
};
pcie30_avdd1v8: pcie30-avdd1v8 {
compatible = "regulator-fixed";
regulator-name = "pcie30_avdd1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc3v3_sys>;
};
pcie30_3v3: gpio-regulator {
compatible = "regulator-gpio";
regulator-name = "pcie30_3v3";
regulator-min-microvolt = <0100000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
gpios-states = <0x1>;
states = <0100000 0x0
3300000 0x1>;
};
rk_headset: rk-headset {
compatible = "rockchip_headset";
headset_gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
};
};
&combphy0_us {
status = "okay";
};
&combphy1_usq {
rockchip,dis-u3otg1-port;
status = "okay";
};
&combphy2_psq {
status = "disabled";
};
&dmc_opp_table {
opp-1056000000 {
opp-hz = /bits/ 64 <1056000000>;
opp-microvolt = <900000>;
};
/delete-node/ opp-1560000000;
};
&dmc {
system-status-freq = <
/*system status freq(KHz)*/
SYS_STATUS_NORMAL 780000
SYS_STATUS_REBOOT 1056000
SYS_STATUS_SUSPEND 324000
SYS_STATUS_VIDEO_1080P 528000
SYS_STATUS_BOOST 1056000
SYS_STATUS_ISP 1056000
SYS_STATUS_PERFORMANCE 1056000
>;
};
/*
* mipi_dphy0 needs to be enabled
* when dsi0 is enabled
*/
&dsi0 {
status = "okay";
};
&dsi0_in_vp0 {
status = "okay";
};
&dsi0_in_vp1 {
status = "disabled";
};
&dsi0_panel {
power-supply = <&vcc3v3_lcd0_n>;
};
/*
* mipi_dphy1 needs to be enabled
* when dsi1 is enabled
*/
&dsi1 {
status = "disabled";
};
&dsi1_in_vp0 {
status = "disabled";
};
&dsi1_in_vp1 {
status = "disabled";
};
&dsi1_panel {
power-supply = <&vcc3v3_lcd1_n>;
};
/*
* power-supply should switche to vcc3v3_lcd1_n
* when mipi panel is connected to dsi1.
*/
&gt1x {
power-supply = <&vcc3v3_lcd0_n>;
};
&i2c2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c2m1_xfer>;
mxc6655xa: mxc6655xa@15 {
status = "okay";
compatible = "gs_mxc6655xa";
pinctrl-names = "default";
pinctrl-0 = <&mxc6655xa_irq_gpio>;
reg = <0x15>;
irq-gpio = <&gpio3 RK_PC1 IRQ_TYPE_LEVEL_LOW>;
irq_enable = <0>;
poll_delay_ms = <30>;
type = <SENSOR_TYPE_ACCEL>;
power-off-in-suspend = <1>;
layout = <4>;
};
};
&i2c5 {
status = "disabled";
/delete-node/ mxc6655xa@15;
};
&mipi_dphy0 {
status = "okay";
};
&mipi_dphy1 {
status = "disabled";
};
&pcie30phy {
status = "disabled";
};
&pcie2x1 {
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&pcie20_3v3>;
status = "disabled";
};
&pcie3x1 {
rockchip,bifurcation;
reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&pcie30_3v3>;
status = "disabled";
};
&pcie3x2 {
rockchip,bifurcation;
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&pcie30_3v3>;
status = "disabled";
};
&pinctrl {
headphone {
hp_det: hp-det {
rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
wireless-wlan {
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
};
wifi_poweren: wifi-poweren {
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
wifi_32k: wifi-32k {
rockchip,pins = <2 RK_PC6 1 &pcfg_pull_none>;
};
};
wireless-bluetooth {
uart1_gpios: uart1-gpios {
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&route_dsi0 {
status = "okay";
};
&sdmmc1 {
max-frequency = <150000000>;
supports-sdio;
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
sd-uhs-sdr104;
logic-remove-card;
status = "okay";
};
&sdmmc2 {
status = "disabled";
};
&spdif_8ch {
status = "disabled";
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
};
&usbhost_dwc3 {
phys = <&u2phy0_host>;
phy-names = "usb2-phy";
status = "okay";
};
&vcc3v3_lcd0_n {
gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
&vcc3v3_lcd1_n {
gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
&wireless_wlan {
pinctrl-names = "default";
pinctrl-0 = <&wifi_32k &wifi_poweren &wifi_host_wake_irq>;
WIFI,poweren_gpio = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>;
WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
};
&wireless_bluetooth {
compatible = "bluetooth-platdata";
clocks = <&pmucru CLK_RTC_32K>;
clock-names = "ext_clock";
//wifi-bt-power-toggle;
uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "rts_gpio";
pinctrl-0 = <&uart1m0_rtsn>;
pinctrl-1 = <&uart1_gpios>;
BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&gmac1 {
phy-mode = "rgmii";
clock_in_out = "output";
snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
assigned-clock-rates = <0>, <125000000>;
pinctrl-names = "default";
pinctrl-0 = <&gmac1m0_miim
&gmac1m0_tx_bus2_level3
&gmac1m0_rx_bus2
&gmac1m0_rgmii_clk_level2
&gmac1m0_rgmii_bus_level3>;
tx_delay = <0x46>;
rx_delay = <0x2f>;
phy-handle = <&rgmii_phy1>;
status = "okay";
};
&mdio1 {
rgmii_phy1: phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
};
};