a6107c8add
This reverts commit e37604f00f.
Signed-off-by: Alex Zhao <zzc@rock-chips.com>
Change-Id: I90a96482445710b6089acd5b6ad19264462b35f7
390 lines
6.9 KiB
Plaintext
390 lines
6.9 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include "rk3566.dtsi"
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#include "rk3566-evb.dtsi"
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/ {
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model = "Rockchip RK3566 EVB1 DDR4 V10 Board";
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compatible = "rockchip,rk3566-evb1-ddr4-v10", "rockchip,rk3566";
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pcie20_3v3: gpio-regulator {
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compatible = "regulator-gpio";
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regulator-name = "pcie20_3v3";
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regulator-min-microvolt = <0100000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
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gpios-states = <0x1>;
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states = <0100000 0x0
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3300000 0x1>;
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};
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rk_headset: rk-headset {
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compatible = "rockchip_headset";
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headset_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&hp_det>;
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};
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vcc3v3_vga: vcc3v3-vga {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_vga";
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regulator-always-on;
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regulator-boot-on;
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gpio = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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vin-supply = <&vcc3v3_sys>;
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};
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};
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&audiopwmout_diff {
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status = "disabled";
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};
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&combphy1_usq {
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status = "okay";
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};
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&combphy2_psq {
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status = "disabled";
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};
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&csi_dphy {
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status = "okay";
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/*lane-mode:
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* index0: 4 means full mode, 2 means split mode
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* index1: 1 means using lane0/1, 2 means using lane2/3
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* attention: if lane-mode is not set, default mode is full mode,
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* full mode and split mode are mutually exclusive
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* eg: rockchip,lane-mode = <2 1>, means using split mode, and using lane0/1
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*/
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rockchip,lane-mode = <2 2>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_in_ucam1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&ov02k10_out>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csidphy_out: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&mipi_csi2_input>;
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};
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};
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};
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};
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&dig_acodec {
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status = "disabled";
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rockchip,pwm-output-mode;
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pinctrl-names = "default";
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pinctrl-0 = <&audiopwm_loutp
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&audiopwm_loutn
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&audiopwm_routp
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&audiopwm_routn
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>;
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};
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/*
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* mipi_dphy0 needs to be enabled
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* when dsi0 is enabled
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*/
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&dsi0 {
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status = "okay";
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};
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&dsi0_in_vp0 {
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status = "okay";
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};
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&dsi0_in_vp1 {
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status = "disabled";
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};
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&dsi0_panel {
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power-supply = <&vcc3v3_lcd0_n>;
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reset-gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&lcd0_rst_gpio>;
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};
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/*
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* mipi_dphy1 needs to be enabled
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* when dsi1 is enabled
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*/
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&dsi1 {
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status = "disabled";
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};
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&dsi1_in_vp0 {
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status = "disabled";
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};
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&dsi1_in_vp1 {
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status = "disabled";
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};
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&dsi1_panel {
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power-supply = <&vcc3v3_lcd1_n>;
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reset-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&lcd1_rst_gpio>;
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};
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&edp {
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hpd-gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&edp_phy {
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status = "okay";
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};
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&edp_in_vp0 {
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status = "okay";
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};
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&edp_in_vp1 {
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status = "disabled";
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};
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/*
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* power-supply should switche to vcc3v3_lcd1_n
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* when mipi panel is connected to dsi1.
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*/
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>1x {
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power-supply = <&vcc3v3_lcd0_n>;
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};
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&hdmi {
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rockchip,phy-table =
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<92812500 0x8009 0x0000 0x0270>,
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<165000000 0x800b 0x0000 0x026d>,
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<185625000 0x800b 0x0000 0x01ed>,
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<297000000 0x800b 0x0000 0x01ad>,
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<594000000 0x8029 0x0000 0x0088>,
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<000000000 0x0000 0x0000 0x0000>;
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};
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&i2c2 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2m1_xfer>;
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ov02k10: ov02k10@36 {
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status = "okay";
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compatible = "ovti,ov02k10";
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reg = <0x36>;
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clocks = <&cru CLK_CAM1_OUT>;
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clock-names = "xvclk";
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pinctrl-names = "default";
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pinctrl-0 = <&cam_clkout1>;
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reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
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pwdn-gpios = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
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power-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "TongJu";
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rockchip,camera-module-lens-name = "CHT842-MD";
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port {
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ov02k10_out: endpoint {
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remote-endpoint = <&mipi_in_ucam1>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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&i2s3_2ch {
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status = "disabled";
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};
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&mipi_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csidphy_out>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi_in>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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&mipi_dphy0 {
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status = "okay";
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};
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&mipi_dphy1 {
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status = "disabled";
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};
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&pcie2x1 {
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reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
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vpcie3v3-supply = <&pcie20_3v3>;
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status = "disabled";
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};
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&pdm {
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status = "disabled";
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pinctrl-names = "default";
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pinctrl-0 = <&pdmm1_clk1
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&pdmm1_sdi1
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&pdmm1_sdi2
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&pdmm1_sdi3>;
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};
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&pdmics {
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status = "disabled";
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};
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&pdm_mic_array {
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status = "disabled";
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};
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&rkcif {
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status = "okay";
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};
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&rkcif_mipi_lvds {
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status = "okay";
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port {
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cif_mipi_in: endpoint {
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remote-endpoint = <&mipi_csi2_output>;
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data-lanes = <1 2>;
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};
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};
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};
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&rkcif_mmu {
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status = "okay";
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};
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&route_dsi0 {
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status = "okay";
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};
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&sdmmc2 {
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max-frequency = <150000000>;
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supports-sdio;
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bus-width = <4>;
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disable-wp;
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cap-sd-highspeed;
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cap-sdio-irq;
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keep-power-in-suspend;
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mmc-pwrseq = <&sdio_pwrseq>;
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non-removable;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
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sd-uhs-sdr104;
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status = "okay";
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};
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&uart1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart1m1_xfer &uart1m1_ctsn>;
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};
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&vcc3v3_lcd0_n {
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gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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&vcc3v3_lcd1_n {
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gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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&wireless_bluetooth {
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uart_rts_gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default", "rts_gpio";
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pinctrl-0 = <&uart1m1_rtsn>;
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pinctrl-1 = <&uart1_gpios>;
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BT,reset_gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
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BT,wake_gpio = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
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BT,wake_host_irq = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&wireless_wlan {
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_host_wake_irq>;
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WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
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};
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&pinctrl {
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headphone {
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hp_det: hp-det {
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rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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};
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lcd0 {
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lcd0_rst_gpio: lcd0-rst-gpio {
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rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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lcd1 {
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lcd1_rst_gpio: lcd1-rst-gpio {
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rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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wireless-wlan {
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wifi_host_wake_irq: wifi-host-wake-irq {
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rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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};
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wireless-bluetooth {
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uart1_gpios: uart1-gpios {
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rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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