This patch adds schema for primary CPU PLL found on few Qualcomm platforms. Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Link: https://lkml.kernel.org/r/1588573803-3823-1-git-send-email-sivaprak@codeaurora.org Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
41 lines
799 B
YAML
41 lines
799 B
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/clock/qcom,a53pll.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Qualcomm A53 PLL Binding
|
|
|
|
maintainers:
|
|
- Sivaprakash Murugesan <sivaprak@codeaurora.org>
|
|
|
|
description:
|
|
The A53 PLL on few Qualcomm platforms is the main CPU PLL used used for
|
|
frequencies above 1GHz.
|
|
|
|
properties:
|
|
compatible:
|
|
const: qcom,msm8916-a53pll
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
'#clock-cells':
|
|
const: 0
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- '#clock-cells'
|
|
|
|
additionalProperties: false
|
|
|
|
examples:
|
|
#Example 1 - A53 PLL found on MSM8916 devices
|
|
- |
|
|
a53pll: clock@b016000 {
|
|
compatible = "qcom,msm8916-a53pll";
|
|
reg = <0xb016000 0x40>;
|
|
#clock-cells = <0>;
|
|
};
|