rockchip-kernel/arch/arm64/boot/dts/rockchip/rk3568-evb6-ddr3-v10.dtsi

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
 *
 */

/dts-v1/;

#include "rk3568-evb.dtsi"

/ {
	model = "Rockchip RK3568 EVB6 DDR3 V10 Board";
	compatible = "rockchip,rk3568-evb6-ddr3-v10", "rockchip,rk3568";

	pcie20_3v3: gpio-regulator {
		compatible = "regulator-gpio";
		regulator-name = "pcie20_3v3";
		regulator-min-microvolt = <0100000>;
		regulator-max-microvolt = <3300000>;
		gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
		gpios-states = <0x1>;
		states = <0100000 0x0
			  3300000 0x1>;
	};

	pcie30_avdd0v9: pcie30-avdd0v9 {
		compatible = "regulator-fixed";
		regulator-name = "pcie30_avdd0v9";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <900000>;
		regulator-max-microvolt = <900000>;
		vin-supply = <&vcc3v3_sys>;
	};

	pcie30_avdd1v8: pcie30-avdd1v8 {
		compatible = "regulator-fixed";
		regulator-name = "pcie30_avdd1v8";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		vin-supply = <&vcc3v3_sys>;
	};

	pcie30_3v3: gpio-regulator {
		compatible = "regulator-gpio";
		regulator-name = "pcie30_3v3";
		regulator-min-microvolt = <0100000>;
		regulator-max-microvolt = <3300000>;
		gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
		gpios-states = <0x1>;
		states = <0100000 0x0
			  3300000 0x1>;
	};

	rk_headset: rk-headset {
		compatible = "rockchip_headset";
		headset_gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
		pinctrl-names = "default";
		pinctrl-0 = <&hp_det>;
	};
};

&combphy0_us {
	status = "okay";
};

&combphy2_psq {
	status = "disabled";
};

/*
 * mipi_dphy0 needs to be enabled
 * when dsi0 is enabled
 */
&dsi0 {
	status = "okay";
};

&dsi0_in_vp0 {
	status = "okay";
};

&dsi0_in_vp1 {
	status = "disabled";
};

&dsi0_panel {
	power-supply = <&vcc3v3_lcd0_n>;
};

/*
 * mipi_dphy1 needs to be enabled
 * when dsi1 is enabled
 */
&dsi1 {
	status = "disabled";
};

&dsi1_in_vp0 {
	status = "disabled";
};

&dsi1_in_vp1 {
	status = "disabled";
};

&dsi1_panel {
	power-supply = <&vcc3v3_lcd1_n>;
};

/*
 * power-supply should switche to vcc3v3_lcd1_n
 * when mipi panel is connected to dsi1.
 */
&gt1x {
	power-supply = <&vcc3v3_lcd0_n>;
};

&mipi_dphy0 {
	status = "okay";
};

&mipi_dphy1 {
	status = "disabled";
};

&pcie30phy {
	status = "disabled";
};

&pcie2x1 {
	reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
	vpcie3v3-supply = <&pcie20_3v3>;
	status = "disabled";
};

&pcie3x1 {
	rockchip,bifurcation;
	reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
	vpcie3v3-supply = <&pcie30_3v3>;
	status = "disabled";
};

&pcie3x2 {
	rockchip,bifurcation;
	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
	vpcie3v3-supply = <&pcie30_3v3>;
	status = "disabled";
};

&pinctrl {
	headphone {
		hp_det: hp-det {
			rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
		};
	};

	sdio-pwrseq {
		wifi_enable_h: wifi-enable-h {
			rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		wifi_32k: wifi-32k {
			rockchip,pins = <2 RK_PC6 1 &pcfg_pull_none>;
		};
	};

	wireless-bluetooth {
		uart1_gpios: uart1-gpios {
			rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};
};

&sdmmc1 {
	max-frequency = <150000000>;
	supports-sdio;
	bus-width = <4>;
	disable-wp;
	cap-sd-highspeed;
	cap-sdio-irq;
	keep-power-in-suspend;
	mmc-pwrseq = <&sdio_pwrseq>;
	non-removable;
	pinctrl-names = "default";
	pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
	sd-uhs-sdr104;
	status = "okay";
};

&sdmmc2 {
	status = "disabled";
};

&sdio_pwrseq {
	compatible = "mmc-pwrseq-simple";
	clocks = <&pmucru CLK_RTC_32K>;
	clock-names = "ext_clock";
	pinctrl-names = "default";
	pinctrl-0 = <&wifi_enable_h &wifi_32k>;

	/*
	 * On the module itself this is one of these (depending
	 * on the actual card populated):
	 * - SDIO_RESET_L_WL_REG_ON
	 * - PDN (power down when low)
	 */
	reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
};

&uart1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&uart1m0_xfer &uart1ctsnm0>;
};

&usbhost_dwc3 {
	phys = <&u2phy0_host>;
	phy-names = "usb2-phy";
	status = "okay";
};

&vcc3v3_lcd0_n {
	gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
	enable-active-high;
};

&vcc3v3_lcd1_n {
	gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
	enable-active-high;
};

&wireless_wlan {
	compatible = "wlan-platdata";
	rockchip,grf = <&grf>;
	wifi_chip_type = "ap6398s";
	WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&wireless_bluetooth {
	compatible = "bluetooth-platdata";
	clocks = <&pmucru CLK_RTC_32K>;
	clock-names = "ext_clock";
	//wifi-bt-power-toggle;
	uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default", "rts_gpio";
	pinctrl-0 = <&uart1rtsnm0>;
	pinctrl-1 = <&uart1_gpios>;
	BT,reset_gpio    = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
	BT,wake_gpio     = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
	BT,wake_host_irq = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&gmac1 {
	phy-mode = "rgmii";
	clock_in_out = "output";

	snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
	snps,reset-active-low;
	/* Reset time is 20ms, 100ms for rtl8211f */
	snps,reset-delays-us = <0 20000 100000>;

	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
	assigned-clock-rates = <0>, <125000000>;

	pinctrl-names = "default";
	pinctrl-0 = <&gmac1m0_miim_pins &gmac1m0_rgmii_pins>;

	tx_delay = <0x46>;
	rx_delay = <0x2f>;

	phy-handle = <&rgmii_phy1>;
	status = "okay";
};

&mdio1 {
	rgmii_phy1: phy@0 {
		compatible = "ethernet-phy-ieee802.3-c22";
		reg = <0x0>;
	};
};