This patch adds phy property for usb on various rk356x boards. 3566 EVB1 1 x USB2.0 OTG(Micro USB2.0) + 1 x USB3.0 HOST + 2 x USB2.0 HOST 3566 EVB2 1 x USB2.0 OTG(Micro USB2.0) + 1 x USB3.0 HOST + 2 x USB2.0 HOST 3566 EVB3 1 x USB2.0 OTG(Micro USB2.0) + 1 x USB3.0 HOST(mux with SATA, default for SATA) + 2 x USB2.0 HOST 3568 EVB1 1 x USB3.0 OTG(Type-A USB3.0 + Micro USB2.0)+ 1 x USB3.0 HOST + 2 x USB2.0 HOST 3568 EVB6 1 x USB3.0 OTG(Type-A USB3.0 + Micro USB2.0)+ 3 x USB2.0 HOST Change-Id: If1e2cdb03e50e770337648f59f0375034b7062cd Signed-off-by: William Wu <william.wu@rock-chips.com>
300 lines
5.3 KiB
Plaintext
300 lines
5.3 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
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*
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include "rk3568-evb.dtsi"
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/ {
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model = "Rockchip RK3566 EVB3 DDR3 V10 Board";
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compatible = "rockchip,rk3566-evb3-DDR3-v10", "rockchip,rk3568";
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rk_headset: rk-headset {
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compatible = "rockchip_headset";
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headset_gpio = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&hp_det>;
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};
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};
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&combphy1_usq {
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status = "okay";
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};
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/*
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* mipi_dphy0 needs to be enabled
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* when dsi0 is enabled
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*/
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&dsi0 {
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status = "okay";
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};
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&dsi0_in_vp0 {
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status = "okay";
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};
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&dsi0_in_vp1 {
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status = "disabled";
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};
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&dsi0_panel {
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power-supply = <&vcc3v3_lcd0_n>;
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reset-gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&lcd0_rst_gpio>;
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};
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/*
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* mipi_dphy1 needs to be enabled
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* when dsi1 is enabled
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*/
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&dsi1 {
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status = "disabled";
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};
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&dsi1_in_vp0 {
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status = "disabled";
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};
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&dsi1_in_vp1 {
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status = "disabled";
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};
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&dsi1_panel {
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power-supply = <&vcc3v3_lcd1_n>;
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reset-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&lcd1_rst_gpio>;
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};
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&gmac1 {
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phy-mode = "rgmii";
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clock_in_out = "output";
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snps,reset-gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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/* Reset time is 20ms, 100ms for rtl8211f */
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snps,reset-delays-us = <0 20000 100000>;
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assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
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assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
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assigned-clock-rates = <0>, <125000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&gmac1m1_miim_pins &gmac1m1_rgmii_pins>;
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tx_delay = <0x2a>;
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rx_delay = <0x1a>;
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phy-handle = <&rgmii_phy1>;
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status = "okay";
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};
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>1x {
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power-supply = <&vcc3v3_lcd0_n>;
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};
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&i2s1_8ch {
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status = "disabled";
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};
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&i2s3_2ch {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2s3sclkm1
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&i2s3lrckm1
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&i2s3sdim1
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&i2s3sdom1>;
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};
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&mdio1 {
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rgmii_phy1: phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x0>;
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};
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};
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&mipi_dphy0 {
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status = "okay";
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};
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&mipi_dphy1 {
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status = "disabled";
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};
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&pcie2x1 {
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status = "disabled";
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};
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&pdm {
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status = "disabled";
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pinctrl-names = "default";
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pinctrl-0 = <&pdmclk1m1
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&pdmsdi1m1
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&pdmsdi2m1
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&pdmsdi3m1>;
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};
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&pdmics {
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status = "disabled";
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};
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&pdm_mic_array {
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status = "disabled";
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};
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&pinctrl {
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headphone {
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hp_det: hp-det {
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rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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};
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lcd0 {
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lcd0_rst_gpio: lcd-rst-gpio {
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rockchip,pins = <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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lcd1 {
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lcd1_rst_gpio: lcd1-rst-gpio {
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rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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wireless-wlan {
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wifi_host_wake_irq: wifi-host-wake-irq {
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rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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};
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wireless-bluetooth {
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uart1_gpios: uart1-gpios {
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rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&rk809_codec {
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compatible = "rockchip,rk809-codec", "rockchip,rk817-codec";
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clocks = <&cru I2S3_MCLKOUT_TX>;
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clock-names = "mclk";
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pinctrl-names = "default";
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pinctrl-0 = <&i2s3mclkm1>;
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hp-volume = <20>;
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spk-volume = <3>;
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mic-in-differential;
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status = "okay";
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};
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&rk809_sound {
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status = "okay";
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,name = "rockchip,rk809-codec";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,cpu {
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sound-dai = <&i2s3_2ch>;
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};
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simple-audio-card,codec {
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sound-dai = <&rk809_codec>;
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};
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};
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&sata2 {
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status = "okay";
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};
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&sdio_pwrseq {
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compatible = "mmc-pwrseq-simple";
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clocks = <&rk809 1>;
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clock-names = "ext_clock";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_enable_h>;
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/*
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* On the module itself this is one of these (depending
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* on the actual card populated):
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* - SDIO_RESET_L_WL_REG_ON
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* - PDN (power down when low)
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*/
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reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
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};
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&sdmmc1 {
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max-frequency = <150000000>;
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supports-sdio;
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bus-width = <4>;
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disable-wp;
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cap-sd-highspeed;
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cap-sdio-irq;
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keep-power-in-suspend;
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mmc-pwrseq = <&sdio_pwrseq>;
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non-removable;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
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sd-uhs-sdr104;
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status = "okay";
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};
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&sdmmc2 {
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status = "disabled";
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};
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&spdif_8ch {
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status = "disabled";
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};
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&uart1 {
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status = "okay";
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};
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&usbdrd_dwc3 {
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dr_mode = "otg";
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phys = <&u2phy0_otg>;
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phy-names = "usb2-phy";
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extcon = <&usb2phy0>;
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maximum-speed = "high-speed";
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status = "okay";
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};
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&usbdrd30 {
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status = "okay";
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};
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&vcc3v3_lcd0_n {
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gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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&wireless_bluetooth {
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compatible = "bluetooth-platdata";
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clocks = <&rk809 1>;
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clock-names = "ext_clock";
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//wifi-bt-power-toggle;
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uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default", "rts_gpio";
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pinctrl-0 = <&uart1ctsnm0>;
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pinctrl-1 = <&uart1_gpios>;
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BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
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BT,wake_gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
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BT,wake_host_irq = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&wireless_wlan {
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compatible = "wlan-platdata";
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rockchip,grf = <&grf>;
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_host_wake_irq>;
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wifi_chip_type = "ap6398s";
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WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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