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0b1e03cc77f7677a8f5d837bc150a09c1b46c605
rockchip-kernel/arch/arm64/boot/dts/rockchip/rk3399-firefly-android.dts
Sandy Huang 2f8fbe0ac7 arm64: dts: rockchip: Fixes warning in unit address of drm-logo 
/reserved-memory/drm-logo@00000000 refers to a node in the device tree.
The part after the @ symbol is the unit address, which should match the
physical or logical address of the device or memory region being
described.

The warning indicates that the unit name (in this case, 00000000) should
not have leading zeros. This is more about adhering to conventions and
ensuring compatibility and readability than about functional
correctness.

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I0e3971d091e7935eab34db03ab55bbcf6dad1fb7
2024-04-01 09:11:51 +08:00

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
#include "dt-bindings/pwm/pwm.h"
#include "rk3399.dtsi"
#include "rk3399-opp.dtsi"
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/input/input.h>
#include "rk3399-vop-clk-set.dtsi"
/ {
model = "Rockchip RK3399 Firefly Board (Android)";
compatible = "rockchip,rk3399-firefly-android", "rockchip,rk3399";
chosen: chosen {
bootargs = "earlycon=uart8250,mmio32,0xff1a0000 coherent_pool=1m";
};
cpuinfo {
compatible = "rockchip,cpuinfo";
nvmem-cells = <&cpu_id>;
nvmem-cell-names = "id";
};
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm0 0 25000 0>;
brightness-levels = <
0 1 2 3 4 5 6 7
8 9 10 11 12 13 14 15
16 17 18 19 20 21 22 23
24 25 26 27 28 29 30 31
32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255>;
default-brightness-level = <200>;
};
clkin_gmac: external-gmac-clock {
compatible = "fixed-clock";
clock-frequency = <125000000>;
clock-output-names = "clkin_gmac";
#clock-cells = <0>;
};
dw_hdmi_audio: dw-hdmi-audio {
status = "okay";
compatible = "rockchip,dw-hdmi-audio";
#sound-dai-cells = <0>;
};
edp_panel: edp-panel {
compatible = "sharp,lcd-f402", "panel-simple";
status = "okay";
backlight = <&backlight>;
power-supply = <&vcc_lcd>;
enable-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_panel_reset>;
ports {
panel_in_edp: endpoint {
remote-endpoint = <&edp_out_panel>;
};
};
};
fiq_debugger: fiq-debugger {
compatible = "rockchip,fiq-debugger";
rockchip,serial-id = <2>;
rockchip,wake-irq = <0>;
/* If enable uart uses irq instead of fiq */
rockchip,irq-mode-enable = <0>;
/* Only 115200 and 1500000 */
rockchip,baudrate = <1500000>;
pinctrl-names = "default";
pinctrl-0 = <&uart2c_xfer>;
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH 0>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
drm_logo: drm-logo@0 {
compatible = "rockchip,drm-logo";
reg = <0x0 0x0 0x0 0x0>;
};
stb_devinfo: stb-devinfo@00000000 {
compatible = "rockchip,stb-devinfo";
reg = <0x0 0x0 0x0 0x0>;
};
ramoops: ramoops@110000 {
compatible = "ramoops";
reg = <0x0 0x110000 0x0 0xf0000>;
record-size = <0x20000>;
console-size = <0x80000>;
ftrace-size = <0x00000>;
pmsg-size = <0x50000>;
};
};
rockchip-key {
compatible = "rockchip,key";
status = "okay";
io-channels = <&saradc 1>;
power-key {
gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
linux,code = <116>;
label = "power";
gpio-key,wakeup;
};
};
rt5640-sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "rockchip,rt5640-codec";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,widgets =
"Microphone", "Mic Jack",
"Headphone", "Headphone Jack";
simple-audio-card,routing =
"Mic Jack", "MICBIAS1",
"IN1P", "Mic Jack",
"Headphone Jack", "HPOL",
"Headphone Jack", "HPOR";
simple-audio-card,cpu {
sound-dai = <&i2s1>;
};
simple-audio-card,codec {
sound-dai = <&rt5640>;
};
};
hdmi_sound: hdmi-sound {
status = "disabled";
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,name = "rockchip,hdmi";
simple-audio-card,cpu {
sound-dai = <&i2s2>;
};
simple-audio-card,codec {
sound-dai = <&dw_hdmi_audio>;
};
};
hdmi_codec: hdmi-codec {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,name = "HDMI-CODEC";
simple-audio-card,cpu {
sound-dai = <&i2s2>;
};
simple-audio-card,codec {
sound-dai = <&hdmi>;
};
};
rga: rga@ff680000 {
compatible = "rockchip,rga2";
dev_mode = <1>;
reg = <0x0 0xff680000 0x0 0x1000>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA_CORE>;
clock-names = "aclk_rga", "hclk_rga", "clk_rga";
power-domains = <&power RK3399_PD_RGA>;
dma-coherent;
status = "okay";
};
spdif-sound {
compatible = "simple-audio-card";
status = "okay";
simple-audio-card,name = "ROCKCHIP,SPDIF";
simple-audio-card,mclk-fs = <128>;
simple-audio-card,cpu {
sound-dai = <&spdif>;
};
simple-audio-card,codec {
sound-dai = <&spdif_out>;
};
};
spdif_out: spdif-out {
compatible = "linux,spdif-dit";
status = "okay";
#sound-dai-cells = <0>;
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rk808 1>;
clock-names = "ext_clock";
pinctrl-names = "default";
pinctrl-0 = <&wifi_enable_h>;
/*
* On the module itself this is one of these (depending
* on the actual card populated):
* - SDIO_RESET_L_WL_REG_ON
* - PDN (power down when low)
*/
reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
};
vcc3v3_pcie: vcc3v3-pcie-regulator {
compatible = "regulator-fixed";
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_drv>;
regulator-name = "vcc3v3_pcie";
};
vcc3v3_sys: vcc3v3-sys {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vcc5v0_host: vcc5v0-host-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&host_vbus_drv>;
regulator-name = "vcc5v0_host";
regulator-always-on;
};
vcc5v0_sys: vcc5v0-sys {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
vcc_phy: vcc-phy-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_phy";
regulator-always-on;
regulator-boot-on;
};
vdd_log: vdd-log {
compatible = "pwm-regulator";
pwms = <&pwm2 0 25000 1>;
regulator-name = "vdd_log";
regulator-min-microvolt = <800000>;
/*
* the firefly hardware using 3.0 v as APIO2_VDD
* voltage, but the pwm divider resistance is designed
* based on hardware which the APIO2_VDD is 1.8v, so we
* need to change the regulator-max-microvolt from 1.4v
* to 1.0v, so the pwm can output 0.9v voltage.
*/
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-boot-on;
/* for rockchip boot on */
rockchip,pwm_id= <2>;
rockchip,pwm_voltage = <900000>;
};
vccadc_ref: vccadc-ref {
compatible = "regulator-fixed";
regulator-name = "vcc1v8_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vcc_lcd: vcc-lcd-regulator {
compatible = "regulator-fixed";
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_en>;
regulator-name = "vcc_lcd";
};
xin32k: xin32k {
compatible = "fixed-clock";
clock-frequency = <32768>;
clock-output-names = "xin32k";
#clock-cells = <0>;
};
wireless-wlan {
compatible = "wlan-platdata";
rockchip,grf = <&grf>;
wifi_chip_type = "ap6354";
sdio_vref = <1800>;
WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
status = "okay";
};
wireless-bluetooth {
compatible = "bluetooth-platdata";
//wifi-bt-power-toggle;
uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
pinctrl-names = "default", "rts_gpio";
pinctrl-0 = <&uart0_rts>;
pinctrl-1 = <&uart0_gpios>;
//BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
status = "okay";
};
};
&cpu_l0 {
cpu-supply = <&vdd_cpu_l>;
};
&cpu_l1 {
cpu-supply = <&vdd_cpu_l>;
};
&cpu_l2 {
cpu-supply = <&vdd_cpu_l>;
};
&cpu_l3 {
cpu-supply = <&vdd_cpu_l>;
};
&cpu_b0 {
cpu-supply = <&vdd_cpu_b>;
};
&cpu_b1 {
cpu-supply = <&vdd_cpu_b>;
};
&display_subsystem {
status = "okay";
ports = <&vopb_out>, <&vopl_out>;
logo-memory-region = <&drm_logo>;
route {
route_hdmi: route-hdmi {
status = "okay";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "fullscreen";
charge_logo,mode = "center";
connect = <&vopl_out_hdmi>;
};
route_edp: route-edp {
status = "okay";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "fullscreen";
charge_logo,mode = "center";
connect = <&vopb_out_edp>;
};
};
};
&edp {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&edp_hpd>;
ports {
edp_out: port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
edp_out_panel: endpoint@0 {
reg = <0>;
remote-endpoint = <&panel_in_edp>;
};
};
};
};
&emmc_phy {
status = "okay";
};
&gmac {
phy-supply = <&vcc_phy>;
phy-mode = "rgmii";
clock_in_out = "input";
snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 50000>;
assigned-clocks = <&cru SCLK_RMII_SRC>;
assigned-clock-parents = <&clkin_gmac>;
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
tx_delay = <0x28>;
rx_delay = <0x11>;
status = "okay";
};
&gpu {
status = "okay";
mali-supply = <&vdd_gpu>;
};
&hdmi {
#address-cells = <1>;
#size-cells = <0>;
#sound-dai-cells = <0>;
status = "okay";
};
&i2c0 {
status = "okay";
i2c-scl-rising-time-ns = <168>;
i2c-scl-falling-time-ns = <4>;
clock-frequency = <400000>;
vdd_cpu_b: syr827@40 {
compatible = "silergy,syr827";
reg = <0x40>;
vin-supply = <&vcc5v0_sys>;
regulator-compatible = "fan53555-reg";
regulator-name = "vdd_cpu_b";
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1500000>;
regulator-ramp-delay = <1000>;
vsel-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
fcs,suspend-voltage-selector = <1>;
regulator-always-on;
regulator-boot-on;
regulator-initial-state = <3>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_gpu: syr828@41 {
compatible = "silergy,syr828";
reg = <0x41>;
vin-supply = <&vcc5v0_sys>;
regulator-compatible = "fan53555-reg";
regulator-name = "vdd_gpu";
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1500000>;
regulator-ramp-delay = <1000>;
fcs,suspend-voltage-selector = <1>;
regulator-always-on;
regulator-boot-on;
regulator-initial-state = <3>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
rk808: pmic@1b {
compatible = "rockchip,rk808";
reg = <0x1b>;
interrupt-parent = <&gpio1>;
interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
rockchip,system-power-controller;
wakeup-source;
#clock-cells = <1>;
clock-output-names = "rk808-clkout1", "rk808-clkout2";
vcc1-supply = <&vcc3v3_sys>;
vcc2-supply = <&vcc3v3_sys>;
vcc3-supply = <&vcc3v3_sys>;
vcc4-supply = <&vcc3v3_sys>;
vcc6-supply = <&vcc3v3_sys>;
vcc7-supply = <&vcc3v3_sys>;
vcc8-supply = <&vcc3v3_sys>;
vcc9-supply = <&vcc3v3_sys>;
vcc10-supply = <&vcc3v3_sys>;
vcc11-supply = <&vcc3v3_sys>;
vcc12-supply = <&vcc3v3_sys>;
vddio-supply = <&vcc1v8_pmu>;
regulators {
vdd_center: DCDC_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-name = "vdd_center";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_cpu_l: DCDC_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-name = "vdd_cpu_l";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_ddr: DCDC_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc_ddr";
regulator-state-mem {
regulator-on-in-suspend;
};
};
vcc_1v8: DCDC_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc_1v8";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vcc1v8_dvp: LDO_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc1v8_dvp";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v0_tp: LDO_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcc3v0_tp";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc1v8_pmu: LDO_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc1v8_pmu";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vcc_sd: LDO_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcc_sd";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3000000>;
};
};
vcca3v0_codec: LDO_REG5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcca3v0_codec";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v5: LDO_REG6 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-name = "vcc_1v5";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1500000>;
};
};
vcca1v8_codec: LDO_REG7 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcca1v8_codec";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_3v0: LDO_REG8 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcc_3v0";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3000000>;
};
};
vcc3v3_s3: SWITCH_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc3v3_s3";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_s0: SWITCH_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc3v3_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
};
};
&i2c1 {
status = "okay";
i2c-scl-rising-time-ns = <300>;
i2c-scl-falling-time-ns = <15>;
rt5640: rt5640@1c {
#sound-dai-cells = <0>;
compatible = "realtek,rt5640";
reg = <0x1c>;
clocks = <&cru SCLK_I2S_8CH_OUT>;
clock-names = "mclk";
realtek,in1-differential;
pinctrl-names = "default";
pinctrl-0 = <&rt5640_hpcon &i2s_8ch_mclk>;
hp-con-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
//hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
io-channels = <&saradc 4>;
hp-det-adc-value = <500>;
status = "okay";
};
};
&i2c3 {
status = "okay";
i2c-scl-rising-time-ns = <450>;
i2c-scl-falling-time-ns = <15>;
};
&i2c4 {
status = "okay";
i2c-scl-rising-time-ns = <600>;
i2c-scl-falling-time-ns = <20>;
fusb0: fusb30x@22 {
compatible = "fairchild,fusb302";
reg = <0x22>;
pinctrl-names = "default";
pinctrl-0 = <&fusb0_int>;
int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
vbus-5v-gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
status = "okay";
};
gsl3680: gsl3680@41 {
compatible = "gslX680-pad";
reg = <0x41>;
screen_max_x = <1536>;
screen_max_y = <2048>;
touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
reset-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
status = "okay";
};
mpu6050: mpu@68 {
compatible = "invensense,mpu6050";
reg = <0x68>;
mpu-int_config = <0x10>;
mpu-level_shifter = <0>;
mpu-orientation = <0 1 0 1 0 0 0 0 1>;
orientation-x= <1>;
orientation-y= <1>;
orientation-z= <1>;
irq-gpio = <&gpio1 4 IRQ_TYPE_LEVEL_LOW>;
mpu-debug = <1>;
status = "okay";
};
};
&i2s0 {
status = "okay";
rockchip,i2s-broken-burst-len;
rockchip,playback-channels = <8>;
rockchip,capture-channels = <8>;
#sound-dai-cells = <0>;
};
&i2s1 {
status = "okay";
rockchip,i2s-broken-burst-len;
rockchip,playback-channels = <2>;
rockchip,capture-channels = <2>;
#sound-dai-cells = <0>;
};
&i2s2 {
#sound-dai-cells = <0>;
status = "okay";
};
&io_domains {
status = "okay";
bt656-supply = <&vcc1v8_dvp>; /* bt656_gpio2ab_ms */
audio-supply = <&vcca1v8_codec>; /* audio_gpio3d4a_ms */
sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
};
&pcie_phy {
status = "okay";
};
&pcie0 {
ep-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
num-lanes = <4>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_clkreqn_cpm>;
status = "okay";
};
&pmu_io_domains {
status = "okay";
pmu1830-supply = <&vcc_3v0>;
};
&pinctrl {
lcd-panel {
lcd_panel_reset: lcd-panel-reset {
rockchip,pins = <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
};
lcd_en: lcd-en {
rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
pcie {
pcie_drv: pcie-drv {
rockchip,pins =
<1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie_3g_drv: pcie-3g-drv {
rockchip,pins =
<0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
pmic {
vsel1_gpio: vsel1-gpio {
rockchip,pins =
<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
};
vsel2_gpio: vsel2-gpio {
rockchip,pins =
<1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
sdio-pwrseq {
wifi_enable_h: wifi-enable-h {
rockchip,pins =
<0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wireless-bluetooth {
uart0_gpios: uart0-gpios {
rockchip,pins =
<2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
rt5640 {
rt5640_hpcon: rt5640-hpcon {
rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins =
<1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
};
pmic_dvs2: pmic-dvs2 {
rockchip,pins =
<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
usb2 {
host_vbus_drv: host-vbus-drv {
rockchip,pins =
<4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
fusb30x {
fusb0_int: fusb0-int {
rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
&pwm0 {
status = "okay";
};
&pwm2 {
status = "okay";
pinctrl-names = "active";
pinctrl-0 = <&pwm2_pin_pull_down>;
};
&rockchip_suspend {
rockchip,power-ctrl =
<&gpio1 18 GPIO_ACTIVE_LOW>,
<&gpio1 14 GPIO_ACTIVE_HIGH>;
};
&saradc {
status = "okay";
vref-supply = <&vccadc_ref>;
};
&sdhci {
bus-width = <8>;
keep-power-in-suspend;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
non-removable;
status = "okay";
no-sdio;
no-sd;
};
&sdmmc {
max-frequency = <150000000>;
no-sdio;
no-mmc;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
num-slots = <1>;
vqmmc-supply = <&vcc_sd>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
status = "okay";
};
&sdio0 {
max-frequency = <50000000>;
no-sd;
no-mmc;
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
sd-uhs-sdr104;
status = "okay";
};
&spdif {
status = "okay";
pinctrl-0 = <&spdif_bus_1>;
i2c-scl-rising-time-ns = <450>;
i2c-scl-falling-time-ns = <15>;
#sound-dai-cells = <0>;
};
&tcphy0 {
extcon = <&fusb0>;
status = "okay";
};
&tcphy1 {
status = "okay";
};
&tsadc {
/* tshut mode 0:CRU 1:GPIO */
rockchip,hw-tshut-mode = <1>;
/* tshut polarity 0:LOW 1:HIGH */
rockchip,hw-tshut-polarity = <1>;
status = "okay";
};
&u2phy0 {
status = "okay";
extcon = <&fusb0>;
u2phy0_otg: otg-port {
status = "okay";
};
u2phy0_host: host-port {
phy-supply = <&vcc5v0_host>;
status = "okay";
};
};
&u2phy1 {
status = "okay";
u2phy1_otg: otg-port {
status = "okay";
};
u2phy1_host: host-port {
phy-supply = <&vcc5v0_host>;
status = "okay";
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_xfer &uart0_cts>;
status = "okay";
};
&uart2 {
status = "okay";
};
&usbdrd3_0 {
status = "okay";
};
&usbdrd3_1 {
status = "okay";
};
&usbdrd_dwc3_0 {
status = "okay";
extcon = <&fusb0>;
};
&usbdrd_dwc3_1 {
status = "okay";
dr_mode = "host";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&usb_host1_ehci {
status = "okay";
};
&usb_host1_ohci {
status = "okay";
};
&vopb {
status = "okay";
};
&vopb_mmu {
status = "okay";
};
&vopl {
status = "okay";
};
&vopl_mmu {
status = "okay";
};
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