Commit Graph

6 Commits

Author SHA1 Message Date
Wyon Bi
0573096c0e drm/rockchip: rk618: Add support for dsi
Change-Id: I14e43f6edccf62392ac6a005ce12cf0961583573
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-11-29 10:17:32 +08:00
Wyon Bi
755c427fda drm/rockchip: rk618: Add support for hdmi
Change-Id: I009e39d4d81e3e0c3f3937ea830f170f08272e21
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-11-27 17:44:37 +08:00
Wyon Bi
0b5d5eafb1 drm/rockchip: rk618: refactor display pipeline
It's hard to do platform specific initialization in the current pipeline.
This patch convert to generic bridge interface and let it attach to
a platform specific encoder.

   CRTC    -->  Encoder  --> Bridge --> Connector --> Panel
(platform)

This patch changed the pipeline to:

   CRTC    -->  Encoder  --> Bridge --> Connector --> Panel
(platform)     (platform)

Change-Id: I43e0dab05e41965767f55cfe15b3674a71911312
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-11-27 17:44:31 +08:00
Shunqing Chen
4752f415e0 drm/rockchip: add RGB support for rk618
Change-Id: Ieddeeb842ee9db11b8c56cb4171bd630b6b63acb
Signed-off-by: Shunqing Chen <csq@rock-chips.com>
2018-09-14 18:20:28 +08:00
Wyon Bi
714abae67e drm/rockchip: rk618: vif: Convert to drm_bridge
Change-Id: I124bfabf7fe67854f55aef5fec0cad00cd5e2eac
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-01-11 16:52:00 +08:00
Wyon Bi
6d51582d57 drm/rockchip: add support for rk618
RK618 provides a complete set of display interface to support
very flexible applications as follows:
- 2 RGB display input interface with double data rate
- 1 LVDS display output interface with double channels
- 1 MIPI display output interface with 4 data lanes
- 1 HDMI display output interface
- 1 RGB display output interface shared with LVDS
- 1 RGB display output interface shared with RGB display input interface

VIF is used to LCDC SDR/DDR timing reconstruction.

SCALER is a synchronous parallel RGB frame converter for different
resolution. It is used to realize dual display function from
one display source. It can be used like VIF for LCDC SDR timing
reconstruction only.

DITHER is used for converting 24bit RGB888 to 18bit RGB666 with FRC
dither down.

Change-Id: I5b25e64c283bd84f85d7d7686bee6d940df44910
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2017-12-21 10:32:02 +08:00