Update all 64bit rockchip devicetree files to use SPDX-License-Identifiers.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: Ie983cca0d54cae8b5ad6d322d51eb7bbd265aa0a
supports-* stuff were used for rockchip platforms to speed up booting
if we know what exactly the host was used for. As we have upstreamed all
these with some very similar ways, now it's the time we migrate our dts
files to use new properties.
They were converted by:
sed -i "s/supports-emmc;/no-sdio;\n\tno-sd;/g" `grep supports-emmc -rl arch/*`
sed -i "s/supports-sd;/no-sdio;\n\tno-mmc;/g" `grep supports-sd -rl arch/*`
sed -i "s/supports-sdio;/no-sd;\n\tno-mmc;/g" `grep supports-sdio -rl arch/*`
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I33e5317ee5c7305803cf18ff4a370658abf555b0
In kernel 4.4, we use the extcon notification function in dwc3-rockchip.c
to perform the drd mode switch. Kernel 4.19 implements the same
functionality in drd.c and writes the extcon notification function in
core.c. So we need to move extcon to the subnode of dwc3.
Besides, I deleted some useless code which is wrongly copied.
Change-Id: I1096e64d5a29f01c94a10027b846676033c7985d
Signed-off-by: Jianing Ren <jianing.ren@rock-chips.com>
- Split DT source files to separate out android firmware specific DT
bindings
- Add an alias for firmware_android in rk3399-android.dtsi
Change-Id: If3ae952c61ff01903ea990c6430255af27f5a432
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
to cope with Wide Temperature Range test, we maxamize
soc's sw/hw over temperature power off degree.
fow now, 115 degree Celsius is set to trigger sw powering off.
if sw function does not work and temperature is continuing to
grow up, and till 120 degree Celsius, hw powering off/reset
is triggered.
Change-Id: I751e9ea754f434bc20df39fdbdb40216a1582c39
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
As a second global reset, the GRF is not reset, the iomux and
pull of PWM pin is still keeping, but PWM controller is reset,
PWM pin goes into input mode. However, the pull is still none
changed in kernel, which can cause voltage problems, so should
always keep the PWM pin pull down mode, with 0~50 μA power
increase.
Change-Id: Ibbb9465f7c550d49d416bc3438c5199434df6eba
Signed-off-by: David Wu <david.wu@rock-chips.com>
The vcc_sd is used for IO voltage for sdmmc interface on rk3399
platform have a limitation that it can't be larger than 3.0v, otherwise
it has a potential risk for the chip. Correct all of them.
Change-Id: I8d4ee2202fb32d30734c98a3b514c315e62859b4
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
invert the pwm polarity for new pwm interface
Change-Id: I8dfde14fbc4fd4aa907722f260ce72fdb4d7d3bb
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
default enable rkvdec and vpu.
rga is default on, remove duplicate configuration.
Change-Id: I8375b2202a81977238e8120e1c2d60f2130844b5
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
The md5sum is identical after rename, so this commit is safe.
Change-Id: I97cb5faecebaad9d2e9c39f67f19f662642cc5e8
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Except dts of VR.
The md5sum is identical after rename, so this commit is safe.
Change-Id: I9ec324355ae67bbe2bb626090402ae797de13d92
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
freq-sel, dr-sel and opdelay are obsolete now, so we
should remove them from the DT files to prevent the
spread of unused code.
Change-Id: Ibfa4fa225231a004913aa31aac475eb252e329c6
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
One basic condition of usb remote wakeup is vbus on, so we add
regulator-always-on property for vcc5v0_host regulator in this adds.
In the previous codes, ehci/ohci-platform did not power off
vcc5v0_host regulator due to some oddish codes, and we have fixed it
at commit b5a0a9e8794d.
Change-Id: I95c225c9c3aeec6e346d62e61fdcde5e5e02d143
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Afer the "PM / AVS: rockchip-io: make io-domains a child of the GRF",
the pmu-io-domains should be a sub-node of the pmugrf simple-mfd.
Change-Id: Iebfe9041a604580ce3e5b028d7a143fcdbbdff25
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Afer the "PM / AVS: rockchip-io: make io-domains a child of the GRF",
the io-domains should be a sub-node of the grf simple-mfd.
Change-Id: Ic2a40726bccee8b795b5249e07f2537fd30b3f7b
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Add a new dtsi file - rk3399-opp.dtsi, to configure opp-tables
for cpu, gpu and dmc.
Add rk3399-early-opp.dtsi for board with ES1, which need limit
frequency for cpu, gpu and dmc.
Change-Id: Ib57761fd5f405b0e79039d7a01e6e023d6f5dc2c
Reviewed-by: Finley Xiao <finley.xiao@rock-chips.com>
Reviewed-by: Huang, Tao <huangtao@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
We may miss clock-latency-ns when disable some opps, then cpufreq
will fallback to performance governor, so add clock-latency-ns for
each opp to make disable opp easy.
code as below:
drivers/cpufreq/cpufreq.c:2010
if (policy->governor->max_transition_latency &&
policy->cpuinfo.transition_latency >
policy->governor->max_transition_latency) {
if (!gov)
return -EINVAL;
else {
pr_warn("%s governor failed, too long transition latency of HW,
fallback to %s governor\n",
policy->governor->name, gov->name);
policy->governor = gov;
}
}
Change-Id: I93cff667deb487baa0115b7af0206f0803010d37
Signed-off-by: Chen Liang <cl@rock-chips.com>
Since the commit a2be4bc ('FIXUP: UPSTREAM: phy: Add USB
Type-C PHY driver for rk3399') has created 2 PHY devices
separately for tcphy USB3 and DisplyPort, and registered
them under the child node, we should also add the USB3
and DP child nodes to dts.
Change-Id: Iffe5dc961dc96b2b41476b1db2949e95c275e19f
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
used to calculate the delay time for change dcdc voltage.
Change-Id: I6bb462ef087b9ce6aa98991a1b961ed5f57bb3c8
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Practice shows :
The sd cards are easier to be identified after increase delay
Change-Id: I48912e2d184902fab8b27edba70281f0bf19b9ab
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
rk3399-box Type-C0 USB needs to support peripheral mode
and host mode, so we set dr_mode as otg.
Change-Id: If94cdca3ec1d018c3f9aad14bb2c1e15e10e9c51
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Some phys would not enter low power mode by writing 'power down'
bit into phy common register0 such as RTL8211E. And pulling down
reset gpio is also a common way to make phy get low consumption,
if the supplied regulator of phy could not be disabled at suspend.
Change-Id: Ib01f48ec8c0bdec633868bb79e4155561ca6c471
Signed-off-by: David Wu <david.wu@rock-chips.com>
There is an USB3 Standard-A receptacle on the rk3399 box platform
with Type-C1 phy, this patch enalbe Type-C1 phy for the USB3 port.
Change-Id: I77074823e713b8a4c5e4ff693746d1bd2c3c139c
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
The host can issue continuous clock in the frequency range
of 100KHz-400KHz for card identification mode.
Change-Id: I4e6a96a5ec49ee102a3b24c3f7f9b74d6bc8fd5f
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
