ARM: dts: rockchip: add flexbus cif for rk3506 evb1

Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I43fbf4beeb184e3fc3093f6e113cca551479e776
This commit is contained in:
Zefa Chen
2024-07-05 11:54:40 +08:00
committed by Tao Huang
parent 565a719e03
commit ea58eb40b7

View File

@@ -0,0 +1,60 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
*
*/
&flexbus {
rockchip,flexbus0-opmode = <ROCKCHIP_FLEXBUS0_OPMODE_DAC>;
rockchip,flexbus1-opmode = <ROCKCHIP_FLEXBUS1_OPMODE_CIF>;
status = "okay";
};
&i2c2 {
status = "okay";
gc2145@3c {
status = "okay";
compatible = "galaxycore,gc2145";
reg = <0x3c>;
clocks = <&cru CLK_REF_OUT1>;
clock-names = "xvclk";
power-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_HIGH>;
pwdn-gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&ref_clk1_pins>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "CameraKing";
rockchip,camera-module-lens-name = "Largan";
port {
gc2145_out: endpoint {
remote-endpoint = <&cif_in_cam>;
vsync-active = <0>;
hsync-active = <1>;
pclk-sample = <1>;
bus-width = <8>;
};
};
};
};
&flexbus_cif {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&flexbus1_d1_pins &flexbus1_d2_pins &flexbus1_d3_pins &flexbus1_d4_pins
&flexbus1_d5_pins &flexbus1_d6_pins &flexbus1_d7_pins &flexbus1_d8_pins
&flexbus1_d12_pins &flexbus1_d13_pins &flexbus1_clk_pins>;
ports {
port@0 {
cif_in_cam: endpoint@0 {
remote-endpoint = <&gc2145_out>;
vsync-active = <0>;
hsync-active = <1>;
};
};
};
};