diff --git a/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
index 2e47aa3e7270..ba63be1ff846 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
@@ -161,7 +161,7 @@
 		vcc10-supply = <&vcc_sys>;
 		vcc11-supply = <&vcc_sys>;
 		vcc12-supply = <&vcc_io>;
-		clock-output-names = "rk808-clkout1", "rk808-clkout2";
+		clock-output-names = "xin32k", "rk808-clkout2";
 		#clock-cells = <1>;
 
 		regulators {
diff --git a/arch/arm64/boot/dts/rockchip/rk3368-p9.dts b/arch/arm64/boot/dts/rockchip/rk3368-p9.dts
index f194a8106304..a8f95117f029 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-p9.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3368-p9.dts
@@ -311,7 +311,7 @@
 		compatible = "rockchip,rk818";
 		status = "okay";
 		reg = <0x1c>;
-		clock-output-names = "rk808-clkout1", "wifibt_32kin";
+		clock-output-names = "xin32k", "wifibt_32kin";
 		interrupt-parent = <&gpio0>;
 		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
 		pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/rockchip/rk3368-sheep.dts b/arch/arm64/boot/dts/rockchip/rk3368-sheep.dts
index a65d2e92607a..6318382aea0d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-sheep.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3368-sheep.dts
@@ -235,7 +235,7 @@
 		reg = <0x1c>;
 		status = "okay";
 
-		clock-output-names = "rk808-clkout1", "wifibt_32kin";
+		clock-output-names = "xin32k", "wifibt_32kin";
 		interrupt-parent = <&gpio0>;
 		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
 		pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 28f3300cfed7..aa175a0d1519 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -473,13 +473,6 @@
 		#clock-cells = <0>;
 	};
 
-	xin32k: xin32k {
-		compatible = "fixed-clock";
-		clock-frequency = <32768>;
-		clock-output-names = "xin32k";
-		#clock-cells = <0>;
-	};
-
 	sdmmc: dwmmc@ff0c0000 {
 		compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xff0c0000 0x0 0x4000>;