From bcf0549c76a07e87eeca7f0da598b1afa7c9698c Mon Sep 17 00:00:00 2001 From: Algea Cao Date: Wed, 21 May 2025 11:48:40 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3588: Adjust the HDMITX1 DDC M0 IO driver strength The maximum drive strength level of vccio3 is 3, so the drive strength level configuration of DDC SCL is 3. Fixes: 3690970c8126 ("arm64: dts: rockchip: rk3588: Adjust the HDMI DDC IO driver strength") Change-Id: I72ed9dd669d2ef7e7fe406977d8c42e226323c99 Signed-off-by: Algea Cao --- arch/arm64/boot/dts/rockchip/rk3588-vccio3-pinctrl.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-vccio3-pinctrl.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-vccio3-pinctrl.dtsi index d1a1f2662134..137f65659038 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-vccio3-pinctrl.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-vccio3-pinctrl.dtsi @@ -160,14 +160,14 @@ hdmim0_tx1_scl: hdmim0-tx1-scl { rockchip,pins = /* hdmim0_tx1_scl */ - <2 RK_PB5 4 &pcfg_pull_none>; + <2 RK_PB5 4 &pcfg_pull_none_drv_level_3_smt>; }; /omit-if-no-ref/ hdmim0_tx1_sda: hdmim0-tx1-sda { rockchip,pins = /* hdmim0_tx1_sda */ - <2 RK_PB4 4 &pcfg_pull_none>; + <2 RK_PB4 4 &pcfg_pull_none_drv_level_1_smt>; }; };