Merge tag 'gpio-v4.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO fixes from Linus Walleij: - LP87565: set the proper output level for direction_output. - stm32: fix the kernel build by selecting the hierarchical irqdomain symbol properly - this happens to be done in the pin control framework but whatever, it had dependencies to GPIO so we need to apply it here. - Select the hierarchical IRQ domain also for Xgene. - Fix wakeups to work on MXC. - Fix up the device tree binding on Exar that went astray, also add the right bindings. - Fix the unwanted events for edges from the library. - Fix the unbalanced chanined IRQ on the Tegra. * tag 'gpio-v4.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: gpio: tegra: fix unbalanced chained_irq_enter/exit gpiolib: skip unwanted events, don't convert them to opposite edge gpio: exar: Use correct property prefix and document bindings gpio: gpio-mxc: Fix: higher 16 GPIOs usable as wake source gpio: xgene-sb: select IRQ_DOMAIN_HIERARCHY pinctrl: stm32: select IRQ_DOMAIN_HIERARCHY instead of depends on gpio: lp87565: Set proper output level and direction for direction_output MAINTAINERS: Add entry for Whiskey Cove PMIC GPIO driver
This commit is contained in:
5
Documentation/devicetree/bindings/gpio/gpio-exar.txt
Normal file
5
Documentation/devicetree/bindings/gpio/gpio-exar.txt
Normal file
@@ -0,0 +1,5 @@
|
|||||||
|
Exportable MPIO interface of Exar UART chips
|
||||||
|
|
||||||
|
Required properties of the device:
|
||||||
|
- exar,first-pin: first exportable pins (0..15)
|
||||||
|
- ngpios: number of exportable pins (1..16)
|
||||||
@@ -14218,6 +14218,12 @@ F: drivers/watchdog/
|
|||||||
F: include/linux/watchdog.h
|
F: include/linux/watchdog.h
|
||||||
F: include/uapi/linux/watchdog.h
|
F: include/uapi/linux/watchdog.h
|
||||||
|
|
||||||
|
WHISKEYCOVE PMIC GPIO DRIVER
|
||||||
|
M: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
|
||||||
|
L: linux-gpio@vger.kernel.org
|
||||||
|
S: Maintained
|
||||||
|
F: drivers/gpio/gpio-wcove.c
|
||||||
|
|
||||||
WIIMOTE HID DRIVER
|
WIIMOTE HID DRIVER
|
||||||
M: David Herrmann <dh.herrmann@googlemail.com>
|
M: David Herrmann <dh.herrmann@googlemail.com>
|
||||||
L: linux-input@vger.kernel.org
|
L: linux-input@vger.kernel.org
|
||||||
|
|||||||
@@ -504,6 +504,7 @@ config GPIO_XGENE_SB
|
|||||||
depends on ARCH_XGENE && OF_GPIO
|
depends on ARCH_XGENE && OF_GPIO
|
||||||
select GPIO_GENERIC
|
select GPIO_GENERIC
|
||||||
select GPIOLIB_IRQCHIP
|
select GPIOLIB_IRQCHIP
|
||||||
|
select IRQ_DOMAIN_HIERARCHY
|
||||||
help
|
help
|
||||||
This driver supports the GPIO block within the APM X-Gene
|
This driver supports the GPIO block within the APM X-Gene
|
||||||
Standby Domain. Say yes here to enable the GPIO functionality.
|
Standby Domain. Say yes here to enable the GPIO functionality.
|
||||||
|
|||||||
@@ -132,7 +132,7 @@ static int gpio_exar_probe(struct platform_device *pdev)
|
|||||||
if (!p)
|
if (!p)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
ret = device_property_read_u32(&pdev->dev, "linux,first-pin",
|
ret = device_property_read_u32(&pdev->dev, "exar,first-pin",
|
||||||
&first_pin);
|
&first_pin);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|||||||
@@ -26,6 +26,27 @@ struct lp87565_gpio {
|
|||||||
struct regmap *map;
|
struct regmap *map;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
static int lp87565_gpio_get(struct gpio_chip *chip, unsigned int offset)
|
||||||
|
{
|
||||||
|
struct lp87565_gpio *gpio = gpiochip_get_data(chip);
|
||||||
|
int ret, val;
|
||||||
|
|
||||||
|
ret = regmap_read(gpio->map, LP87565_REG_GPIO_IN, &val);
|
||||||
|
if (ret < 0)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
return !!(val & BIT(offset));
|
||||||
|
}
|
||||||
|
|
||||||
|
static void lp87565_gpio_set(struct gpio_chip *chip, unsigned int offset,
|
||||||
|
int value)
|
||||||
|
{
|
||||||
|
struct lp87565_gpio *gpio = gpiochip_get_data(chip);
|
||||||
|
|
||||||
|
regmap_update_bits(gpio->map, LP87565_REG_GPIO_OUT,
|
||||||
|
BIT(offset), value ? BIT(offset) : 0);
|
||||||
|
}
|
||||||
|
|
||||||
static int lp87565_gpio_get_direction(struct gpio_chip *chip,
|
static int lp87565_gpio_get_direction(struct gpio_chip *chip,
|
||||||
unsigned int offset)
|
unsigned int offset)
|
||||||
{
|
{
|
||||||
@@ -54,30 +75,11 @@ static int lp87565_gpio_direction_output(struct gpio_chip *chip,
|
|||||||
{
|
{
|
||||||
struct lp87565_gpio *gpio = gpiochip_get_data(chip);
|
struct lp87565_gpio *gpio = gpiochip_get_data(chip);
|
||||||
|
|
||||||
|
lp87565_gpio_set(chip, offset, value);
|
||||||
|
|
||||||
return regmap_update_bits(gpio->map,
|
return regmap_update_bits(gpio->map,
|
||||||
LP87565_REG_GPIO_CONFIG,
|
LP87565_REG_GPIO_CONFIG,
|
||||||
BIT(offset), !value ? BIT(offset) : 0);
|
BIT(offset), BIT(offset));
|
||||||
}
|
|
||||||
|
|
||||||
static int lp87565_gpio_get(struct gpio_chip *chip, unsigned int offset)
|
|
||||||
{
|
|
||||||
struct lp87565_gpio *gpio = gpiochip_get_data(chip);
|
|
||||||
int ret, val;
|
|
||||||
|
|
||||||
ret = regmap_read(gpio->map, LP87565_REG_GPIO_IN, &val);
|
|
||||||
if (ret < 0)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
return !!(val & BIT(offset));
|
|
||||||
}
|
|
||||||
|
|
||||||
static void lp87565_gpio_set(struct gpio_chip *chip, unsigned int offset,
|
|
||||||
int value)
|
|
||||||
{
|
|
||||||
struct lp87565_gpio *gpio = gpiochip_get_data(chip);
|
|
||||||
|
|
||||||
regmap_update_bits(gpio->map, LP87565_REG_GPIO_OUT,
|
|
||||||
BIT(offset), value ? BIT(offset) : 0);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static int lp87565_gpio_request(struct gpio_chip *gc, unsigned int offset)
|
static int lp87565_gpio_request(struct gpio_chip *gc, unsigned int offset)
|
||||||
|
|||||||
@@ -424,6 +424,9 @@ static int mxc_gpio_probe(struct platform_device *pdev)
|
|||||||
return PTR_ERR(port->base);
|
return PTR_ERR(port->base);
|
||||||
|
|
||||||
port->irq_high = platform_get_irq(pdev, 1);
|
port->irq_high = platform_get_irq(pdev, 1);
|
||||||
|
if (port->irq_high < 0)
|
||||||
|
port->irq_high = 0;
|
||||||
|
|
||||||
port->irq = platform_get_irq(pdev, 0);
|
port->irq = platform_get_irq(pdev, 0);
|
||||||
if (port->irq < 0)
|
if (port->irq < 0)
|
||||||
return port->irq;
|
return port->irq;
|
||||||
|
|||||||
@@ -360,7 +360,7 @@ static void tegra_gpio_irq_handler(struct irq_desc *desc)
|
|||||||
{
|
{
|
||||||
int port;
|
int port;
|
||||||
int pin;
|
int pin;
|
||||||
int unmasked = 0;
|
bool unmasked = false;
|
||||||
int gpio;
|
int gpio;
|
||||||
u32 lvl;
|
u32 lvl;
|
||||||
unsigned long sta;
|
unsigned long sta;
|
||||||
@@ -384,8 +384,8 @@ static void tegra_gpio_irq_handler(struct irq_desc *desc)
|
|||||||
* before executing the handler so that we don't
|
* before executing the handler so that we don't
|
||||||
* miss edges
|
* miss edges
|
||||||
*/
|
*/
|
||||||
if (lvl & (0x100 << pin)) {
|
if (!unmasked && lvl & (0x100 << pin)) {
|
||||||
unmasked = 1;
|
unmasked = true;
|
||||||
chained_irq_exit(chip, desc);
|
chained_irq_exit(chip, desc);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -704,24 +704,23 @@ static irqreturn_t lineevent_irq_thread(int irq, void *p)
|
|||||||
{
|
{
|
||||||
struct lineevent_state *le = p;
|
struct lineevent_state *le = p;
|
||||||
struct gpioevent_data ge;
|
struct gpioevent_data ge;
|
||||||
int ret;
|
int ret, level;
|
||||||
|
|
||||||
ge.timestamp = ktime_get_real_ns();
|
ge.timestamp = ktime_get_real_ns();
|
||||||
|
level = gpiod_get_value_cansleep(le->desc);
|
||||||
|
|
||||||
if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE
|
if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE
|
||||||
&& le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) {
|
&& le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) {
|
||||||
int level = gpiod_get_value_cansleep(le->desc);
|
|
||||||
|
|
||||||
if (level)
|
if (level)
|
||||||
/* Emit low-to-high event */
|
/* Emit low-to-high event */
|
||||||
ge.id = GPIOEVENT_EVENT_RISING_EDGE;
|
ge.id = GPIOEVENT_EVENT_RISING_EDGE;
|
||||||
else
|
else
|
||||||
/* Emit high-to-low event */
|
/* Emit high-to-low event */
|
||||||
ge.id = GPIOEVENT_EVENT_FALLING_EDGE;
|
ge.id = GPIOEVENT_EVENT_FALLING_EDGE;
|
||||||
} else if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE) {
|
} else if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE && level) {
|
||||||
/* Emit low-to-high event */
|
/* Emit low-to-high event */
|
||||||
ge.id = GPIOEVENT_EVENT_RISING_EDGE;
|
ge.id = GPIOEVENT_EVENT_RISING_EDGE;
|
||||||
} else if (le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) {
|
} else if (le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE && !level) {
|
||||||
/* Emit high-to-low event */
|
/* Emit high-to-low event */
|
||||||
ge.id = GPIOEVENT_EVENT_FALLING_EDGE;
|
ge.id = GPIOEVENT_EVENT_FALLING_EDGE;
|
||||||
} else {
|
} else {
|
||||||
|
|||||||
@@ -6,29 +6,30 @@ config PINCTRL_STM32
|
|||||||
select PINMUX
|
select PINMUX
|
||||||
select GENERIC_PINCONF
|
select GENERIC_PINCONF
|
||||||
select GPIOLIB
|
select GPIOLIB
|
||||||
|
select IRQ_DOMAIN_HIERARCHY
|
||||||
select MFD_SYSCON
|
select MFD_SYSCON
|
||||||
|
|
||||||
config PINCTRL_STM32F429
|
config PINCTRL_STM32F429
|
||||||
bool "STMicroelectronics STM32F429 pin control" if COMPILE_TEST && !MACH_STM32F429
|
bool "STMicroelectronics STM32F429 pin control" if COMPILE_TEST && !MACH_STM32F429
|
||||||
depends on OF && IRQ_DOMAIN_HIERARCHY
|
depends on OF
|
||||||
default MACH_STM32F429
|
default MACH_STM32F429
|
||||||
select PINCTRL_STM32
|
select PINCTRL_STM32
|
||||||
|
|
||||||
config PINCTRL_STM32F469
|
config PINCTRL_STM32F469
|
||||||
bool "STMicroelectronics STM32F469 pin control" if COMPILE_TEST && !MACH_STM32F469
|
bool "STMicroelectronics STM32F469 pin control" if COMPILE_TEST && !MACH_STM32F469
|
||||||
depends on OF && IRQ_DOMAIN_HIERARCHY
|
depends on OF
|
||||||
default MACH_STM32F469
|
default MACH_STM32F469
|
||||||
select PINCTRL_STM32
|
select PINCTRL_STM32
|
||||||
|
|
||||||
config PINCTRL_STM32F746
|
config PINCTRL_STM32F746
|
||||||
bool "STMicroelectronics STM32F746 pin control" if COMPILE_TEST && !MACH_STM32F746
|
bool "STMicroelectronics STM32F746 pin control" if COMPILE_TEST && !MACH_STM32F746
|
||||||
depends on OF && IRQ_DOMAIN_HIERARCHY
|
depends on OF
|
||||||
default MACH_STM32F746
|
default MACH_STM32F746
|
||||||
select PINCTRL_STM32
|
select PINCTRL_STM32
|
||||||
|
|
||||||
config PINCTRL_STM32H743
|
config PINCTRL_STM32H743
|
||||||
bool "STMicroelectronics STM32H743 pin control" if COMPILE_TEST && !MACH_STM32H743
|
bool "STMicroelectronics STM32H743 pin control" if COMPILE_TEST && !MACH_STM32H743
|
||||||
depends on OF && IRQ_DOMAIN_HIERARCHY
|
depends on OF
|
||||||
default MACH_STM32H743
|
default MACH_STM32H743
|
||||||
select PINCTRL_STM32
|
select PINCTRL_STM32
|
||||||
endif
|
endif
|
||||||
|
|||||||
@@ -261,7 +261,7 @@ __xr17v35x_register_gpio(struct pci_dev *pcidev,
|
|||||||
}
|
}
|
||||||
|
|
||||||
static const struct property_entry exar_gpio_properties[] = {
|
static const struct property_entry exar_gpio_properties[] = {
|
||||||
PROPERTY_ENTRY_U32("linux,first-pin", 0),
|
PROPERTY_ENTRY_U32("exar,first-pin", 0),
|
||||||
PROPERTY_ENTRY_U32("ngpios", 16),
|
PROPERTY_ENTRY_U32("ngpios", 16),
|
||||||
{ }
|
{ }
|
||||||
};
|
};
|
||||||
@@ -326,7 +326,7 @@ static int iot2040_rs485_config(struct uart_port *port,
|
|||||||
}
|
}
|
||||||
|
|
||||||
static const struct property_entry iot2040_gpio_properties[] = {
|
static const struct property_entry iot2040_gpio_properties[] = {
|
||||||
PROPERTY_ENTRY_U32("linux,first-pin", 10),
|
PROPERTY_ENTRY_U32("exar,first-pin", 10),
|
||||||
PROPERTY_ENTRY_U32("ngpios", 1),
|
PROPERTY_ENTRY_U32("ngpios", 1),
|
||||||
{ }
|
{ }
|
||||||
};
|
};
|
||||||
|
|||||||
Reference in New Issue
Block a user