nvme: define constants for identification values
Improve code readability by defining the specification's constants that the driver is using when decoding identification payloads. Signed-off-by: Keith Busch <kbusch@kernel.org> Reviewed-by: Bart van Assche <bvanassche@acm.org> Reviewed-by: Chaitanya Kulkarni <chaitanya.kulkarni@wdc.com> Acked-by: Sagi Grimberg <sagi@grimberg.me> Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jens Axboe <axboe@kernel.dk>
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@@ -1859,13 +1859,13 @@ static void nvme_update_disk_info(struct gendisk *disk,
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* and whether it should be used instead of AWUPF. If NAWUPF ==
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* and whether it should be used instead of AWUPF. If NAWUPF ==
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* 0 then AWUPF must be used instead.
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* 0 then AWUPF must be used instead.
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*/
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*/
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if (id->nsfeat & (1 << 1) && id->nawupf)
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if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf)
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atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs;
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atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs;
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else
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else
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atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs;
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atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs;
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}
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}
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if (id->nsfeat & (1 << 4)) {
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if (id->nsfeat & NVME_NS_FEAT_IO_OPT) {
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/* NPWG = Namespace Preferred Write Granularity */
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/* NPWG = Namespace Preferred Write Granularity */
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phys_bs = bs * (1 + le16_to_cpu(id->npwg));
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phys_bs = bs * (1 + le16_to_cpu(id->npwg));
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/* NOWS = Namespace Optimal Write Size */
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/* NOWS = Namespace Optimal Write Size */
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@@ -1894,7 +1894,7 @@ static void nvme_update_disk_info(struct gendisk *disk,
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nvme_config_discard(disk, ns);
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nvme_config_discard(disk, ns);
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nvme_config_write_zeroes(disk, ns);
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nvme_config_write_zeroes(disk, ns);
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if (id->nsattr & (1 << 0))
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if (id->nsattr & NVME_NS_ATTR_RO)
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set_disk_ro(disk, true);
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set_disk_ro(disk, true);
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else
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else
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set_disk_ro(disk, false);
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set_disk_ro(disk, false);
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@@ -2685,7 +2685,7 @@ static bool nvme_validate_cntlid(struct nvme_subsystem *subsys,
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return false;
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return false;
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}
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}
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if ((id->cmic & (1 << 1)) ||
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if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) ||
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(ctrl->opts && ctrl->opts->discovery_nqn))
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(ctrl->opts && ctrl->opts->discovery_nqn))
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continue;
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continue;
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@@ -3497,7 +3497,7 @@ static int nvme_init_ns_head(struct nvme_ns *ns, unsigned nsid,
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struct nvme_id_ns *id)
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struct nvme_id_ns *id)
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{
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{
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struct nvme_ctrl *ctrl = ns->ctrl;
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struct nvme_ctrl *ctrl = ns->ctrl;
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bool is_shared = id->nmic & (1 << 0);
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bool is_shared = id->nmic & NVME_NS_NMIC_SHARED;
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struct nvme_ns_head *head = NULL;
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struct nvme_ns_head *head = NULL;
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struct nvme_ns_ids ids;
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struct nvme_ns_ids ids;
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int ret = 0;
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int ret = 0;
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@@ -372,7 +372,7 @@ int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, struct nvme_ns_head *head)
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* We also do this for private namespaces as the namespace sharing data could
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* We also do this for private namespaces as the namespace sharing data could
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* change after a rescan.
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* change after a rescan.
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*/
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*/
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if (!(ctrl->subsys->cmic & (1 << 1)) || !multipath)
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if (!(ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) || !multipath)
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return 0;
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return 0;
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q = blk_alloc_queue(nvme_ns_head_make_request, ctrl->numa_node);
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q = blk_alloc_queue(nvme_ns_head_make_request, ctrl->numa_node);
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@@ -694,7 +694,8 @@ int nvme_mpath_init(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
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int error;
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int error;
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/* check if multipath is enabled and we have the capability */
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/* check if multipath is enabled and we have the capability */
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if (!multipath || !ctrl->subsys || !(ctrl->subsys->cmic & (1 << 3)))
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if (!multipath || !ctrl->subsys ||
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!(ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA))
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return 0;
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return 0;
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ctrl->anacap = id->anacap;
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ctrl->anacap = id->anacap;
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@@ -301,6 +301,8 @@ struct nvme_id_ctrl {
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};
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};
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enum {
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enum {
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NVME_CTRL_CMIC_MULTI_CTRL = 1 << 1,
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NVME_CTRL_CMIC_ANA = 1 << 3,
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NVME_CTRL_ONCS_COMPARE = 1 << 0,
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NVME_CTRL_ONCS_COMPARE = 1 << 0,
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NVME_CTRL_ONCS_WRITE_UNCORRECTABLE = 1 << 1,
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NVME_CTRL_ONCS_WRITE_UNCORRECTABLE = 1 << 1,
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NVME_CTRL_ONCS_DSM = 1 << 2,
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NVME_CTRL_ONCS_DSM = 1 << 2,
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@@ -396,8 +398,12 @@ enum {
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enum {
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enum {
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NVME_NS_FEAT_THIN = 1 << 0,
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NVME_NS_FEAT_THIN = 1 << 0,
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NVME_NS_FEAT_ATOMICS = 1 << 1,
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NVME_NS_FEAT_IO_OPT = 1 << 4,
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NVME_NS_ATTR_RO = 1 << 0,
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NVME_NS_FLBAS_LBA_MASK = 0xf,
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NVME_NS_FLBAS_LBA_MASK = 0xf,
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NVME_NS_FLBAS_META_EXT = 0x10,
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NVME_NS_FLBAS_META_EXT = 0x10,
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NVME_NS_NMIC_SHARED = 1 << 0,
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NVME_LBAF_RP_BEST = 0,
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NVME_LBAF_RP_BEST = 0,
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NVME_LBAF_RP_BETTER = 1,
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NVME_LBAF_RP_BETTER = 1,
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NVME_LBAF_RP_GOOD = 2,
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NVME_LBAF_RP_GOOD = 2,
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