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ARM: dts: rockchip: rk3506-pinctrl: set dsmc clk drive strength to L3

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Change-Id: I097abc26413ea50d1e3c56ae57a7d014a8bfcf46
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
This commit is contained in:
Zhihuan He
2024-12-18 17:36:54 +08:00
committed by Tao Huang
parent 58231cec6b
commit 7fdaaa54f6
1 changed files with 2 additions and 2 deletions
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4
arch/arm/boot/dts/rk3506-pinctrl.dtsi
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@@ -101,7 +101,7 @@
dsmc_clk_pins: dsmc-clk-pins {
rockchip,pins =
/* dsmc_clkn */
<1 RK_PA1 2 &pcfg_pull_up>,
<1 RK_PA1 2 &pcfg_pull_up_drv_level_3>,
/* dsmc_resetn */
<1 RK_PC0 2 &pcfg_pull_up>;
};
@@ -123,7 +123,7 @@
dsmc_bus16_pins: dsmc-bus16-pins {
rockchip,pins =
/* dsmc_clkp */
<1 RK_PA0 2 &pcfg_pull_down>,
<1 RK_PA0 2 &pcfg_pull_down_drv_level_3>,
/* dsmc_d0 */
<1 RK_PA3 2 &pcfg_pull_down>,
/* dsmc_d1 */