usb: dwc2: add bulk clock support

Originally, dwc2 just handle one otg clock, however, it may have
two or more clock need to manage for some vendor SoCs, so this
reworks to use bulk clock APIs.

Change-Id: I661297ef908d9eace2215205018fa94d12cea128
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
This commit is contained in:
Frank Wang
2017-01-05 15:08:57 +08:00
parent d67f2d749f
commit 760022a209
2 changed files with 18 additions and 12 deletions

View File

@@ -1075,7 +1075,8 @@ struct dwc2_hsotg {
spinlock_t lock;
void *priv;
int irq;
struct clk *clk;
struct clk_bulk_data *clks;
int num_clks;
struct reset_control *reset;
struct reset_control *reset_ecc;

View File

@@ -143,11 +143,9 @@ static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
if (ret)
return ret;
if (hsotg->clk) {
ret = clk_prepare_enable(hsotg->clk);
if (ret)
return ret;
}
ret = clk_bulk_prepare_enable(hsotg->num_clks, hsotg->clks);
if (ret)
return ret;
if (hsotg->uphy) {
ret = usb_phy_init(hsotg->uphy);
@@ -195,8 +193,7 @@ static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
if (ret)
return ret;
if (hsotg->clk)
clk_disable_unprepare(hsotg->clk);
clk_bulk_disable_unprepare(hsotg->num_clks, hsotg->clks);
return 0;
}
@@ -281,10 +278,18 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
hsotg->plat = dev_get_platdata(hsotg->dev);
/* Clock */
hsotg->clk = devm_clk_get_optional(hsotg->dev, "otg");
if (IS_ERR(hsotg->clk)) {
dev_err(hsotg->dev, "cannot get otg clock\n");
return PTR_ERR(hsotg->clk);
if (hsotg->dev->of_node) {
ret = devm_clk_bulk_get_all(hsotg->dev, &hsotg->clks);
if (ret == -EPROBE_DEFER)
return ret;
/*
* Clocks are optional, but new DT platforms should support all
* clocks as required by the DT-binding.
*/
if (ret < 0)
hsotg->num_clks = 0;
else
hsotg->num_clks = ret;
}
/* Regulators */