arm64: dts: rockchip: px30: match new video driver for 4.19

Change-Id: Iaa282a4d154cf85cdd4124c1affb5746795613e5
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>

arch/arm64/boot/dts/rockchip/px30-ad-d6-anx6345.dts

@@ -555,7 +555,27 @@
 	status = "okay";
 };
 
-&vpu_combo {
+&mpp_srv {
+	status = "okay";
+};
+
+&vdpu {
+	status = "okay";
+};
+
+&vepu {
+	status = "okay";
+};
+
+&vpu_mmu {
+	status = "okay";
+};
+
+&hevc {
+	status = "okay";
+};
+
+&hevc_mmu {
 	status = "okay";
 };
 

arch/arm64/boot/dts/rockchip/px30-ad-r35-mb.dtsi

@@ -492,7 +492,27 @@
 	status = "okay";
 };
 
-&vpu_combo {
+&mpp_srv {
+	status = "okay";
+};
+
+&vdpu {
+	status = "okay";
+};
+
+&vepu {
+	status = "okay";
+};
+
+&vpu_mmu {
+	status = "okay";
+};
+
+&hevc {
+	status = "okay";
+};
+
+&hevc_mmu {
 	status = "okay";
 };
 

arch/arm64/boot/dts/rockchip/px30-evb-ddr3-lvds-v10.dts

@@ -645,7 +645,27 @@
 	status = "okay";
 };
 
-&vpu_combo {
+&mpp_srv {
+	status = "okay";
+};
+
+&vdpu {
+	status = "okay";
+};
+
+&vepu {
+	status = "okay";
+};
+
+&vpu_mmu {
+	status = "okay";
+};
+
+&hevc {
+	status = "okay";
+};
+
+&hevc_mmu {
 	status = "okay";
 };
 

arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10-linux.dts

@@ -841,7 +841,27 @@
 	status = "okay";
 };
 
-&vpu_combo {
+&mpp_srv {
+	status = "okay";
+};
+
+&vdpu {
+	status = "okay";
+};
+
+&vepu {
+	status = "okay";
+};
+
+&vpu_mmu {
+	status = "okay";
+};
+
+&hevc {
+	status = "okay";
+};
+
+&hevc_mmu {
 	status = "okay";
 };
 

arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10-robot-linux.dts

@@ -503,7 +503,27 @@
 	status = "okay";
 };
 
-&vpu_combo {
+&mpp_srv {
+	status = "okay";
+};
+
+&vdpu {
+	status = "okay";
+};
+
+&vepu {
+	status = "okay";
+};
+
+&vpu_mmu {
+	status = "okay";
+};
+
+&hevc {
+	status = "okay";
+};
+
+&hevc_mmu {
 	status = "okay";
 };
 

arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10-robot-no-gpu-linux.dts

@@ -503,7 +503,27 @@
 	status = "okay";
 };
 
-&vpu_combo {
+&mpp_srv {
+	status = "okay";
+};
+
+&vdpu {
+	status = "okay";
+};
+
+&vepu {
+	status = "okay";
+};
+
+&vpu_mmu {
+	status = "okay";
+};
+
+&hevc {
+	status = "okay";
+};
+
+&hevc_mmu {
 	status = "okay";
 };
 

arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dtsi

@@ -876,6 +876,26 @@
 	status = "okay";
 };
 
-&vpu_combo {
+&mpp_srv {
+	status = "okay";
+};
+
+&vdpu {
+	status = "okay";
+};
+
+&vepu {
+	status = "okay";
+};
+
+&vpu_mmu {
+	status = "okay";
+};
+
+&hevc {
+	status = "okay";
+};
+
+&hevc_mmu {
 	status = "okay";
 };

arch/arm64/boot/dts/rockchip/px30-evb-ddr4-v10.dts

@@ -786,7 +786,27 @@
 	status = "okay";
 };
 
-&vpu_combo {
+&mpp_srv {
+	status = "okay";
+};
+
+&vdpu {
+	status = "okay";
+};
+
+&vepu {
+	status = "okay";
+};
+
+&vpu_mmu {
+	status = "okay";
+};
+
+&hevc {
+	status = "okay";
+};
+
+&hevc_mmu {
 	status = "okay";
 };
 

arch/arm64/boot/dts/rockchip/px30-z7-a0-rk618-dsi.dts

@@ -742,7 +742,27 @@
 	status = "okay";
 };
 
-&vpu_combo {
+&mpp_srv {
+	status = "okay";
+};
+
+&vdpu {
+	status = "okay";
+};
+
+&vepu {
+	status = "okay";
+};
+
+&vpu_mmu {
+	status = "okay";
+};
+
+&hevc {
+	status = "okay";
+};
+
+&hevc_mmu {
 	status = "okay";
 };
 

arch/arm64/boot/dts/rockchip/px30.dtsi

@@ -1391,36 +1391,64 @@
 		};
 	};
 
-	hevc: hevc_service@ff440000 {
+	mpp_srv: mpp-srv {
-		compatible = "rockchip,hevc_sub";
+		compatible = "rockchip,mpp-service";
-		iommu_enabled = <1>;
+		rockchip,taskqueue-count = <1>;
+		rkvdec,grf = <&grf 0x410 0x80008000>;
+		vdpu2,grf  = <&grf 0x410 0x80000000>;
+		vepu2,grf  = <&grf 0x410 0x80000000>;
+		status = "disabled";
+	};
+
+	vdpu: vdpu@ff442400 {
+		compatible = "rockchip,vpu-decoder-v2";
+		reg = <0x0 0xff442400 0x0 0x400>;
+		interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_dec";
+		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+		clock-names = "aclk_vcodec", "hclk_vcodec";
+		resets = <&cru SRST_VPU_A>, <&cru SRST_VPU_H>;
+		reset-names = "video_a", "video_h";
+		iommus = <&vpu_mmu>;
+		power-domains = <&power PX30_PD_VPU>;
+		rockchip,srv = <&mpp_srv>;
+		rockchip,taskqueue-node = <0>;
+		status = "disabled";
+	};
+
+	vpu_mmu: iommu@ff442800 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff442800 0x0 0x100>;
+		interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vpu_mmu";
+		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+		clock-names = "aclk", "iface";
+		power-domains = <&power PX30_PD_VPU>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	vepu: vepu@ff442000 {
+		compatible = "rockchip,vpu-encoder-v2";
+		reg = <0x0 0xff442000 0x0 0x400>;
+		interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_enc";
+		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+		clock-names = "aclk_vcodec", "hclk_vcodec";
+		resets = <&cru SRST_VPU_A>, <&cru SRST_VPU_H>;
+		reset-names = "video_a", "video_h";
+		iommus = <&vpu_mmu>;
+		power-domains = <&power PX30_PD_VPU>;
+		rockchip,srv = <&mpp_srv>;
+		rockchip,taskqueue-node = <0>;
+		status = "disabled";
+	};
+
+	hevc: hevc@ff440000 {
+		compatible = "rockchip,hevc-decoder";
 		reg = <0x0 0xff440000 0x0 0x400>;
 		interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "irq_dec";
-		dev_mode = <1>;
-		iommus = <&hevc_mmu>;
-		name = "hevc_service";
-		allocator = <1>;
-	};
-
-	vpu: vpu_service@ff442000 {
-		compatible = "rockchip,vpu_sub";
-		iommu_enabled = <1>;
-		reg = <0x0 0xff442000 0x0 0x800>;
-		interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
-			<GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-names = "irq_enc", "irq_dec";
-		dev_mode = <0>;
-		iommus = <&vpu_mmu>;
-		name = "vpu_service";
-		allocator = <1>;
-	};
-
-	vpu_combo: vpu_combo {
-		compatible = "rockchip,vpu_combo";
-		subcnt = <2>;
-		rockchip,grf = <&grf>;
-		rockchip,sub = <&vpu>, <&hevc>;
 		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>, <&cru SCLK_CORE_VPU>;
 		clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core";
 		resets = <&cru SRST_VPU_A>, <&cru SRST_VPU_H>,
@@ -1428,10 +1456,10 @@
 			<&cru SRST_VPU_CORE>;
 		reset-names = "video_a", "video_h", "niu_a", "niu_h",
 			"video_core";
+		iommus = <&hevc_mmu>;
+		rockchip,srv = <&mpp_srv>;
+		rockchip,taskqueue-node = <0>;
 		power-domains = <&power PX30_PD_VPU>;
-		mode_bit = <15>;
-		mode_ctrl = <0x410>;
-		name = "vpu_combo";
 		status = "disabled";
 	};
 
@@ -1444,17 +1472,7 @@
 		clock-names = "aclk", "iface";
 		power-domains = <&power PX30_PD_VPU>;
 		#iommu-cells = <0>;
-	};
+		status = "disabled";
-
-	vpu_mmu: iommu@ff442800 {
-		compatible = "rockchip,iommu";
-		reg = <0x0 0xff442800 0x0 0x100>;
-		interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-names = "vpu_mmu";
-		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
-		clock-names = "aclk", "iface";
-		power-domains = <&power PX30_PD_VPU>;
-		#iommu-cells = <0>;
 	};
 
 	dsi: dsi@ff450000 {

arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dtsi

@@ -782,6 +782,26 @@
 	status = "okay";
 };
 
-&vpu_combo {
+&mpp_srv {
+	status = "okay";
+};
+
+&vdpu {
+	status = "okay";
+};
+
+&vepu {
+	status = "okay";
+};
+
+&vpu_mmu {
+	status = "okay";
+};
+
+&hevc {
+	status = "okay";
+};
+
+&hevc_mmu {
 	status = "okay";
 };

arch/arm64/boot/dts/rockchip/rk3326-86v-v10.dts

@@ -792,7 +792,27 @@
 	status = "okay";
 };
 
-&vpu_combo {
+&mpp_srv {
+	status = "okay";
+};
+
+&vdpu {
+	status = "okay";
+};
+
+&vepu {
+	status = "okay";
+};
+
+&vpu_mmu {
+	status = "okay";
+};
+
+&hevc {
+	status = "okay";
+};
+
+&hevc_mmu {
 	status = "okay";
 };
 

arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v10.dts

@@ -1181,7 +1181,27 @@
 	status = "okay";
 };
 
-&vpu_combo {
+&mpp_srv {
+	status = "okay";
+};
+
+&vdpu {
+	status = "okay";
+};
+
+&vepu {
+	status = "okay";
+};
+
+&vpu_mmu {
+	status = "okay";
+};
+
+&hevc {
+	status = "okay";
+};
+
+&hevc_mmu {
 	status = "okay";
 };
 

arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11-i2s-dmic.dts

@@ -1204,7 +1204,27 @@
 	status = "okay";
 };
 
-&vpu_combo {
+&mpp_srv {
+	status = "okay";
+};
+
+&vdpu {
+	status = "okay";
+};
+
+&vepu {
+	status = "okay";
+};
+
+&vpu_mmu {
+	status = "okay";
+};
+
+&hevc {
+	status = "okay";
+};
+
+&hevc_mmu {
 	status = "okay";
 };
 

arch/arm64/boot/dts/rockchip/rk3326-evb-ai-va-v11.dts

@@ -1190,7 +1190,27 @@
 	status = "okay";
 };
 
-&vpu_combo {
+&mpp_srv {
+	status = "okay";
+};
+
+&vdpu {
+	status = "okay";
+};
+
+&vepu {
+	status = "okay";
+};
+
+&vpu_mmu {
+	status = "okay";
+};
+
+&hevc {
+	status = "okay";
+};
+
+&hevc_mmu {
 	status = "okay";
 };
 

arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10-linux.dts

@@ -916,7 +916,27 @@
 	status = "okay";
 };
 
-&vpu_combo {
+&mpp_srv {
+	status = "okay";
+};
+
+&vdpu {
+	status = "okay";
+};
+
+&vepu {
+	status = "okay";
+};
+
+&vpu_mmu {
+	status = "okay";
+};
+
+&hevc {
+	status = "okay";
+};
+
+&hevc_mmu {
 	status = "okay";
 };
 

arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10-robot-linux.dts

@@ -611,7 +611,27 @@
 	status = "okay";
 };
 
-&vpu_combo {
+&mpp_srv {
+	status = "okay";
+};
+
+&vdpu {
+	status = "okay";
+};
+
+&vepu {
+	status = "okay";
+};
+
+&vpu_mmu {
+	status = "okay";
+};
+
+&hevc {
+	status = "okay";
+};
+
+&hevc_mmu {
 	status = "okay";
 };
 

arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10-robot-no-gpu-linux.dts

@@ -606,7 +606,27 @@
 	status = "okay";
 };
 
-&vpu_combo {
+&mpp_srv {
+	status = "okay";
+};
+
+&vdpu {
+	status = "okay";
+};
+
+&vepu {
+	status = "okay";
+};
+
+&vpu_mmu {
+	status = "okay";
+};
+
+&hevc {
+	status = "okay";
+};
+
+&hevc_mmu {
 	status = "okay";
 };
 

arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10.dtsi

@@ -836,7 +836,26 @@
 	status = "okay";
 };
 
-&vpu_combo {
+&mpp_srv {
 	status = "okay";
 };
 
+&vdpu {
+	status = "okay";
+};
+
+&vepu {
+	status = "okay";
+};
+
+&vpu_mmu {
+	status = "okay";
+};
+
+&hevc {
+	status = "okay";
+};
+
+&hevc_mmu {
+	status = "okay";
+};

arch/arm64/boot/dts/rockchip/rk3326-w7.dtsi

@@ -563,7 +563,27 @@
 	status = "okay";
 };
 
-&vpu_combo {
+&mpp_srv {
+	status = "okay";
+};
+
+&vdpu {
+	status = "okay";
+};
+
+&vepu {
+	status = "okay";
+};
+
+&vpu_mmu {
+	status = "okay";
+};
+
+&hevc {
+	status = "okay";
+};
+
+&hevc_mmu {
 	status = "okay";
 };