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ARM: dts: rockchip: rk3506g-iotest: add wave clk_pwm_rc mode for pwm test

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Change-Id: I20a2719e79fc978e42d42d119de0429f5bcc6458
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
This commit is contained in:
Damon Ding
2025-01-09 19:37:25 +08:00
parent 7fe6e5c902
commit 61fc6ee91f
1 changed files with 20 additions and 0 deletions
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20
arch/arm/boot/dts/rk3506g-iotest-pwm-test.dtsi
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@@ -40,32 +40,52 @@
status = "okay"; status = "okay";
pinctrl-names = "active"; pinctrl-names = "active";
pinctrl-0 = <&rm_io8_pwm0_ch0>; pinctrl-0 = <&rm_io8_pwm0_ch0>;
#ifdef WAVE_CLK_PWM_RC_TEST
clocks = <&cru CLK_RC_PWM0>, <&cru PCLK_PWM0>, <&cru CLK_OSC_PWM0>;
clock-names = "pwm", "pclk", "osc";
#else
assigned-clocks = <&cru CLK_PWM0>; assigned-clocks = <&cru CLK_PWM0>;
assigned-clock-rates = <100000000>; assigned-clock-rates = <100000000>;
#endif
}; };
&pwm0_4ch_1 { &pwm0_4ch_1 {
status = "okay"; status = "okay";
pinctrl-names = "active"; pinctrl-names = "active";
pinctrl-0 = <&rm_io9_pwm0_ch1>; pinctrl-0 = <&rm_io9_pwm0_ch1>;
#ifdef WAVE_CLK_PWM_RC_TEST
clocks = <&cru CLK_RC_PWM0>, <&cru PCLK_PWM0>, <&cru CLK_OSC_PWM0>;
clock-names = "pwm", "pclk", "osc";
#else
assigned-clocks = <&cru CLK_PWM0>; assigned-clocks = <&cru CLK_PWM0>;
assigned-clock-rates = <100000000>; assigned-clock-rates = <100000000>;
#endif
}; };
&pwm0_4ch_2 { &pwm0_4ch_2 {
status = "okay"; status = "okay";
pinctrl-names = "active"; pinctrl-names = "active";
pinctrl-0 = <&rm_io10_pwm0_ch2>; pinctrl-0 = <&rm_io10_pwm0_ch2>;
#ifdef WAVE_CLK_PWM_RC_TEST
clocks = <&cru CLK_RC_PWM0>, <&cru PCLK_PWM0>, <&cru CLK_OSC_PWM0>;
clock-names = "pwm", "pclk", "osc";
#else
assigned-clocks = <&cru CLK_PWM0>; assigned-clocks = <&cru CLK_PWM0>;
assigned-clock-rates = <100000000>; assigned-clock-rates = <100000000>;
#endif
}; };
&pwm0_4ch_3 { &pwm0_4ch_3 {
status = "okay"; status = "okay";
pinctrl-names = "active"; pinctrl-names = "active";
pinctrl-0 = <&rm_io11_pwm0_ch3>; pinctrl-0 = <&rm_io11_pwm0_ch3>;
#ifdef WAVE_CLK_PWM_RC_TEST
clocks = <&cru CLK_RC_PWM0>, <&cru PCLK_PWM0>, <&cru CLK_OSC_PWM0>;
clock-names = "pwm", "pclk", "osc";
#else
assigned-clocks = <&cru CLK_PWM0>; assigned-clocks = <&cru CLK_PWM0>;
assigned-clock-rates = <100000000>; assigned-clock-rates = <100000000>;
#endif
}; };
&pwm1_8ch_0 { &pwm1_8ch_0 {