Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver specific changes from Arnd Bergmann: - Updates to the ux500 cpufreq code - Moving the u300 DMA controller driver to drivers/dma - Moving versatile express drivers out of arch/arm for sharing with arch/arm64 - Device tree bindings for the OMAP General Purpose Memory Controller * tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (27 commits) ARM: OMAP2+: gpmc: Add device tree documentation for elm handle ARM: OMAP2+: gpmc: add DT bindings for OneNAND ARM: OMAP2+: gpmc-onenand: drop __init annotation mtd: omap-onenand: pass device_node in platform data ARM: OMAP2+: Prevent potential crash if GPMC probe fails ARM: OMAP2+: gpmc: Remove unneeded of_node_put() arm: Move sp810.h to include/linux/amba/ ARM: OMAP: gpmc: add DT bindings for GPMC timings and NAND ARM: OMAP: gpmc: enable hwecc for AM33xx SoCs ARM: OMAP: gpmc-nand: drop __init annotation mtd: omap-nand: pass device_node in platform data ARM: OMAP: gpmc: don't create devices from initcall on DT dma: coh901318: cut down on platform data abstraction dma: coh901318: merge header files dma: coh901318: push definitions into driver dma: coh901318: push header down into the DMA subsystem dma: coh901318: skip hard-coded addresses dma: coh901318: remove hardcoded target addresses dma: coh901318: push platform data into driver dma: coh901318: create a proper platform data file ...
This commit is contained in:
Linus Torvalds
64
include/linux/amba/sp810.h
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64
include/linux/amba/sp810.h
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/*
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* arch/arm/include/asm/hardware/sp810.h
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*
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* ARM PrimeXsys System Controller SP810 header file
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*
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* Copyright (C) 2009 ST Microelectronics
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* Viresh Kumar <viresh.linux@gmail.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __ASM_ARM_SP810_H
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#define __ASM_ARM_SP810_H
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#include <linux/io.h>
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/* sysctl registers offset */
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#define SCCTRL 0x000
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#define SCSYSSTAT 0x004
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#define SCIMCTRL 0x008
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#define SCIMSTAT 0x00C
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#define SCXTALCTRL 0x010
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#define SCPLLCTRL 0x014
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#define SCPLLFCTRL 0x018
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#define SCPERCTRL0 0x01C
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#define SCPERCTRL1 0x020
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#define SCPEREN 0x024
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#define SCPERDIS 0x028
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#define SCPERCLKEN 0x02C
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#define SCPERSTAT 0x030
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#define SCSYSID0 0xEE0
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#define SCSYSID1 0xEE4
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#define SCSYSID2 0xEE8
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#define SCSYSID3 0xEEC
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#define SCITCR 0xF00
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#define SCITIR0 0xF04
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#define SCITIR1 0xF08
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#define SCITOR 0xF0C
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#define SCCNTCTRL 0xF10
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#define SCCNTDATA 0xF14
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#define SCCNTSTEP 0xF18
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#define SCPERIPHID0 0xFE0
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#define SCPERIPHID1 0xFE4
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#define SCPERIPHID2 0xFE8
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#define SCPERIPHID3 0xFEC
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#define SCPCELLID0 0xFF0
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#define SCPCELLID1 0xFF4
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#define SCPCELLID2 0xFF8
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#define SCPCELLID3 0xFFC
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#define SCCTRL_TIMERENnSEL_SHIFT(n) (15 + ((n) * 2))
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static inline void sysctl_soft_reset(void __iomem *base)
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{
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/* switch to slow mode */
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writel(0x2, base + SCCTRL);
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/* writing any value to SCSYSSTAT reg will reset system */
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writel(0, base + SCSYSSTAT);
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}
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#endif /* __ASM_ARM_SP810_H */
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72
include/linux/platform_data/dma-coh901318.h
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72
include/linux/platform_data/dma-coh901318.h
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/*
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* Platform data for the COH901318 DMA controller
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* Copyright (C) 2007-2013 ST-Ericsson
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* License terms: GNU General Public License (GPL) version 2
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*/
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#ifndef PLAT_COH901318_H
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#define PLAT_COH901318_H
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#ifdef CONFIG_COH901318
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/* We only support the U300 DMA channels */
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#define U300_DMA_MSL_TX_0 0
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#define U300_DMA_MSL_TX_1 1
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#define U300_DMA_MSL_TX_2 2
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#define U300_DMA_MSL_TX_3 3
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#define U300_DMA_MSL_TX_4 4
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#define U300_DMA_MSL_TX_5 5
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#define U300_DMA_MSL_TX_6 6
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#define U300_DMA_MSL_RX_0 7
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#define U300_DMA_MSL_RX_1 8
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#define U300_DMA_MSL_RX_2 9
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#define U300_DMA_MSL_RX_3 10
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#define U300_DMA_MSL_RX_4 11
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#define U300_DMA_MSL_RX_5 12
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#define U300_DMA_MSL_RX_6 13
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#define U300_DMA_MMCSD_RX_TX 14
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#define U300_DMA_MSPRO_TX 15
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#define U300_DMA_MSPRO_RX 16
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#define U300_DMA_UART0_TX 17
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#define U300_DMA_UART0_RX 18
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#define U300_DMA_APEX_TX 19
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#define U300_DMA_APEX_RX 20
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#define U300_DMA_PCM_I2S0_TX 21
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#define U300_DMA_PCM_I2S0_RX 22
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#define U300_DMA_PCM_I2S1_TX 23
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#define U300_DMA_PCM_I2S1_RX 24
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#define U300_DMA_XGAM_CDI 25
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#define U300_DMA_XGAM_PDI 26
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#define U300_DMA_SPI_TX 27
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#define U300_DMA_SPI_RX 28
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#define U300_DMA_GENERAL_PURPOSE_0 29
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#define U300_DMA_GENERAL_PURPOSE_1 30
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#define U300_DMA_GENERAL_PURPOSE_2 31
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#define U300_DMA_GENERAL_PURPOSE_3 32
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#define U300_DMA_GENERAL_PURPOSE_4 33
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#define U300_DMA_GENERAL_PURPOSE_5 34
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#define U300_DMA_GENERAL_PURPOSE_6 35
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#define U300_DMA_GENERAL_PURPOSE_7 36
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#define U300_DMA_GENERAL_PURPOSE_8 37
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#define U300_DMA_UART1_TX 38
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#define U300_DMA_UART1_RX 39
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#define U300_DMA_DEVICE_CHANNELS 32
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#define U300_DMA_CHANNELS 40
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/**
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* coh901318_filter_id() - DMA channel filter function
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* @chan: dma channel handle
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* @chan_id: id of dma channel to be filter out
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*
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* In dma_request_channel() it specifies what channel id to be requested
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*/
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bool coh901318_filter_id(struct dma_chan *chan, void *chan_id);
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#else
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static inline bool coh901318_filter_id(struct dma_chan *chan, void *chan_id)
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{
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return false;
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}
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#endif
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#endif /* PLAT_COH901318_H */
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@@ -60,6 +60,8 @@ struct omap_nand_platform_data {
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int devsize;
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enum omap_ecc ecc_opt;
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struct gpmc_nand_regs reg;
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};
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/* for passing the partitions */
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struct device_node *of_node;
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};
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#endif
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@@ -29,5 +29,8 @@ struct omap_onenand_platform_data {
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u8 flags;
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u8 regulator_can_sleep;
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u8 skip_initial_unlocking;
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/* for passing the partitions */
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struct device_node *of_node;
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};
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#endif
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