iommu/arm-smmu-v3: Share process page tables
With Shared Virtual Addressing (SVA), we need to mirror CPU TTBR, TCR, MAIR and ASIDs in SMMU contexts. Each SMMU has a single ASID space split into two sets, shared and private. Shared ASIDs correspond to those obtained from the arch ASID allocator, and private ASIDs are used for "classic" map/unmap DMA. A possible conflict happens when trying to use a shared ASID that has already been allocated for private use by the SMMU driver. This will be addressed in a later patch by replacing the private ASID. At the moment we return -EBUSY. Each mm_struct shared with the SMMU will have a single context descriptor. Add a refcount to keep track of this. It will be protected by the global SVA lock. Introduce a new arm-smmu-v3-sva.c file and the CONFIG_ARM_SMMU_V3_SVA option to let users opt in SVA support. Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20200918101852.582559-9-jean-philippe@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
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Will Deacon
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@@ -308,6 +308,16 @@ config ARM_SMMU_V3
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Say Y here if your system includes an IOMMU device implementing
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the ARM SMMUv3 architecture.
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config ARM_SMMU_V3_SVA
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bool "Shared Virtual Addressing support for the ARM SMMUv3"
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depends on ARM_SMMU_V3
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help
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Support for sharing process address spaces with devices using the
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SMMUv3.
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Say Y here if your system supports SVA extensions such as PCIe PASID
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and PRI.
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config S390_IOMMU
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def_bool y if S390 && PCI
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depends on S390 && PCI
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