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ARM: dts: rockchip: update rk322xh-dram-2layer-timing

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From hardware colleague fzj, this update improve stability for
rk322xh/rk3328 2layer ddr3 board(ddr3p216sd2).

Change-Id: I62f01eeaf1c095adf3dcadc83d0357add918c4cd
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
This commit is contained in:
Tang Yun ping
2017-11-24 15:30:50 +08:00
committed by Tao Huang
parent 6193899b8e
commit 16ceab73d9
1 changed files with 102 additions and 102 deletions
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204
arch/arm64/boot/dts/rk322xh-dram-2layer-timing.dtsi
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@@ -48,29 +48,29 @@
ddr3a0_ddr4a10_de-skew = <4>; ddr3a0_ddr4a10_de-skew = <4>;
ddr3a3_ddr4a6_de-skew = <6>; ddr3a3_ddr4a6_de-skew = <6>;
ddr3a2_ddr4a4_de-skew = <5>; ddr3a2_ddr4a4_de-skew = <5>;
ddr3a5_ddr4a8_de-skew = <6>; ddr3a5_ddr4a8_de-skew = <7>;
ddr3a4_ddr4a5_de-skew = <5>; ddr3a4_ddr4a5_de-skew = <7>;
ddr3a7_ddr4a11_de-skew = <6>; ddr3a7_ddr4a11_de-skew = <7>;
ddr3a6_ddr4a7_de-skew = <5>; ddr3a6_ddr4a7_de-skew = <7>;
ddr3a9_ddr4a0_de-skew = <5>; ddr3a9_ddr4a0_de-skew = <7>;
ddr3a8_ddr4a13_de-skew = <1>; ddr3a8_ddr4a13_de-skew = <4>;
ddr3a11_ddr4a3_de-skew = <7>; ddr3a11_ddr4a3_de-skew = <4>;
ddr3a10_ddr4cs0_de-skew = <2>; ddr3a10_ddr4cs0_de-skew = <4>;
ddr3a13_ddr4a2_de-skew = <5>; ddr3a13_ddr4a2_de-skew = <7>;
ddr3a12_ddr4ba1_de-skew = <3>; ddr3a12_ddr4ba1_de-skew = <5>;
ddr3a15_ddr4odt0_de-skew = <7>; ddr3a15_ddr4odt0_de-skew = <7>;
ddr3a14_ddr4a1_de-skew = <6>; ddr3a14_ddr4a1_de-skew = <6>;
ddr3ba1_ddr4a15_de-skew = <5>; ddr3ba1_ddr4a15_de-skew = <3>;
ddr3ba0_ddr4bg0_de-skew = <9>; ddr3ba0_ddr4bg0_de-skew = <9>;
ddr3ras_ddr4cke_de-skew = <9>; ddr3ras_ddr4cke_de-skew = <6>;
ddr3ba2_ddr4ba0_de-skew = <9>; ddr3ba2_ddr4ba0_de-skew = <8>;
ddr3we_ddr4bg1_de-skew = <7>; ddr3we_ddr4bg1_de-skew = <4>;
ddr3cas_ddr4a12_de-skew = <5>; ddr3cas_ddr4a12_de-skew = <4>;
ddr3ckn_ddr4ckn_de-skew = <13>; ddr3ckn_ddr4ckn_de-skew = <14>;
ddr3ckp_ddr4ckp_de-skew = <13>; ddr3ckp_ddr4ckp_de-skew = <14>;
ddr3cke_ddr4a16_de-skew = <5>; ddr3cke_ddr4a16_de-skew = <5>;
ddr3odt0_ddr4a14_de-skew = <9>; ddr3odt0_ddr4a14_de-skew = <9>;
ddr3cs0_ddr4act_de-skew = <10>; ddr3cs0_ddr4act_de-skew = <9>;
ddr3reset_ddr4reset_de-skew = <10>; ddr3reset_ddr4reset_de-skew = <10>;
ddr3cs1_ddr4cs1_de-skew = <7>; ddr3cs1_ddr4cs1_de-skew = <7>;
ddr3odt1_ddr4odt1_de-skew = <7>; ddr3odt1_ddr4odt1_de-skew = <7>;
@@ -79,93 +79,93 @@
* RX one step is 25.1ps, range 0-15 * RX one step is 25.1ps, range 0-15
* TX one step is 47.8ps, range 0-15 * TX one step is 47.8ps, range 0-15
*/ */
cs0_dm0_rx_de-skew = <11>; cs0_dm0_rx_de-skew = <15>;
cs0_dm0_tx_de-skew = <10>; cs0_dm0_tx_de-skew = <14>;
cs0_dq0_rx_de-skew = <9>; cs0_dq0_rx_de-skew = <13>;
cs0_dq0_tx_de-skew = <9>; cs0_dq0_tx_de-skew = <13>;
cs0_dq1_rx_de-skew = <10>; cs0_dq1_rx_de-skew = <14>;
cs0_dq1_tx_de-skew = <10>; cs0_dq1_tx_de-skew = <14>;
cs0_dq2_rx_de-skew = <9>; cs0_dq2_rx_de-skew = <13>;
cs0_dq2_tx_de-skew = <9>; cs0_dq2_tx_de-skew = <13>;
cs0_dq3_rx_de-skew = <11>; cs0_dq3_rx_de-skew = <15>;
cs0_dq3_tx_de-skew = <10>; cs0_dq3_tx_de-skew = <14>;
cs0_dq4_rx_de-skew = <11>; cs0_dq4_rx_de-skew = <15>;
cs0_dq4_tx_de-skew = <10>; cs0_dq4_tx_de-skew = <14>;
cs0_dq5_rx_de-skew = <11>; cs0_dq5_rx_de-skew = <15>;
cs0_dq5_tx_de-skew = <10>; cs0_dq5_tx_de-skew = <14>;
cs0_dq6_rx_de-skew = <11>; cs0_dq6_rx_de-skew = <15>;
cs0_dq6_tx_de-skew = <10>; cs0_dq6_tx_de-skew = <14>;
cs0_dq7_rx_de-skew = <11>; cs0_dq7_rx_de-skew = <15>;
cs0_dq7_tx_de-skew = <10>; cs0_dq7_tx_de-skew = <14>;
cs0_dqs0_rx_de-skew = <9>; cs0_dqs0_rx_de-skew = <13>;
cs0_dqs0p_tx_de-skew = <11>; cs0_dqs0p_tx_de-skew = <15>;
cs0_dqs0n_tx_de-skew = <11>; cs0_dqs0n_tx_de-skew = <15>;
cs0_dm1_rx_de-skew = <7>; cs0_dm1_rx_de-skew = <11>;
cs0_dm1_tx_de-skew = <7>; cs0_dm1_tx_de-skew = <11>;
cs0_dq8_rx_de-skew = <8>; cs0_dq8_rx_de-skew = <12>;
cs0_dq8_tx_de-skew = <9>; cs0_dq8_tx_de-skew = <13>;
cs0_dq9_rx_de-skew = <9>; cs0_dq9_rx_de-skew = <13>;
cs0_dq9_tx_de-skew = <8>; cs0_dq9_tx_de-skew = <12>;
cs0_dq10_rx_de-skew = <8>; cs0_dq10_rx_de-skew = <12>;
cs0_dq10_tx_de-skew = <9>; cs0_dq10_tx_de-skew = <13>;
cs0_dq11_rx_de-skew = <11>; cs0_dq11_rx_de-skew = <15>;
cs0_dq11_tx_de-skew = <9>; cs0_dq11_tx_de-skew = <13>;
cs0_dq12_rx_de-skew = <5>; cs0_dq12_rx_de-skew = <9>;
cs0_dq12_tx_de-skew = <7>; cs0_dq12_tx_de-skew = <11>;
cs0_dq13_rx_de-skew = <8>; cs0_dq13_rx_de-skew = <12>;
cs0_dq13_tx_de-skew = <8>; cs0_dq13_tx_de-skew = <12>;
cs0_dq14_rx_de-skew = <5>; cs0_dq14_rx_de-skew = <9>;
cs0_dq14_tx_de-skew = <7>; cs0_dq14_tx_de-skew = <11>;
cs0_dq15_rx_de-skew = <9>; cs0_dq15_rx_de-skew = <13>;
cs0_dq15_tx_de-skew = <8>; cs0_dq15_tx_de-skew = <12>;
cs0_dqs1_rx_de-skew = <9>; cs0_dqs1_rx_de-skew = <14>;
cs0_dqs1p_tx_de-skew = <10>; cs0_dqs1p_tx_de-skew = <14>;
cs0_dqs1n_tx_de-skew = <10>; cs0_dqs1n_tx_de-skew = <14>;
cs0_dm2_rx_de-skew = <6>; cs0_dm2_rx_de-skew = <10>;
cs0_dm2_tx_de-skew = <8>; cs0_dm2_tx_de-skew = <12>;
cs0_dq16_rx_de-skew = <7>; cs0_dq16_rx_de-skew = <11>;
cs0_dq16_tx_de-skew = <8>; cs0_dq16_tx_de-skew = <12>;
cs0_dq17_rx_de-skew = <7>; cs0_dq17_rx_de-skew = <11>;
cs0_dq17_tx_de-skew = <8>; cs0_dq17_tx_de-skew = <12>;
cs0_dq18_rx_de-skew = <7>; cs0_dq18_rx_de-skew = <11>;
cs0_dq18_tx_de-skew = <8>; cs0_dq18_tx_de-skew = <12>;
cs0_dq19_rx_de-skew = <9>; cs0_dq19_rx_de-skew = <13>;
cs0_dq19_tx_de-skew = <9>; cs0_dq19_tx_de-skew = <13>;
cs0_dq20_rx_de-skew = <8>; cs0_dq20_rx_de-skew = <12>;
cs0_dq20_tx_de-skew = <9>; cs0_dq20_tx_de-skew = <13>;
cs0_dq21_rx_de-skew = <7>; cs0_dq21_rx_de-skew = <11>;
cs0_dq21_tx_de-skew = <8>; cs0_dq21_tx_de-skew = <12>;
cs0_dq22_rx_de-skew = <8>; cs0_dq22_rx_de-skew = <12>;
cs0_dq22_tx_de-skew = <8>; cs0_dq22_tx_de-skew = <12>;
cs0_dq23_rx_de-skew = <8>; cs0_dq23_rx_de-skew = <12>;
cs0_dq23_tx_de-skew = <8>; cs0_dq23_tx_de-skew = <12>;
cs0_dqs2_rx_de-skew = <7>; cs0_dqs2_rx_de-skew = <11>;
cs0_dqs2p_tx_de-skew = <10>; cs0_dqs2p_tx_de-skew = <14>;
cs0_dqs2n_tx_de-skew = <10>; cs0_dqs2n_tx_de-skew = <14>;
cs0_dm3_rx_de-skew = <4>; cs0_dm3_rx_de-skew = <10>;
cs0_dm3_tx_de-skew = <5>; cs0_dm3_tx_de-skew = <11>;
cs0_dq24_rx_de-skew = <3>; cs0_dq24_rx_de-skew = <9>;
cs0_dq24_tx_de-skew = <6>; cs0_dq24_tx_de-skew = <12>;
cs0_dq25_rx_de-skew = <4>; cs0_dq25_rx_de-skew = <10>;
cs0_dq25_tx_de-skew = <6>; cs0_dq25_tx_de-skew = <12>;
cs0_dq26_rx_de-skew = <7>; cs0_dq26_rx_de-skew = <13>;
cs0_dq26_tx_de-skew = <7>; cs0_dq26_tx_de-skew = <13>;
cs0_dq27_rx_de-skew = <8>; cs0_dq27_rx_de-skew = <14>;
cs0_dq27_tx_de-skew = <7>; cs0_dq27_tx_de-skew = <13>;
cs0_dq28_rx_de-skew = <2>; cs0_dq28_rx_de-skew = <8>;
cs0_dq28_tx_de-skew = <4>; cs0_dq28_tx_de-skew = <10>;
cs0_dq29_rx_de-skew = <4>; cs0_dq29_rx_de-skew = <10>;
cs0_dq29_tx_de-skew = <6>; cs0_dq29_tx_de-skew = <12>;
cs0_dq30_rx_de-skew = <8>; cs0_dq30_rx_de-skew = <14>;
cs0_dq30_tx_de-skew = <7>; cs0_dq30_tx_de-skew = <13>;
cs0_dq31_rx_de-skew = <9>; cs0_dq31_rx_de-skew = <15>;
cs0_dq31_tx_de-skew = <8>; cs0_dq31_tx_de-skew = <14>;
cs0_dqs3_rx_de-skew = <6>; cs0_dqs3_rx_de-skew = <12>;
cs0_dqs3p_tx_de-skew = <9>; cs0_dqs3p_tx_de-skew = <15>;
cs0_dqs3n_tx_de-skew = <9>; cs0_dqs3n_tx_de-skew = <15>;
cs1_dm0_rx_de-skew = <11>; cs1_dm0_rx_de-skew = <11>;
cs1_dm0_tx_de-skew = <10>; cs1_dm0_tx_de-skew = <10>;